[MIPSR6] R6 target options for clang
Pass along new R6 target arch options and floating
point register model options to clang.
Also pass along older arch variants.
This patch depends on recent Mips extensions to 3.5 clang.
The new options are rejected by aosp's current 3.5 clang.
This only affects builds for mips32r6/mips64r6, not Android's
default builds for mips32r2.
Change-Id: Ic921dc14ced34a83143a82e322124b3ef035014a
diff --git a/core/clang/mips.mk b/core/clang/mips.mk
index 1624b6f..08daf40 100644
--- a/core/clang/mips.mk
+++ b/core/clang/mips.mk
@@ -7,14 +7,6 @@
# Include common unknown flags
CLANG_CONFIG_mips_UNKNOWN_CFLAGS := \
$(CLANG_CONFIG_UNKNOWN_CFLAGS) \
- -mips32 \
- -mips32r2 \
- -mips32r6 \
- -mfp32 \
- -mfp64 \
- -mfpxx \
- -modd-spreg \
- -mno-odd-spreg \
-fno-strict-volatile-bitfields \
-fgcse-after-reload \
-frerun-cse-after-loop \
diff --git a/core/clang/mips64.mk b/core/clang/mips64.mk
index a76aa08..612175c 100644
--- a/core/clang/mips64.mk
+++ b/core/clang/mips64.mk
@@ -7,7 +7,6 @@
# Include common unknown flags
CLANG_CONFIG_mips64_UNKNOWN_CFLAGS := \
$(CLANG_CONFIG_UNKNOWN_CFLAGS) \
- -mips64r6 \
-fno-strict-volatile-bitfields \
-fgcse-after-reload \
-frerun-cse-after-loop \