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Christopher Ferris6a9755d2017-01-13 14:09:31 -08001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef MLX5_ABI_USER_H
20#define MLX5_ABI_USER_H
21#include <linux/types.h>
Christopher Ferris525ce912017-07-26 13:12:53 -070022#include <linux/if_ether.h>
Christopher Ferris6a9755d2017-01-13 14:09:31 -080023enum {
Christopher Ferris6a9755d2017-01-13 14:09:31 -080024 MLX5_QP_FLAG_SIGNATURE = 1 << 0,
25 MLX5_QP_FLAG_SCATTER_CQE = 1 << 1,
26};
27enum {
Christopher Ferris6a9755d2017-01-13 14:09:31 -080028 MLX5_SRQ_FLAG_SIGNATURE = 1 << 0,
29};
30enum {
31 MLX5_WQ_FLAG_SIGNATURE = 1 << 0,
Christopher Ferris6a9755d2017-01-13 14:09:31 -080032};
33#define MLX5_IB_UVERBS_ABI_VERSION 1
34struct mlx5_ib_alloc_ucontext_req {
Christopher Ferris525ce912017-07-26 13:12:53 -070035 __u32 total_num_bfregs;
36 __u32 num_low_latency_bfregs;
37};
38enum mlx5_lib_caps {
39 MLX5_LIB_CAP_4K_UAR = (__u64) 1 << 0,
Christopher Ferris6a9755d2017-01-13 14:09:31 -080040};
41struct mlx5_ib_alloc_ucontext_req_v2 {
Christopher Ferris525ce912017-07-26 13:12:53 -070042 __u32 total_num_bfregs;
43 __u32 num_low_latency_bfregs;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080044 __u32 flags;
45 __u32 comp_mask;
46 __u8 max_cqe_version;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080047 __u8 reserved0;
48 __u16 reserved1;
49 __u32 reserved2;
Christopher Ferris525ce912017-07-26 13:12:53 -070050 __u64 lib_caps;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080051};
Christopher Ferris6a9755d2017-01-13 14:09:31 -080052enum mlx5_ib_alloc_ucontext_resp_mask {
53 MLX5_IB_ALLOC_UCONTEXT_RESP_MASK_CORE_CLOCK_OFFSET = 1UL << 0,
54};
55enum mlx5_user_cmds_supp_uhw {
Christopher Ferris6a9755d2017-01-13 14:09:31 -080056 MLX5_USER_CMDS_SUPP_UHW_QUERY_DEVICE = 1 << 0,
Christopher Ferris48af7cb2017-02-21 12:35:09 -080057 MLX5_USER_CMDS_SUPP_UHW_CREATE_AH = 1 << 1,
Christopher Ferris6a9755d2017-01-13 14:09:31 -080058};
Christopher Ferris525ce912017-07-26 13:12:53 -070059enum mlx5_user_inline_mode {
60 MLX5_USER_INLINE_MODE_NA,
61 MLX5_USER_INLINE_MODE_NONE,
62 MLX5_USER_INLINE_MODE_L2,
63 MLX5_USER_INLINE_MODE_IP,
64 MLX5_USER_INLINE_MODE_TCP_UDP,
65};
Christopher Ferris6a9755d2017-01-13 14:09:31 -080066struct mlx5_ib_alloc_ucontext_resp {
Christopher Ferris48af7cb2017-02-21 12:35:09 -080067 __u32 qp_tab_size;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080068 __u32 bf_reg_size;
Christopher Ferris525ce912017-07-26 13:12:53 -070069 __u32 tot_bfregs;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080070 __u32 cache_line_size;
Christopher Ferris48af7cb2017-02-21 12:35:09 -080071 __u16 max_sq_desc_sz;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080072 __u16 max_rq_desc_sz;
73 __u32 max_send_wqebb;
74 __u32 max_recv_wr;
Christopher Ferris48af7cb2017-02-21 12:35:09 -080075 __u32 max_srq_recv_wr;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080076 __u16 num_ports;
77 __u16 reserved1;
78 __u32 comp_mask;
Christopher Ferris48af7cb2017-02-21 12:35:09 -080079 __u32 response_length;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080080 __u8 cqe_version;
81 __u8 cmds_supp_uhw;
Christopher Ferris525ce912017-07-26 13:12:53 -070082 __u8 eth_min_inline;
83 __u8 reserved2;
Christopher Ferris48af7cb2017-02-21 12:35:09 -080084 __u64 hca_core_clock_offset;
Christopher Ferris525ce912017-07-26 13:12:53 -070085 __u32 log_uar_size;
86 __u32 num_uars_per_page;
Christopher Ferris6a9755d2017-01-13 14:09:31 -080087};
88struct mlx5_ib_alloc_pd_resp {
89 __u32 pdn;
Christopher Ferris48af7cb2017-02-21 12:35:09 -080090};
Christopher Ferris6a9755d2017-01-13 14:09:31 -080091struct mlx5_ib_tso_caps {
92 __u32 max_tso;
93 __u32 supported_qpts;
Christopher Ferris48af7cb2017-02-21 12:35:09 -080094};
Christopher Ferris6a9755d2017-01-13 14:09:31 -080095struct mlx5_ib_rss_caps {
96 __u64 rx_hash_fields_mask;
97 __u8 rx_hash_function;
98 __u8 reserved[7];
Christopher Ferris48af7cb2017-02-21 12:35:09 -080099};
100enum mlx5_ib_cqe_comp_res_format {
101 MLX5_IB_CQE_RES_FORMAT_HASH = 1 << 0,
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800102 MLX5_IB_CQE_RES_FORMAT_CSUM = 1 << 1,
103 MLX5_IB_CQE_RES_RESERVED = 1 << 2,
104};
105struct mlx5_ib_cqe_comp_caps {
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800106 __u32 max_num;
107 __u32 supported_format;
108};
109struct mlx5_packet_pacing_caps {
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800110 __u32 qp_rate_limit_min;
111 __u32 qp_rate_limit_max;
112 __u32 supported_qpts;
113 __u32 reserved;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800114};
Christopher Ferris1308ad32017-11-14 17:32:13 -0800115enum mlx5_ib_mpw_caps {
116 MPW_RESERVED = 1 << 0,
117 MLX5_IB_ALLOW_MPW = 1 << 1,
118 MLX5_IB_SUPPORT_EMPW = 1 << 2,
119};
120enum mlx5_ib_sw_parsing_offloads {
121 MLX5_IB_SW_PARSING = 1 << 0,
122 MLX5_IB_SW_PARSING_CSUM = 1 << 1,
123 MLX5_IB_SW_PARSING_LSO = 1 << 2,
124};
125struct mlx5_ib_sw_parsing_caps {
126 __u32 sw_parsing_offloads;
127 __u32 supported_qpts;
128};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800129struct mlx5_ib_query_device_resp {
130 __u32 comp_mask;
131 __u32 response_length;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800132 struct mlx5_ib_tso_caps tso_caps;
133 struct mlx5_ib_rss_caps rss_caps;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800134 struct mlx5_ib_cqe_comp_caps cqe_comp_caps;
135 struct mlx5_packet_pacing_caps packet_pacing_caps;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800136 __u32 mlx5_ib_support_multi_pkt_send_wqes;
137 __u32 reserved;
Christopher Ferris1308ad32017-11-14 17:32:13 -0800138 struct mlx5_ib_sw_parsing_caps sw_parsing_caps;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800139};
140struct mlx5_ib_create_cq {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800141 __u64 buf_addr;
142 __u64 db_addr;
143 __u32 cqe_size;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800144 __u8 cqe_comp_en;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800145 __u8 cqe_comp_res_format;
146 __u16 reserved;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800147};
148struct mlx5_ib_create_cq_resp {
149 __u32 cqn;
150 __u32 reserved;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800151};
152struct mlx5_ib_resize_cq {
153 __u64 buf_addr;
154 __u16 cqe_size;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800155 __u16 reserved0;
156 __u32 reserved1;
157};
158struct mlx5_ib_create_srq {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800159 __u64 buf_addr;
160 __u64 db_addr;
161 __u32 flags;
162 __u32 reserved0;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800163 __u32 uidx;
164 __u32 reserved1;
165};
166struct mlx5_ib_create_srq_resp {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800167 __u32 srqn;
168 __u32 reserved;
169};
170struct mlx5_ib_create_qp {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800171 __u64 buf_addr;
172 __u64 db_addr;
173 __u32 sq_wqe_count;
174 __u32 rq_wqe_count;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800175 __u32 rq_wqe_shift;
176 __u32 flags;
177 __u32 uidx;
178 __u32 reserved0;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800179 __u64 sq_buf_addr;
180};
181enum mlx5_rx_hash_function_flags {
182 MLX5_RX_HASH_FUNC_TOEPLITZ = 1 << 0,
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800183};
184enum mlx5_rx_hash_fields {
185 MLX5_RX_HASH_SRC_IPV4 = 1 << 0,
186 MLX5_RX_HASH_DST_IPV4 = 1 << 1,
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800187 MLX5_RX_HASH_SRC_IPV6 = 1 << 2,
188 MLX5_RX_HASH_DST_IPV6 = 1 << 3,
189 MLX5_RX_HASH_SRC_PORT_TCP = 1 << 4,
190 MLX5_RX_HASH_DST_PORT_TCP = 1 << 5,
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800191 MLX5_RX_HASH_SRC_PORT_UDP = 1 << 6,
192 MLX5_RX_HASH_DST_PORT_UDP = 1 << 7
193};
194struct mlx5_ib_create_qp_rss {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800195 __u64 rx_hash_fields_mask;
196 __u8 rx_hash_function;
197 __u8 rx_key_len;
198 __u8 reserved[6];
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800199 __u8 rx_hash_key[128];
200 __u32 comp_mask;
201 __u32 reserved1;
202};
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800203struct mlx5_ib_create_qp_resp {
Christopher Ferris525ce912017-07-26 13:12:53 -0700204 __u32 bfreg_index;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800205};
206struct mlx5_ib_alloc_mw {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800207 __u32 comp_mask;
208 __u8 num_klms;
209 __u8 reserved1;
210 __u16 reserved2;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800211};
212struct mlx5_ib_create_wq {
213 __u64 buf_addr;
214 __u64 db_addr;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800215 __u32 rq_wqe_count;
216 __u32 rq_wqe_shift;
217 __u32 user_index;
218 __u32 flags;
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800219 __u32 comp_mask;
220 __u32 reserved;
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800221};
222struct mlx5_ib_create_ah_resp {
223 __u32 response_length;
224 __u8 dmac[ETH_ALEN];
Christopher Ferris48af7cb2017-02-21 12:35:09 -0800225 __u8 reserved[6];
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800226};
227struct mlx5_ib_create_wq_resp {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800228 __u32 response_length;
229 __u32 reserved;
230};
231struct mlx5_ib_create_rwq_ind_tbl_resp {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800232 __u32 response_length;
233 __u32 reserved;
234};
235struct mlx5_ib_modify_wq {
Christopher Ferris6a9755d2017-01-13 14:09:31 -0800236 __u32 comp_mask;
237 __u32 reserved;
238};
239#endif