blob: 0eccf79c511c7a9d9273344771e14e6c8ce5d941 [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef _UAPI__ASM_PTRACE_H
20#define _UAPI__ASM_PTRACE_H
21#include <linux/types.h>
22#include <asm/hwcap.h>
Ben Cheng655a7c02013-10-16 16:09:24 -070023#define PSR_MODE_EL0t 0x00000000
24#define PSR_MODE_EL1t 0x00000004
25#define PSR_MODE_EL1h 0x00000005
26#define PSR_MODE_EL2t 0x00000008
Ben Cheng655a7c02013-10-16 16:09:24 -070027#define PSR_MODE_EL2h 0x00000009
28#define PSR_MODE_EL3t 0x0000000c
29#define PSR_MODE_EL3h 0x0000000d
30#define PSR_MODE_MASK 0x0000000f
Ben Cheng655a7c02013-10-16 16:09:24 -070031#define PSR_MODE32_BIT 0x00000010
32#define PSR_F_BIT 0x00000040
33#define PSR_I_BIT 0x00000080
34#define PSR_A_BIT 0x00000100
Ben Cheng655a7c02013-10-16 16:09:24 -070035#define PSR_D_BIT 0x00000200
Christopher Ferris05d08e92016-02-04 13:16:38 -080036#define PSR_PAN_BIT 0x00400000
Christopher Ferris106b3a82016-08-24 12:15:38 -070037#define PSR_UAO_BIT 0x00800000
Ben Cheng655a7c02013-10-16 16:09:24 -070038#define PSR_Q_BIT 0x08000000
Christopher Ferris106b3a82016-08-24 12:15:38 -070039#define PSR_V_BIT 0x10000000
Christopher Ferris05d08e92016-02-04 13:16:38 -080040#define PSR_C_BIT 0x20000000
Ben Cheng655a7c02013-10-16 16:09:24 -070041#define PSR_Z_BIT 0x40000000
42#define PSR_N_BIT 0x80000000
Christopher Ferris106b3a82016-08-24 12:15:38 -070043#define PSR_f 0xff000000
Christopher Ferris05d08e92016-02-04 13:16:38 -080044#define PSR_s 0x00ff0000
Ben Cheng655a7c02013-10-16 16:09:24 -070045#define PSR_x 0x0000ff00
46#define PSR_c 0x000000ff
Christopher Ferris106b3a82016-08-24 12:15:38 -070047#ifndef __ASSEMBLY__
Christopher Ferris05d08e92016-02-04 13:16:38 -080048struct user_pt_regs {
Tao Baod7db5942015-01-28 10:07:51 -080049 __u64 regs[31];
50 __u64 sp;
Christopher Ferris106b3a82016-08-24 12:15:38 -070051 __u64 pc;
Christopher Ferris05d08e92016-02-04 13:16:38 -080052 __u64 pstate;
Ben Cheng655a7c02013-10-16 16:09:24 -070053};
54struct user_fpsimd_state {
Christopher Ferris106b3a82016-08-24 12:15:38 -070055 __uint128_t vregs[32];
Christopher Ferris05d08e92016-02-04 13:16:38 -080056 __u32 fpsr;
Tao Baod7db5942015-01-28 10:07:51 -080057 __u32 fpcr;
Christopher Ferris351a7962017-01-27 10:49:48 -080058 __u32 __reserved[2];
Christopher Ferris351a7962017-01-27 10:49:48 -080059};
Christopher Ferris106b3a82016-08-24 12:15:38 -070060struct user_hwdebug_state {
Christopher Ferris05d08e92016-02-04 13:16:38 -080061 __u32 dbg_info;
Tao Baod7db5942015-01-28 10:07:51 -080062 __u32 pad;
Christopher Ferris351a7962017-01-27 10:49:48 -080063 struct {
Christopher Ferris106b3a82016-08-24 12:15:38 -070064 __u64 addr;
Christopher Ferris05d08e92016-02-04 13:16:38 -080065 __u32 ctrl;
Tao Baod7db5942015-01-28 10:07:51 -080066 __u32 pad;
Christopher Ferris351a7962017-01-27 10:49:48 -080067 } dbg_regs[16];
Christopher Ferris106b3a82016-08-24 12:15:38 -070068};
Ben Cheng655a7c02013-10-16 16:09:24 -070069#endif
Christopher Ferris05d08e92016-02-04 13:16:38 -080070#endif