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Christopher Ferris38062f92014-07-09 15:33:25 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef __MSM_DRM_H__
20#define __MSM_DRM_H__
Christopher Ferris106b3a82016-08-24 12:15:38 -070021#include "drm.h"
22#ifdef __cplusplus
Christopher Ferris38062f92014-07-09 15:33:25 -070023/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070024#endif
Christopher Ferris38062f92014-07-09 15:33:25 -070025#define MSM_PIPE_NONE 0x00
26#define MSM_PIPE_2D0 0x01
27#define MSM_PIPE_2D1 0x02
Christopher Ferris38062f92014-07-09 15:33:25 -070028/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070029#define MSM_PIPE_3D0 0x10
Christopher Ferris38062f92014-07-09 15:33:25 -070030struct drm_msm_timespec {
Christopher Ferris05d08e92016-02-04 13:16:38 -080031 __s64 tv_sec;
32 __s64 tv_nsec;
Christopher Ferris38062f92014-07-09 15:33:25 -070033/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070034};
Christopher Ferris38062f92014-07-09 15:33:25 -070035#define MSM_PARAM_GPU_ID 0x01
36#define MSM_PARAM_GMEM_SIZE 0x02
Christopher Ferrisba8d4f42014-09-03 19:56:49 -070037#define MSM_PARAM_CHIP_ID 0x03
Christopher Ferris38062f92014-07-09 15:33:25 -070038/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris106b3a82016-08-24 12:15:38 -070039#define MSM_PARAM_MAX_FREQ 0x04
40#define MSM_PARAM_TIMESTAMP 0x05
41struct drm_msm_param {
Christopher Ferris05d08e92016-02-04 13:16:38 -080042 __u32 pipe;
Christopher Ferris106b3a82016-08-24 12:15:38 -070043/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -080044 __u32 param;
45 __u64 value;
Christopher Ferris38062f92014-07-09 15:33:25 -070046};
Christopher Ferrisba8d4f42014-09-03 19:56:49 -070047#define MSM_BO_SCANOUT 0x00000001
Christopher Ferris106b3a82016-08-24 12:15:38 -070048/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -070049#define MSM_BO_GPU_READONLY 0x00000002
50#define MSM_BO_CACHE_MASK 0x000f0000
51#define MSM_BO_CACHED 0x00010000
Christopher Ferrisba8d4f42014-09-03 19:56:49 -070052#define MSM_BO_WC 0x00020000
Christopher Ferris106b3a82016-08-24 12:15:38 -070053/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -070054#define MSM_BO_UNCACHED 0x00040000
Tao Baod7db5942015-01-28 10:07:51 -080055#define MSM_BO_FLAGS (MSM_BO_SCANOUT | MSM_BO_GPU_READONLY | MSM_BO_CACHED | MSM_BO_WC | MSM_BO_UNCACHED)
Christopher Ferris38062f92014-07-09 15:33:25 -070056struct drm_msm_gem_new {
Christopher Ferris05d08e92016-02-04 13:16:38 -080057 __u64 size;
Christopher Ferris106b3a82016-08-24 12:15:38 -070058/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -080059 __u32 flags;
60 __u32 handle;
Christopher Ferris38062f92014-07-09 15:33:25 -070061};
62struct drm_msm_gem_info {
Christopher Ferris106b3a82016-08-24 12:15:38 -070063/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -080064 __u32 handle;
65 __u32 pad;
66 __u64 offset;
Christopher Ferris38062f92014-07-09 15:33:25 -070067};
Christopher Ferris106b3a82016-08-24 12:15:38 -070068/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -070069#define MSM_PREP_READ 0x01
Christopher Ferris38062f92014-07-09 15:33:25 -070070#define MSM_PREP_WRITE 0x02
71#define MSM_PREP_NOSYNC 0x04
Christopher Ferrisba8d4f42014-09-03 19:56:49 -070072#define MSM_PREP_FLAGS (MSM_PREP_READ | MSM_PREP_WRITE | MSM_PREP_NOSYNC)
Christopher Ferris106b3a82016-08-24 12:15:38 -070073/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -070074struct drm_msm_gem_cpu_prep {
Christopher Ferris05d08e92016-02-04 13:16:38 -080075 __u32 handle;
76 __u32 op;
Tao Baod7db5942015-01-28 10:07:51 -080077 struct drm_msm_timespec timeout;
Christopher Ferris106b3a82016-08-24 12:15:38 -070078/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -070079};
80struct drm_msm_gem_cpu_fini {
Christopher Ferris05d08e92016-02-04 13:16:38 -080081 __u32 handle;
Christopher Ferris38062f92014-07-09 15:33:25 -070082};
Christopher Ferris106b3a82016-08-24 12:15:38 -070083/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -070084struct drm_msm_gem_submit_reloc {
Christopher Ferris05d08e92016-02-04 13:16:38 -080085 __u32 submit_offset;
86 __u32 or;
Christopher Ferris05d08e92016-02-04 13:16:38 -080087 __s32 shift;
Christopher Ferris106b3a82016-08-24 12:15:38 -070088/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -080089 __u32 reloc_idx;
90 __u64 reloc_offset;
Christopher Ferris38062f92014-07-09 15:33:25 -070091};
92#define MSM_SUBMIT_CMD_BUF 0x0001
Christopher Ferris106b3a82016-08-24 12:15:38 -070093/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -070094#define MSM_SUBMIT_CMD_IB_TARGET_BUF 0x0002
95#define MSM_SUBMIT_CMD_CTX_RESTORE_BUF 0x0003
Christopher Ferris38062f92014-07-09 15:33:25 -070096struct drm_msm_gem_submit_cmd {
Christopher Ferris05d08e92016-02-04 13:16:38 -080097 __u32 type;
Christopher Ferris106b3a82016-08-24 12:15:38 -070098/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -080099 __u32 submit_idx;
100 __u32 submit_offset;
101 __u32 size;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800102 __u32 pad;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700103/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800104 __u32 nr_relocs;
105 __u64 __user relocs;
Christopher Ferris38062f92014-07-09 15:33:25 -0700106};
107#define MSM_SUBMIT_BO_READ 0x0001
Christopher Ferris106b3a82016-08-24 12:15:38 -0700108/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -0700109#define MSM_SUBMIT_BO_WRITE 0x0002
Christopher Ferrisba8d4f42014-09-03 19:56:49 -0700110#define MSM_SUBMIT_BO_FLAGS (MSM_SUBMIT_BO_READ | MSM_SUBMIT_BO_WRITE)
Christopher Ferris38062f92014-07-09 15:33:25 -0700111struct drm_msm_gem_submit_bo {
Christopher Ferris05d08e92016-02-04 13:16:38 -0800112 __u32 flags;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700113/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800114 __u32 handle;
115 __u64 presumed;
Christopher Ferris38062f92014-07-09 15:33:25 -0700116};
Christopher Ferris38062f92014-07-09 15:33:25 -0700117struct drm_msm_gem_submit {
Christopher Ferris106b3a82016-08-24 12:15:38 -0700118/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800119 __u32 pipe;
120 __u32 fence;
121 __u32 nr_bos;
Christopher Ferris05d08e92016-02-04 13:16:38 -0800122 __u32 nr_cmds;
Christopher Ferris106b3a82016-08-24 12:15:38 -0700123/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800124 __u64 __user bos;
125 __u64 __user cmds;
Christopher Ferris38062f92014-07-09 15:33:25 -0700126};
Christopher Ferris38062f92014-07-09 15:33:25 -0700127struct drm_msm_wait_fence {
Christopher Ferris106b3a82016-08-24 12:15:38 -0700128/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris05d08e92016-02-04 13:16:38 -0800129 __u32 fence;
130 __u32 pad;
Tao Baod7db5942015-01-28 10:07:51 -0800131 struct drm_msm_timespec timeout;
Christopher Ferris38062f92014-07-09 15:33:25 -0700132};
Christopher Ferris106b3a82016-08-24 12:15:38 -0700133/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -0700134#define DRM_MSM_GET_PARAM 0x00
135#define DRM_MSM_GEM_NEW 0x02
136#define DRM_MSM_GEM_INFO 0x03
Christopher Ferris38062f92014-07-09 15:33:25 -0700137#define DRM_MSM_GEM_CPU_PREP 0x04
Christopher Ferris106b3a82016-08-24 12:15:38 -0700138/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -0700139#define DRM_MSM_GEM_CPU_FINI 0x05
140#define DRM_MSM_GEM_SUBMIT 0x06
141#define DRM_MSM_WAIT_FENCE 0x07
Christopher Ferris38062f92014-07-09 15:33:25 -0700142#define DRM_MSM_NUM_IOCTLS 0x08
Christopher Ferris106b3a82016-08-24 12:15:38 -0700143/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Christopher Ferris38062f92014-07-09 15:33:25 -0700144#define DRM_IOCTL_MSM_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GET_PARAM, struct drm_msm_param)
145#define DRM_IOCTL_MSM_GEM_NEW DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_NEW, struct drm_msm_gem_new)
146#define DRM_IOCTL_MSM_GEM_INFO DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_INFO, struct drm_msm_gem_info)
Tao Baod7db5942015-01-28 10:07:51 -0800147#define DRM_IOCTL_MSM_GEM_CPU_PREP DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_PREP, struct drm_msm_gem_cpu_prep)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700148/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
Tao Baod7db5942015-01-28 10:07:51 -0800149#define DRM_IOCTL_MSM_GEM_CPU_FINI DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_GEM_CPU_FINI, struct drm_msm_gem_cpu_fini)
Christopher Ferris38062f92014-07-09 15:33:25 -0700150#define DRM_IOCTL_MSM_GEM_SUBMIT DRM_IOWR(DRM_COMMAND_BASE + DRM_MSM_GEM_SUBMIT, struct drm_msm_gem_submit)
Tao Baod7db5942015-01-28 10:07:51 -0800151#define DRM_IOCTL_MSM_WAIT_FENCE DRM_IOW(DRM_COMMAND_BASE + DRM_MSM_WAIT_FENCE, struct drm_msm_wait_fence)
Christopher Ferris106b3a82016-08-24 12:15:38 -0700152#ifdef __cplusplus
Christopher Ferris38062f92014-07-09 15:33:25 -0700153/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
154#endif
Christopher Ferris106b3a82016-08-24 12:15:38 -0700155#endif