blob: 73efc6f442f6731b133ba6ed9da7e4c0f1519d0b [file] [log] [blame]
Ben Cheng655a7c02013-10-16 16:09:24 -07001/****************************************************************************
2 ****************************************************************************
3 ***
4 *** This header was automatically generated from a Linux kernel header
5 *** of the same name, to make information necessary for userspace to
6 *** call into the kernel available to libc. It contains only constants,
7 *** structures, and macros generated from the original header, and thus,
8 *** contains no copyrightable information.
9 ***
10 *** To edit the content of this header, modify the corresponding
11 *** source file (e.g. under external/kernel-headers/original/) then
12 *** run bionic/libc/kernel/tools/update_all.py
13 ***
14 *** Any manual change here will be lost the next time this script will
15 *** be run. You've been warned!
16 ***
17 ****************************************************************************
18 ****************************************************************************/
19#ifndef SPIDEV_H
20#define SPIDEV_H
21#include <linux/types.h>
22#define SPI_CPHA 0x01
Ben Cheng655a7c02013-10-16 16:09:24 -070023#define SPI_CPOL 0x02
Tao Baod7db5942015-01-28 10:07:51 -080024#define SPI_MODE_0 (0 | 0)
25#define SPI_MODE_1 (0 | SPI_CPHA)
26#define SPI_MODE_2 (SPI_CPOL | 0)
Tao Baod7db5942015-01-28 10:07:51 -080027#define SPI_MODE_3 (SPI_CPOL | SPI_CPHA)
Ben Cheng655a7c02013-10-16 16:09:24 -070028#define SPI_CS_HIGH 0x04
29#define SPI_LSB_FIRST 0x08
30#define SPI_3WIRE 0x10
Ben Cheng655a7c02013-10-16 16:09:24 -070031#define SPI_LOOP 0x20
32#define SPI_NO_CS 0x40
33#define SPI_READY 0x80
Christopher Ferrisba8d4f42014-09-03 19:56:49 -070034#define SPI_TX_DUAL 0x100
Christopher Ferrisba8d4f42014-09-03 19:56:49 -070035#define SPI_TX_QUAD 0x200
36#define SPI_RX_DUAL 0x400
37#define SPI_RX_QUAD 0x800
Ben Cheng655a7c02013-10-16 16:09:24 -070038#define SPI_IOC_MAGIC 'k'
Ben Cheng655a7c02013-10-16 16:09:24 -070039struct spi_ioc_transfer {
Tao Baod7db5942015-01-28 10:07:51 -080040 __u64 tx_buf;
41 __u64 rx_buf;
42 __u32 len;
Tao Baod7db5942015-01-28 10:07:51 -080043 __u32 speed_hz;
44 __u16 delay_usecs;
45 __u8 bits_per_word;
46 __u8 cs_change;
Tao Baod7db5942015-01-28 10:07:51 -080047 __u8 tx_nbits;
48 __u8 rx_nbits;
49 __u16 pad;
Ben Cheng655a7c02013-10-16 16:09:24 -070050};
Tao Baod7db5942015-01-28 10:07:51 -080051#define SPI_MSGSIZE(N) ((((N) * (sizeof(struct spi_ioc_transfer))) < (1 << _IOC_SIZEBITS)) ? ((N) * (sizeof(struct spi_ioc_transfer))) : 0)
Ben Cheng655a7c02013-10-16 16:09:24 -070052#define SPI_IOC_MESSAGE(N) _IOW(SPI_IOC_MAGIC, 0, char[SPI_MSGSIZE(N)])
Ben Cheng655a7c02013-10-16 16:09:24 -070053#define SPI_IOC_RD_MODE _IOR(SPI_IOC_MAGIC, 1, __u8)
54#define SPI_IOC_WR_MODE _IOW(SPI_IOC_MAGIC, 1, __u8)
55#define SPI_IOC_RD_LSB_FIRST _IOR(SPI_IOC_MAGIC, 2, __u8)
56#define SPI_IOC_WR_LSB_FIRST _IOW(SPI_IOC_MAGIC, 2, __u8)
Ben Cheng655a7c02013-10-16 16:09:24 -070057#define SPI_IOC_RD_BITS_PER_WORD _IOR(SPI_IOC_MAGIC, 3, __u8)
58#define SPI_IOC_WR_BITS_PER_WORD _IOW(SPI_IOC_MAGIC, 3, __u8)
59#define SPI_IOC_RD_MAX_SPEED_HZ _IOR(SPI_IOC_MAGIC, 4, __u32)
60#define SPI_IOC_WR_MAX_SPEED_HZ _IOW(SPI_IOC_MAGIC, 4, __u32)
Christopher Ferrisba8d4f42014-09-03 19:56:49 -070061#define SPI_IOC_RD_MODE32 _IOR(SPI_IOC_MAGIC, 5, __u32)
62#define SPI_IOC_WR_MODE32 _IOW(SPI_IOC_MAGIC, 5, __u32)
Ben Cheng655a7c02013-10-16 16:09:24 -070063#endif