)]}'
{
  "regions": [
    {
      "start": 1,
      "count": 30,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 31,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset-atom.S",
      "commit": "0a490665a3a287cd3aee1e7327f2381222c387c4",
      "author": {
        "name": "Liubov Dmitrieva",
        "email": "liubov.dmitrieva@intel.com",
        "time": "2012-01-17 12:55:46 +0400"
      }
    },
    {
      "start": 32,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset-atom.S",
      "commit": "0a490665a3a287cd3aee1e7327f2381222c387c4",
      "author": {
        "name": "Liubov Dmitrieva",
        "email": "liubov.dmitrieva@intel.com",
        "time": "2012-01-17 12:55:46 +0400"
      }
    },
    {
      "start": 33,
      "count": 21,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 54,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "124a542aa4d78040176f65b28f4958540b5d89aa",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-10-11 12:24:41 -0700"
      }
    },
    {
      "start": 55,
      "count": 32,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 87,
      "count": 4,
      "path": "libc/arch-x86/atom/string/sse2-memset-atom.S",
      "commit": "01d5b946acac8519d510781967bf538acdae1853",
      "author": {
        "name": "Elliott Hughes",
        "email": "enh@google.com",
        "time": "2016-03-02 17:18:18 -0800"
      }
    },
    {
      "start": 91,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 92,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "0aa8289c6fddda6502fa97c8789341f1462c4224",
      "author": {
        "name": "Nick Kralevich",
        "email": "nnk@google.com",
        "time": "2011-11-11 15:47:24 -0800"
      }
    },
    {
      "start": 93,
      "count": 10,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 103,
      "count": 1,
      "path": "libc/arch-x86/atom/string/sse2-memset-atom.S",
      "commit": "5a92284167ffba6d45210ef6889fa7d255c15d4f",
      "author": {
        "name": "Varvara Rainchik",
        "email": "varvara.rainchik@intel.com",
        "time": "2014-04-24 15:41:20 +0400"
      }
    },
    {
      "start": 104,
      "count": 9,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 113,
      "count": 3,
      "path": "libc/arch-x86/atom/string/sse2-memset-atom.S",
      "commit": "5a92284167ffba6d45210ef6889fa7d255c15d4f",
      "author": {
        "name": "Varvara Rainchik",
        "email": "varvara.rainchik@intel.com",
        "time": "2014-04-24 15:41:20 +0400"
      }
    },
    {
      "start": 116,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 117,
      "count": 2,
      "path": "libc/arch-x86/atom/string/sse2-memset-atom.S",
      "commit": "5a92284167ffba6d45210ef6889fa7d255c15d4f",
      "author": {
        "name": "Varvara Rainchik",
        "email": "varvara.rainchik@intel.com",
        "time": "2014-04-24 15:41:20 +0400"
      }
    },
    {
      "start": 119,
      "count": 16,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 135,
      "count": 4,
      "path": "libc/arch-x86/string/sse2-memset-atom.S",
      "commit": "0a490665a3a287cd3aee1e7327f2381222c387c4",
      "author": {
        "name": "Liubov Dmitrieva",
        "email": "liubov.dmitrieva@intel.com",
        "time": "2012-01-17 12:55:46 +0400"
      }
    },
    {
      "start": 139,
      "count": 2,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 141,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset-atom.S",
      "commit": "0a490665a3a287cd3aee1e7327f2381222c387c4",
      "author": {
        "name": "Liubov Dmitrieva",
        "email": "liubov.dmitrieva@intel.com",
        "time": "2012-01-17 12:55:46 +0400"
      }
    },
    {
      "start": 142,
      "count": 3,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 145,
      "count": 6,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 151,
      "count": 129,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 280,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 281,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 282,
      "count": 26,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 308,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "0aa8289c6fddda6502fa97c8789341f1462c4224",
      "author": {
        "name": "Nick Kralevich",
        "email": "nnk@google.com",
        "time": "2011-11-11 15:47:24 -0800"
      }
    },
    {
      "start": 309,
      "count": 1,
      "path": "libc/arch-x86/atom/string/sse2-memset-atom.S",
      "commit": "5a92284167ffba6d45210ef6889fa7d255c15d4f",
      "author": {
        "name": "Varvara Rainchik",
        "email": "varvara.rainchik@intel.com",
        "time": "2014-04-24 15:41:20 +0400"
      }
    },
    {
      "start": 310,
      "count": 13,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 323,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "124a542aa4d78040176f65b28f4958540b5d89aa",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-10-11 12:24:41 -0700"
      }
    },
    {
      "start": 324,
      "count": 2,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 326,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "0aa8289c6fddda6502fa97c8789341f1462c4224",
      "author": {
        "name": "Nick Kralevich",
        "email": "nnk@google.com",
        "time": "2011-11-11 15:47:24 -0800"
      }
    },
    {
      "start": 327,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "124a542aa4d78040176f65b28f4958540b5d89aa",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-10-11 12:24:41 -0700"
      }
    },
    {
      "start": 328,
      "count": 1,
      "path": "libc/arch-x86/atom/string/sse2-memset-atom.S",
      "commit": "5a92284167ffba6d45210ef6889fa7d255c15d4f",
      "author": {
        "name": "Varvara Rainchik",
        "email": "varvara.rainchik@intel.com",
        "time": "2014-04-24 15:41:20 +0400"
      }
    },
    {
      "start": 329,
      "count": 4,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 333,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "124a542aa4d78040176f65b28f4958540b5d89aa",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-10-11 12:24:41 -0700"
      }
    },
    {
      "start": 334,
      "count": 33,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 367,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "124a542aa4d78040176f65b28f4958540b5d89aa",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-10-11 12:24:41 -0700"
      }
    },
    {
      "start": 368,
      "count": 22,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 390,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "124a542aa4d78040176f65b28f4958540b5d89aa",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-10-11 12:24:41 -0700"
      }
    },
    {
      "start": 391,
      "count": 2,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 393,
      "count": 4,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "124a542aa4d78040176f65b28f4958540b5d89aa",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-10-11 12:24:41 -0700"
      }
    },
    {
      "start": 397,
      "count": 34,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 431,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "0aa8289c6fddda6502fa97c8789341f1462c4224",
      "author": {
        "name": "Nick Kralevich",
        "email": "nnk@google.com",
        "time": "2011-11-11 15:47:24 -0800"
      }
    },
    {
      "start": 432,
      "count": 474,
      "path": "libc/arch-x86/string/sse2-memset5-atom.S",
      "commit": "8ff1a2759a6389bed30d7862d0beb76077032c99",
      "author": {
        "name": "Bruce Beare",
        "email": "brucex.j.beare@intel.com",
        "time": "2010-03-04 11:03:37 -0800"
      }
    },
    {
      "start": 906,
      "count": 1,
      "path": "libc/arch-x86/string/sse2-memset-atom.S",
      "commit": "0a490665a3a287cd3aee1e7327f2381222c387c4",
      "author": {
        "name": "Liubov Dmitrieva",
        "email": "liubov.dmitrieva@intel.com",
        "time": "2012-01-17 12:55:46 +0400"
      }
    }
  ]
}