Merge "Mandate optimized assembler for x86-64 __memset_chk."
diff --git a/libc/arch-arm/bionic/setjmp.S b/libc/arch-arm/bionic/setjmp.S
index 464f7d8..91d158a 100644
--- a/libc/arch-arm/bionic/setjmp.S
+++ b/libc/arch-arm/bionic/setjmp.S
@@ -36,10 +36,13 @@
// According to the ARM AAPCS document, we only need to save
// the following registers:
//
-// Core r4-r14
+// Core r4-r11, sp, lr
+// AAPCS 5.1.1:
+// A subroutine must preserve the contents of the registers r4-r8, r10, r11
+// and SP (and r9 in PCS variants that designate r9 as v6).
//
-// VFP d8-d15 (see section 5.1.2.1)
-//
+// VFP d8-d15
+// AAPCS 5.1.2.1:
// Registers s16-s31 (d8-d15, q4-q7) must be preserved across subroutine
// calls; registers s0-s15 (d0-d7, q0-q3) do not need to be preserved
// (and can be used for passing arguments or returning results in standard
@@ -49,14 +52,15 @@
// FPSCR saved because glibc does.
// The internal structure of a jmp_buf is totally private.
-// Current layout (may change in the future):
+// Current layout (changes from release to release):
//
// word name description
// 0 sigflag/cookie setjmp cookie in top 31 bits, signal mask flag in low bit
// 1 sigmask signal mask (not used with _setjmp / _longjmp)
// 2 float_base base of float registers (d8 to d15)
// 18 float_state floating-point status and control register
-// 19 core_base base of core registers (r4 to r14)
+// 19 core_base base of core registers (r4-r11, r13-r14)
+// 29 checksum checksum of all of the core registers, to give better error messages.
// 30 reserved reserved entries (room to grow)
// 64
//
@@ -69,6 +73,7 @@
#define _JB_FLOAT_BASE (_JB_SIGMASK+1)
#define _JB_FLOAT_STATE (_JB_FLOAT_BASE + (15-8+1)*2)
#define _JB_CORE_BASE (_JB_FLOAT_STATE+1)
+#define _JB_CHECKSUM (_JB_CORE_BASE+10)
ENTRY(setjmp)
mov r1, #1
@@ -81,6 +86,8 @@
END(_setjmp)
#define MANGLE_REGISTERS 1
+#define USE_CHECKSUM 1
+
.macro m_mangle_registers reg
#if MANGLE_REGISTERS
eor r4, r4, \reg
@@ -91,7 +98,6 @@
eor r9, r9, \reg
eor r10, r10, \reg
eor r11, r11, \reg
- eor r12, r12, \reg
eor r13, r13, \reg
eor r14, r14, \reg
#endif
@@ -101,6 +107,14 @@
m_mangle_registers \reg
.endm
+.macro m_calculate_checksum dst, src, scratch
+ mov \dst, #0
+ .irp i,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28
+ ldr \scratch, [\src, #(\i * 4)]
+ eor \dst, \dst, \scratch
+ .endr
+.endm
+
// int sigsetjmp(sigjmp_buf env, int save_signal_mask);
ENTRY(sigsetjmp)
stmfd sp!, {r0, lr}
@@ -153,8 +167,8 @@
m_mangle_registers r2
// ARM deprecates using sp in the register list for stmia.
- stmia r1, {r4-r12, lr}
- str sp, [r1, #(10 * 4)]
+ stmia r1, {r4-r11, lr}
+ str sp, [r1, #(9 * 4)]
m_unmangle_registers r2
// Save floating-point registers.
@@ -165,6 +179,12 @@
fmrx r1, fpscr
str r1, [r0, #(_JB_FLOAT_STATE * 4)]
+#if USE_CHECKSUM
+ // Calculate the checksum.
+ m_calculate_checksum r12, r0, r2
+ str r12, [r0, #(_JB_CHECKSUM * 4)]
+#endif
+
mov r0, #0
bx lr
END(sigsetjmp)
@@ -177,6 +197,15 @@
.cfi_rel_offset r1, 4
.cfi_rel_offset lr, 8
+#if USE_CHECKSUM
+ // Check the checksum before doing anything.
+ m_calculate_checksum r12, r0, r3
+ ldr r2, [r0, #(_JB_CHECKSUM * 4)]
+
+ teq r2, r12
+ bne __bionic_setjmp_checksum_mismatch
+#endif
+
// Fetch the signal flag.
ldr r1, [r0, #(_JB_SIGFLAG * 4)]
@@ -203,14 +232,16 @@
ldr r2, [r0, #(_JB_FLOAT_STATE * 4)]
fmxr fpscr, r2
- // Restore core registers.
+ // Load the cookie.
ldr r3, [r0, #(_JB_SIGFLAG * 4)]
bic r3, r3, #1
+
+ // Restore core registers.
add r2, r0, #(_JB_CORE_BASE * 4)
// ARM deprecates using sp in the register list for ldmia.
- ldmia r2, {r4-r12, lr}
- ldr sp, [r2, #(10 * 4)]
+ ldmia r2, {r4-r11, lr}
+ ldr sp, [r2, #(9 * 4)]
m_unmangle_registers r3
// Save the return value/address and check the setjmp cookie.
diff --git a/libc/arch-arm/cortex-a15/bionic/memset.S b/libc/arch-arm/cortex-a15/bionic/memset.S
index 732a039..6458f97 100644
--- a/libc/arch-arm/cortex-a15/bionic/memset.S
+++ b/libc/arch-arm/cortex-a15/bionic/memset.S
@@ -40,7 +40,7 @@
ENTRY(__memset_chk)
cmp r2, r3
- bls .L_done
+ bls memset
// Preserve lr for backtrace.
push {lr}
@@ -50,13 +50,6 @@
bl __memset_chk_fail
END(__memset_chk)
-ENTRY(bzero)
- mov r2, r1
- mov r1, #0
-.L_done:
- // Fall through to memset...
-END(bzero)
-
ENTRY(memset)
stmfd sp!, {r0}
.cfi_def_cfa_offset 4
diff --git a/libc/arch-arm/cortex-a7/bionic/memset.S b/libc/arch-arm/cortex-a7/bionic/memset.S
index 0b96d62..357416c 100644
--- a/libc/arch-arm/cortex-a7/bionic/memset.S
+++ b/libc/arch-arm/cortex-a7/bionic/memset.S
@@ -40,7 +40,7 @@
ENTRY(__memset_chk)
cmp r2, r3
- bls .L_done
+ bls memset
// Preserve lr for backtrace.
push {lr}
@@ -50,13 +50,6 @@
bl __memset_chk_fail
END(__memset_chk)
-ENTRY(bzero)
- mov r2, r1
- mov r1, #0
-.L_done:
- // Fall through to memset...
-END(bzero)
-
ENTRY(memset)
mov r3, r0
// At this point only d0, d1 are going to be used below.
diff --git a/libc/arch-arm/cortex-a9/bionic/memset.S b/libc/arch-arm/cortex-a9/bionic/memset.S
index a2c8110..d00231b 100644
--- a/libc/arch-arm/cortex-a9/bionic/memset.S
+++ b/libc/arch-arm/cortex-a9/bionic/memset.S
@@ -38,7 +38,7 @@
ENTRY(__memset_chk)
cmp r2, r3
- bls .L_done
+ bls memset
// Preserve lr for backtrace.
push {lr}
@@ -48,14 +48,6 @@
bl __memset_chk_fail
END(__memset_chk)
-ENTRY(bzero)
- mov r2, r1
- mov r1, #0
-
-.L_done:
- // Fall through to memset...
-END(bzero)
-
/* memset() returns its first argument. */
ENTRY(memset)
// The neon memset only wins for less than 132.
diff --git a/libc/arch-arm/denver/bionic/memset.S b/libc/arch-arm/denver/bionic/memset.S
index 8d79e5b..1b0152a 100644
--- a/libc/arch-arm/denver/bionic/memset.S
+++ b/libc/arch-arm/denver/bionic/memset.S
@@ -42,7 +42,7 @@
ENTRY(__memset_chk)
cmp r2, r3
- bls .L_done
+ bls memset
// Preserve lr for backtrace.
push {lr}
@@ -52,13 +52,6 @@
bl __memset_chk_fail
END(__memset_chk)
-ENTRY(bzero)
- mov r2, r1
- mov r1, #0
-.L_done:
- // Fall through to memset...
-END(bzero)
-
ENTRY(memset)
pldw [r0]
mov r3, r0
diff --git a/libc/arch-arm/generic/bionic/memset.S b/libc/arch-arm/generic/bionic/memset.S
index 6e70397..1fd0de1 100644
--- a/libc/arch-arm/generic/bionic/memset.S
+++ b/libc/arch-arm/generic/bionic/memset.S
@@ -38,19 +38,11 @@
ENTRY(__memset_chk)
cmp r2, r3
- bls done
+ bls memset
bl __memset_chk_fail
END(__memset_chk)
-ENTRY(bzero)
- mov r2, r1
- mov r1, #0
-
-done:
- // Fall through to memset...
-END(bzero)
-
ENTRY(memset)
/* compute the offset to align the destination
* offset = (4-(src&3))&3 = -src & 3
diff --git a/libc/arch-arm/krait/bionic/memset.S b/libc/arch-arm/krait/bionic/memset.S
index 0264dd3..81ba74b 100644
--- a/libc/arch-arm/krait/bionic/memset.S
+++ b/libc/arch-arm/krait/bionic/memset.S
@@ -40,7 +40,7 @@
ENTRY(__memset_chk)
cmp r2, r3
- bls .L_done
+ bls memset
// Preserve lr for backtrace.
push {lr}
@@ -50,14 +50,6 @@
bl __memset_chk_fail
END(__memset_chk)
-ENTRY(bzero)
- mov r2, r1
- mov r1, #0
-
-.L_done:
- // Fall through to memset...
-END(bzero)
-
/* memset() returns its first argument. */
ENTRY(memset)
mov r3, r0
diff --git a/libc/arch-arm64/bionic/setjmp.S b/libc/arch-arm64/bionic/setjmp.S
index c06a671..2550134 100644
--- a/libc/arch-arm64/bionic/setjmp.S
+++ b/libc/arch-arm64/bionic/setjmp.S
@@ -37,6 +37,18 @@
// NOTE: All the registers saved here will have 64 bit vales.
// AAPCS mandates that the higher part of q registers do not need to
// be saved by the callee.
+//
+// The internal structure of a jmp_buf is totally private.
+// Current layout (changes from release to release):
+//
+// word name description
+// 0 sigflag/cookie setjmp cookie in top 31 bits, signal mask flag in low bit
+// 1 sigmask signal mask (not used with _setjmp / _longjmp)
+// 2 core_base base of core registers (x19-x30, sp)
+// 15 float_base base of float registers (d8-d15)
+// 23 checksum checksum of core registers
+// 24 reserved reserved entries (room to grow)
+// 32
#define _JB_SIGFLAG 0
#define _JB_SIGMASK (_JB_SIGFLAG + 1)
@@ -51,8 +63,11 @@
#define _JB_D12_D13 (_JB_D14_D15 + 2)
#define _JB_D10_D11 (_JB_D12_D13 + 2)
#define _JB_D8_D9 (_JB_D10_D11 + 2)
+#define _JB_CHECKSUM (_JB_D8_D9 + 2)
#define MANGLE_REGISTERS 1
+#define USE_CHECKSUM 1
+
.macro m_mangle_registers reg, sp_reg
#if MANGLE_REGISTERS
eor x19, x19, \reg
@@ -71,6 +86,14 @@
#endif
.endm
+.macro m_calculate_checksum dst, src, scratch
+ mov \dst, #0
+ .irp i,0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22
+ ldr \scratch, [\src, #(\i * 8)]
+ eor \dst, \dst, \scratch
+ .endr
+.endm
+
.macro m_unmangle_registers reg, sp_reg
m_mangle_registers \reg, sp_reg=\sp_reg
.endm
@@ -143,12 +166,27 @@
stp d10, d11, [x0, #(_JB_D10_D11 * 8)]
stp d8, d9, [x0, #(_JB_D8_D9 * 8)]
+#if USE_CHECKSUM
+ // Calculate the checksum.
+ m_calculate_checksum x12, x0, x2
+ str x12, [x0, #(_JB_CHECKSUM * 8)]
+#endif
+
mov w0, #0
ret
END(sigsetjmp)
// void siglongjmp(sigjmp_buf env, int value);
ENTRY(siglongjmp)
+#if USE_CHECKSUM
+ // Check the checksum before doing anything.
+ m_calculate_checksum x12, x0, x2
+ ldr x2, [x0, #(_JB_CHECKSUM * 8)]
+
+ cmp x2, x12
+ bne __bionic_setjmp_checksum_mismatch
+#endif
+
// Do we need to restore the signal mask?
ldr x2, [x0, #(_JB_SIGFLAG * 8)]
tbz w2, #0, 1f
diff --git a/libc/arch-mips/bionic/bzero.S b/libc/arch-mips/bionic/bzero.S
deleted file mode 100644
index 6e5d294..0000000
--- a/libc/arch-mips/bionic/bzero.S
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * Copyright (C) 2008 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-
-// void bzero(void*, size_t);
-ENTRY(bzero)
- .set noreorder
- .cpload t9
- move a2,a1
- la t9,memset
- j t9
- move a1,zero
-END(bzero)
diff --git a/libc/arch-mips/mips.mk b/libc/arch-mips/mips.mk
index 3663fab..b98d525 100644
--- a/libc/arch-mips/mips.mk
+++ b/libc/arch-mips/mips.mk
@@ -12,7 +12,6 @@
libc_bionic_src_files_mips += \
arch-mips/bionic/__bionic_clone.S \
- arch-mips/bionic/bzero.S \
arch-mips/bionic/cacheflush.cpp \
arch-mips/bionic/_exit_with_stack_teardown.S \
arch-mips/bionic/libgcc_compat.c \
diff --git a/libc/arch-x86/atom/atom.mk b/libc/arch-x86/atom/atom.mk
index 1afabac..34e4c58 100644
--- a/libc/arch-x86/atom/atom.mk
+++ b/libc/arch-x86/atom/atom.mk
@@ -1,5 +1,4 @@
libc_bionic_src_files_x86 += \
- arch-x86/atom/string/sse2-bzero-atom.S \
arch-x86/atom/string/sse2-memset-atom.S \
arch-x86/atom/string/sse2-strlen-atom.S \
arch-x86/atom/string/ssse3-bcopy-atom.S \
@@ -15,7 +14,6 @@
libc_bionic_src_files_exclude_x86 += \
arch-x86/silvermont/string/sse2-bcopy-slm.S \
- arch-x86/silvermont/string/sse2-bzero-slm.S \
arch-x86/silvermont/string/sse2-memcpy-slm.S \
arch-x86/silvermont/string/sse2-memmove-slm.S \
arch-x86/silvermont/string/sse2-memset-slm.S \
diff --git a/libc/arch-x86/atom/string/sse2-bzero-atom.S b/libc/arch-x86/atom/string/sse2-bzero-atom.S
deleted file mode 100644
index 0ddc499..0000000
--- a/libc/arch-x86/atom/string/sse2-bzero-atom.S
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
-Copyright (c) 2010, Intel Corporation
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
- * Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
-
- * Neither the name of Intel Corporation nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
-ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-#define USE_AS_BZERO
-#define MEMSET bzero
-#include "sse2-memset-atom.S"
diff --git a/libc/arch-x86/atom/string/sse2-memset-atom.S b/libc/arch-x86/atom/string/sse2-memset-atom.S
index b0963a1..e8ceee1 100644
--- a/libc/arch-x86/atom/string/sse2-memset-atom.S
+++ b/libc/arch-x86/atom/string/sse2-memset-atom.S
@@ -84,16 +84,10 @@
#define PUSH(REG) pushl REG; CFI_PUSH (REG)
#define POP(REG) popl REG; CFI_POP (REG)
-#ifdef USE_AS_BZERO
-# define DEST PARMS
-# define LEN DEST+4
-# define SETRTNVAL
-#else
-# define DEST PARMS
-# define CHR DEST+4
-# define LEN CHR+4
-# define SETRTNVAL movl DEST(%esp), %eax
-#endif
+#define DEST PARMS
+#define CHR DEST+4
+#define LEN CHR+4
+#define SETRTNVAL movl DEST(%esp), %eax
#if (defined SHARED || defined __PIC__)
# define ENTRANCE PUSH (%ebx);
@@ -148,16 +142,12 @@
ENTRANCE
movl LEN(%esp), %ecx
-#ifdef USE_AS_BZERO
- xor %eax, %eax
-#else
movzbl CHR(%esp), %eax
movb %al, %ah
/* Fill the whole EAX with pattern. */
movl %eax, %edx
shl $16, %eax
or %edx, %eax
-#endif
movl DEST(%esp), %edx
cmp $32, %ecx
jae L(32bytesormore)
@@ -287,12 +277,8 @@
/* ECX > 32 and EDX is 4 byte aligned. */
L(32bytesormore):
/* Fill xmm0 with the pattern. */
-#ifdef USE_AS_BZERO
- pxor %xmm0, %xmm0
-#else
movd %eax, %xmm0
pshufd $0, %xmm0, %xmm0
-#endif
testl $0xf, %edx
jz L(aligned_16)
/* ECX > 32 and EDX is not 16 byte aligned. */
diff --git a/libc/arch-x86/silvermont/string/sse2-bzero-slm.S b/libc/arch-x86/silvermont/string/sse2-bzero-slm.S
deleted file mode 100644
index b682ed6..0000000
--- a/libc/arch-x86/silvermont/string/sse2-bzero-slm.S
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
-Copyright (c) 2014, Intel Corporation
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions are met:
-
- * Redistributions of source code must retain the above copyright notice,
- * this list of conditions and the following disclaimer.
-
- * Redistributions in binary form must reproduce the above copyright notice,
- * this list of conditions and the following disclaimer in the documentation
- * and/or other materials provided with the distribution.
-
- * Neither the name of Intel Corporation nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR
-ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
-(INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
-LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
-ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
-SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-*/
-
-#define USE_AS_BZERO
-#define MEMSET bzero
-#include "sse2-memset-slm.S"
diff --git a/libc/arch-x86/silvermont/string/sse2-memset-slm.S b/libc/arch-x86/silvermont/string/sse2-memset-slm.S
index c30bf74..489f64e 100644
--- a/libc/arch-x86/silvermont/string/sse2-memset-slm.S
+++ b/libc/arch-x86/silvermont/string/sse2-memset-slm.S
@@ -88,16 +88,10 @@
#define PUSH(REG) pushl REG; CFI_PUSH (REG)
#define POP(REG) popl REG; CFI_POP (REG)
-#ifdef USE_AS_BZERO
-# define DEST PARMS
-# define LEN DEST+4
-# define SETRTNVAL
-#else
-# define DEST PARMS
-# define CHR DEST+4
-# define LEN CHR+4
-# define SETRTNVAL movl DEST(%esp), %eax
-#endif
+#define DEST PARMS
+#define CHR DEST+4
+#define LEN CHR+4
+#define SETRTNVAL movl DEST(%esp), %eax
#if (defined SHARED || defined __PIC__)
# define ENTRANCE PUSH (%ebx);
@@ -154,16 +148,12 @@
RETURN
L(1byteormore):
-#ifdef USE_AS_BZERO
- xor %eax, %eax
-#else
movzbl CHR(%esp), %eax
movb %al, %ah
/* Fill the whole EAX with pattern. */
movl %eax, %edx
shl $16, %eax
or %edx, %eax
-#endif
movl DEST(%esp), %edx
cmp $1, %ecx
je L(1byte)
@@ -195,12 +185,8 @@
ALIGN (4)
L(16bytesormore):
-#ifdef USE_AS_BZERO
- pxor %xmm0, %xmm0
-#else
movd %eax, %xmm0
pshufd $0, %xmm0, %xmm0
-#endif
cmp $64, %ecx
ja L(64bytesmore)
diff --git a/libc/arch-x86/x86.mk b/libc/arch-x86/x86.mk
index 1d717aa..9e44a86 100644
--- a/libc/arch-x86/x86.mk
+++ b/libc/arch-x86/x86.mk
@@ -15,7 +15,6 @@
arch-x86/atom/string/sse2-wcslen-atom.S \
arch-x86/atom/string/sse2-wcscmp-atom.S \
arch-x86/silvermont/string/sse2-bcopy-slm.S \
- arch-x86/silvermont/string/sse2-bzero-slm.S \
arch-x86/silvermont/string/sse2-memcpy-slm.S \
arch-x86/silvermont/string/sse2-memmove-slm.S \
arch-x86/silvermont/string/sse2-memset-slm.S \
diff --git a/libc/arch-x86_64/string/sse2-memset-slm.S b/libc/arch-x86_64/string/sse2-memset-slm.S
index 15253da..1cf9f4b 100644
--- a/libc/arch-x86_64/string/sse2-memset-slm.S
+++ b/libc/arch-x86_64/string/sse2-memset-slm.S
@@ -54,14 +54,9 @@
.section .text.sse2,"ax",@progbits
ENTRY(memset)
movq %rdi, %rax
-#ifdef USE_AS_BZERO_P
- mov %rsi, %rdx
- xor %rcx, %rcx
-#else
and $0xff, %rsi
mov $0x0101010101010101, %rcx
imul %rsi, %rcx
-#endif
cmpq $16, %rdx
jae L(16bytesormore)
testb $8, %dl
@@ -93,12 +88,8 @@
ALIGN (4)
L(16bytesormore):
-#ifdef USE_AS_BZERO_P
- pxor %xmm0, %xmm0
-#else
movd %rcx, %xmm0
pshufd $0, %xmm0, %xmm0
-#endif
movdqu %xmm0, (%rdi)
movdqu %xmm0, -16(%rdi, %rdx)
cmpq $32, %rdx
diff --git a/libc/bionic/ndk_cruft.cpp b/libc/bionic/ndk_cruft.cpp
index 3ac88f8..6dc233a 100644
--- a/libc/bionic/ndk_cruft.cpp
+++ b/libc/bionic/ndk_cruft.cpp
@@ -250,6 +250,12 @@
// x86 has an assembler implementation.
#endif
+// This was removed from POSIX 2008.
+#undef bzero
+void bzero(void* dst, size_t n) {
+ memset(dst, 0, n);
+}
+
// sysv_signal() was never in POSIX.
extern "C++" sighandler_t _signal(int signum, sighandler_t handler, int flags);
sighandler_t sysv_signal(int signum, sighandler_t handler) {
diff --git a/libc/bionic/setjmp_cookie.cpp b/libc/bionic/setjmp_cookie.cpp
index ce57fd1..3be675a 100644
--- a/libc/bionic/setjmp_cookie.cpp
+++ b/libc/bionic/setjmp_cookie.cpp
@@ -63,3 +63,7 @@
return cookie & 1;
}
+
+extern "C" __LIBC_HIDDEN__ long __bionic_setjmp_checksum_mismatch() {
+ __libc_fatal("setjmp checksum mismatch");
+}
diff --git a/tests/setjmp_test.cpp b/tests/setjmp_test.cpp
index c75ab51..b7e856f 100644
--- a/tests/setjmp_test.cpp
+++ b/tests/setjmp_test.cpp
@@ -247,3 +247,17 @@
*sigflag &= 1;
EXPECT_DEATH(longjmp(jb, 0), "");
}
+
+TEST(setjmp, setjmp_cookie_checksum) {
+ jmp_buf jb;
+ int value = setjmp(jb);
+
+ if (value == 0) {
+ // Flip a bit.
+ reinterpret_cast<long*>(jb)[0] ^= 1;
+
+ EXPECT_DEATH(longjmp(jb, 1), "checksum mismatch");
+ } else {
+ fprintf(stderr, "setjmp_cookie_checksum: longjmp succeeded?");
+ }
+}