libc: Add Armv8.3-A PAuth and Armv8.5-A BTI compatibility to *.S
The most notable change is in sigsetjmp/siglongjmp. The former
stores LR signed with the current SP into jmp_buf. Calling siglongjmp
reads a signed LR and the corresponding SP from jmp_buf. This way not
only the checksum provides some means of integrity protection but
Pointer Authentication too.
Test: Tested on FVP with BTI enabled.
Change-Id: I9d720239775f8d2829a677901f546c4b14b5cbe5
diff --git a/libc/arch-arm64/bionic/setjmp.S b/libc/arch-arm64/bionic/setjmp.S
index a2b2370..07270c9 100644
--- a/libc/arch-arm64/bionic/setjmp.S
+++ b/libc/arch-arm64/bionic/setjmp.S
@@ -118,6 +118,8 @@
// int sigsetjmp(sigjmp_buf env, int save_signal_mask);
ENTRY(sigsetjmp)
__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(sigsetjmp)
+ hint #25 // paciasp
+ .cfi_negate_ra_state
stp x0, x30, [sp, #-16]!
.cfi_def_cfa_offset 16
.cfi_rel_offset x0, 0
@@ -184,6 +186,8 @@
#endif
mov w0, #0
+ hint #29 // autiasp
+ .cfi_negate_ra_state
ret
END(sigsetjmp)
@@ -250,7 +254,9 @@
1:
// Restore core registers.
bic x2, x2, #1
+ // x30 was saved with PAC to jmp_buf in sigsetjmp().
ldp x30, x10, [x0, #(_JB_X30_SP * 8)]
+ .cfi_negate_ra_state
ldp x28, x29, [x0, #(_JB_X28_X29 * 8)]
ldp x26, x27, [x0, #(_JB_X26_X27 * 8)]
ldp x24, x25, [x0, #(_JB_X24_X25 * 8)]
@@ -290,6 +296,8 @@
// Set return value.
cmp w1, wzr
csinc w0, w1, wzr, ne
+ hint #29 // autiasp
+ .cfi_negate_ra_state
ret
END(siglongjmp)
@@ -297,3 +305,5 @@
__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(longjmp)
ALIAS_SYMBOL(_longjmp, siglongjmp)
__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(_longjmp)
+
+NOTE_GNU_PROPERTY()