Merge "riscv64 __get_tls()."
diff --git a/libc/Android.bp b/libc/Android.bp
index d985c81..e59fac2 100644
--- a/libc/Android.bp
+++ b/libc/Android.bp
@@ -1921,6 +1921,9 @@
arm64: {
export_system_include_dirs: ["kernel/uapi/asm-arm64"],
},
+ riscv64: {
+ export_system_include_dirs: ["kernel/uapi/asm-riscv"],
+ },
x86: {
export_system_include_dirs: ["kernel/uapi/asm-x86"],
},
diff --git a/libc/platform/bionic/macros.h b/libc/platform/bionic/macros.h
index 076cff1..9e13e0d 100644
--- a/libc/platform/bionic/macros.h
+++ b/libc/platform/bionic/macros.h
@@ -55,6 +55,8 @@
#define BIONIC_STOP_UNWIND asm volatile(".cfi_undefined x30")
#elif defined(__i386__)
#define BIONIC_STOP_UNWIND asm volatile(".cfi_undefined \%eip")
+#elif defined(__riscv)
+#define BIONIC_STOP_UNWIND asm volatile(".cfi_undefined ra")
#elif defined(__x86_64__)
#define BIONIC_STOP_UNWIND asm volatile(".cfi_undefined \%rip")
#endif