Clean up trailing whitespace in the kernel headers.
And fix the scripts so they stop letting trailing whitespace through.
Change-Id: Ie109fbe1f63321e565ba0fa60fee8e9cf3a61cfc
diff --git a/libc/kernel/arch-mips/asm/sgi/ioc.h b/libc/kernel/arch-mips/asm/sgi/ioc.h
index db75b20..3fc19a9 100644
--- a/libc/kernel/arch-mips/asm/sgi/ioc.h
+++ b/libc/kernel/arch-mips/asm/sgi/ioc.h
@@ -98,27 +98,27 @@
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
u8 _tcword[3];
volatile u8 tcword;
-#define SGINT_TCWORD_BCD 0x01
-#define SGINT_TCWORD_MMASK 0x0e
+#define SGINT_TCWORD_BCD 0x01
+#define SGINT_TCWORD_MMASK 0x0e
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SGINT_TCWORD_MITC 0x00
-#define SGINT_TCWORD_MOS 0x02
-#define SGINT_TCWORD_MRGEN 0x04
-#define SGINT_TCWORD_MSWGEN 0x06
+#define SGINT_TCWORD_MITC 0x00
+#define SGINT_TCWORD_MOS 0x02
+#define SGINT_TCWORD_MRGEN 0x04
+#define SGINT_TCWORD_MSWGEN 0x06
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SGINT_TCWORD_MSWST 0x08
-#define SGINT_TCWORD_MHWST 0x0a
-#define SGINT_TCWORD_CMASK 0x30
-#define SGINT_TCWORD_CLAT 0x00
+#define SGINT_TCWORD_MSWST 0x08
+#define SGINT_TCWORD_MHWST 0x0a
+#define SGINT_TCWORD_CMASK 0x30
+#define SGINT_TCWORD_CLAT 0x00
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SGINT_TCWORD_CLSB 0x10
-#define SGINT_TCWORD_CMSB 0x20
-#define SGINT_TCWORD_CALL 0x30
-#define SGINT_TCWORD_CNT0 0x00
+#define SGINT_TCWORD_CLSB 0x10
+#define SGINT_TCWORD_CMSB 0x20
+#define SGINT_TCWORD_CALL 0x30
+#define SGINT_TCWORD_CNT0 0x00
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SGINT_TCWORD_CNT1 0x40
-#define SGINT_TCWORD_CNT2 0x80
-#define SGINT_TCWORD_CRBCK 0xc0
+#define SGINT_TCWORD_CNT1 0x40
+#define SGINT_TCWORD_CNT2 0x80
+#define SGINT_TCWORD_CRBCK 0xc0
};
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define SGINT_TIMER_CLOCK 1000000
@@ -159,52 +159,52 @@
u32 _unused3;
u8 _dmasel[3];
volatile u8 dmasel;
-#define SGIOC_DMASEL_SCLK10MHZ 0x00
+#define SGIOC_DMASEL_SCLK10MHZ 0x00
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SGIOC_DMASEL_ISDNB 0x01
-#define SGIOC_DMASEL_ISDNA 0x02
-#define SGIOC_DMASEL_PPORT 0x04
-#define SGIOC_DMASEL_SCLK667MHZ 0x10
+#define SGIOC_DMASEL_ISDNB 0x01
+#define SGIOC_DMASEL_ISDNA 0x02
+#define SGIOC_DMASEL_PPORT 0x04
+#define SGIOC_DMASEL_SCLK667MHZ 0x10
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SGIOC_DMASEL_SCLKEXT 0x20
+#define SGIOC_DMASEL_SCLKEXT 0x20
u32 _unused4;
u8 _reset[3];
volatile u8 reset;
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SGIOC_RESET_PPORT 0x01
-#define SGIOC_RESET_KBDMOUSE 0x02
-#define SGIOC_RESET_EISA 0x04
-#define SGIOC_RESET_ISDN 0x08
+#define SGIOC_RESET_PPORT 0x01
+#define SGIOC_RESET_KBDMOUSE 0x02
+#define SGIOC_RESET_EISA 0x04
+#define SGIOC_RESET_ISDN 0x08
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SGIOC_RESET_LC0OFF 0x10
-#define SGIOC_RESET_LC1OFF 0x20
+#define SGIOC_RESET_LC0OFF 0x10
+#define SGIOC_RESET_LC1OFF 0x20
u32 _unused5;
u8 _write[3];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
volatile u8 write;
-#define SGIOC_WRITE_NTHRESH 0x01
-#define SGIOC_WRITE_TPSPEED 0x02
-#define SGIOC_WRITE_EPSEL 0x04
+#define SGIOC_WRITE_NTHRESH 0x01
+#define SGIOC_WRITE_TPSPEED 0x02
+#define SGIOC_WRITE_EPSEL 0x04
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SGIOC_WRITE_EASEL 0x08
-#define SGIOC_WRITE_U1AMODE 0x10
-#define SGIOC_WRITE_U0AMODE 0x20
-#define SGIOC_WRITE_MLO 0x40
+#define SGIOC_WRITE_EASEL 0x08
+#define SGIOC_WRITE_U1AMODE 0x10
+#define SGIOC_WRITE_U0AMODE 0x20
+#define SGIOC_WRITE_MLO 0x40
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define SGIOC_WRITE_MHI 0x80
+#define SGIOC_WRITE_MHI 0x80
u32 _unused6;
struct sgint_regs int3;
u32 _unused7[16];
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
volatile u32 extio;
-#define EXTIO_S0_IRQ_3 0x8000
-#define EXTIO_S0_IRQ_2 0x4000
-#define EXTIO_S0_IRQ_1 0x2000
+#define EXTIO_S0_IRQ_3 0x8000
+#define EXTIO_S0_IRQ_2 0x4000
+#define EXTIO_S0_IRQ_1 0x2000
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define EXTIO_S0_RETRACE 0x1000
-#define EXTIO_SG_IRQ_3 0x0800
-#define EXTIO_SG_IRQ_2 0x0400
-#define EXTIO_SG_IRQ_1 0x0200
+#define EXTIO_SG_IRQ_3 0x0800
+#define EXTIO_SG_IRQ_2 0x0400
+#define EXTIO_SG_IRQ_1 0x0200
/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
#define EXTIO_SG_RETRACE 0x0100
#define EXTIO_GIO_33MHZ 0x0080