Merge "Remove <sys/_types.h>."
diff --git a/libc/Android.mk b/libc/Android.mk
index 7edadd7..91f6cd1 100644
--- a/libc/Android.mk
+++ b/libc/Android.mk
@@ -481,10 +481,11 @@
endif # arm64
-ifeq ($(TARGET_ARCH),mips)
+ifeq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),mips mips64))
libc_common_src_files += \
bionic/memchr.c \
bionic/memcmp.c \
+ bionic/memmove.c \
bionic/memrchr.c \
bionic/strchr.cpp \
bionic/strnlen.c \
@@ -507,7 +508,7 @@
upstream-freebsd/lib/libc/string/wcsrchr.c \
upstream-freebsd/lib/libc/string/wmemcmp.c \
-endif # mips
+endif # mips || mips64
ifeq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),x86_64))
libc_common_src_files += \
@@ -618,7 +619,7 @@
libc_crt_target_cflags += -mthumb-interwork
endif # arm
-ifeq ($(TARGET_ARCH),mips)
+ifeq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),mips mips64))
ifneq ($(ARCH_MIPS_HAS_FPU),true)
libc_common_cflags += -DSOFTFLOAT
endif
@@ -683,7 +684,7 @@
libc_crt_target_so_cflags :=
libc_crt_target_crtbegin_file := $(LOCAL_PATH)/arch-$(TARGET_ARCH)/bionic/crtbegin.c
endif
-ifeq ($(TARGET_ARCH),mips)
+ifeq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),mips mips64))
libc_crt_target_so_cflags := -fPIC
libc_crt_target_crtbegin_file := $(LOCAL_PATH)/arch-$(TARGET_ARCH)/bionic/crtbegin.c
endif
diff --git a/libc/SYSCALLS.TXT b/libc/SYSCALLS.TXT
index 0555983..e60b166 100644
--- a/libc/SYSCALLS.TXT
+++ b/libc/SYSCALLS.TXT
@@ -6,7 +6,7 @@
#
# where:
# arch_list ::= "all" | arch+
-# arch ::= "arm" | "arm64" | "mips" | "x86" | "x86_64"
+# arch ::= "arm" | "arm64" | "mips" | "mips64" | "x86" | "x86_64"
#
# Note:
# - syscall_name corresponds to the name of the syscall, which may differ from
@@ -27,41 +27,41 @@
int execve(const char*, char* const*, char* const*) all
uid_t getuid:getuid32() arm,x86
-uid_t getuid:getuid() arm64,mips,x86_64
+uid_t getuid:getuid() arm64,mips,mips64,x86_64
gid_t getgid:getgid32() arm,x86
-gid_t getgid:getgid() arm64,mips,x86_64
+gid_t getgid:getgid() arm64,mips,mips64,x86_64
uid_t geteuid:geteuid32() arm,x86
-uid_t geteuid:geteuid() arm64,mips,x86_64
+uid_t geteuid:geteuid() arm64,mips,mips64,x86_64
gid_t getegid:getegid32() arm,x86
-gid_t getegid:getegid() arm64,mips,x86_64
+gid_t getegid:getegid() arm64,mips,mips64,x86_64
uid_t getresuid:getresuid32(uid_t* ruid, uid_t* euid, uid_t* suid) arm,x86
-uid_t getresuid:getresuid(uid_t* ruid, uid_t* euid, uid_t* suid) arm64,mips,x86_64
+uid_t getresuid:getresuid(uid_t* ruid, uid_t* euid, uid_t* suid) arm64,mips,mips64,x86_64
gid_t getresgid:getresgid32(gid_t* rgid, gid_t* egid, gid_t* sgid) arm,x86
-gid_t getresgid:getresgid(gid_t* rgid, gid_t* egid, gid_t* sgid) arm64,mips,x86_64
+gid_t getresgid:getresgid(gid_t* rgid, gid_t* egid, gid_t* sgid) arm64,mips,mips64,x86_64
pid_t gettid() all
ssize_t readahead(int, off64_t, size_t) all
int getgroups:getgroups32(int, gid_t*) arm,x86
-int getgroups:getgroups(int, gid_t*) arm64,mips,x86_64
+int getgroups:getgroups(int, gid_t*) arm64,mips,mips64,x86_64
pid_t getpgid(pid_t) all
pid_t getppid() all
pid_t getsid(pid_t) all
pid_t setsid() all
int setgid:setgid32(gid_t) arm,x86
-int setgid:setgid(gid_t) arm64,mips,x86_64
+int setgid:setgid(gid_t) arm64,mips,mips64,x86_64
int setuid:setuid32(uid_t) arm,x86
-int setuid:setuid(uid_t) arm64,mips,x86_64
+int setuid:setuid(uid_t) arm64,mips,mips64,x86_64
int setreuid:setreuid32(uid_t, uid_t) arm,x86
-int setreuid:setreuid(uid_t, uid_t) arm64,mips,x86_64
+int setreuid:setreuid(uid_t, uid_t) arm64,mips,mips64,x86_64
int setresuid:setresuid32(uid_t, uid_t, uid_t) arm,x86
-int setresuid:setresuid(uid_t, uid_t, uid_t) arm64,mips,x86_64
+int setresuid:setresuid(uid_t, uid_t, uid_t) arm64,mips,mips64,x86_64
int setresgid:setresgid32(gid_t, gid_t, gid_t) arm,x86
-int setresgid:setresgid(gid_t, gid_t, gid_t) arm64,mips,x86_64
+int setresgid:setresgid(gid_t, gid_t, gid_t) arm64,mips,mips64,x86_64
void* __brk:brk(void*) all
int kill(pid_t, int) all
int tkill(pid_t tid, int sig) all
int tgkill(pid_t tgid, pid_t tid, int sig) all
int __ptrace:ptrace(int request, int pid, void* addr, void* data) all
-int __set_thread_area:set_thread_area(void* user_desc) mips,x86
+int __set_thread_area:set_thread_area(void* user_desc) mips,mips64,x86
# <sys/resource.h>
int getrusage(int, struct rusage*) all
@@ -71,18 +71,18 @@
# On 32-bit systems we use prlimit64 to implement the rlimit64 functions.
int getrlimit:ugetrlimit(int, struct rlimit*) arm,x86
int getrlimit(int, struct rlimit*) mips
-int getrlimit|getrlimit64(int, struct rlimit*) arm64,x86_64
+int getrlimit|getrlimit64(int, struct rlimit*) arm64,mips64,x86_64
int setrlimit(int, const struct rlimit*) arm,mips,x86
-int setrlimit|setrlimit64(int, const struct rlimit*) arm64,x86_64
-int prlimit64|prlimit(pid_t, int, struct rlimit64*, const struct rlimit64*) arm64,x86_64
+int setrlimit|setrlimit64(int, const struct rlimit*) arm64,mips64,x86_64
+int prlimit64|prlimit(pid_t, int, struct rlimit64*, const struct rlimit64*) arm64,mips64,x86_64
int prlimit64(pid_t, int, struct rlimit64*, const struct rlimit64*) arm,mips,x86
int setgroups:setgroups32(int, const gid_t*) arm,x86
-int setgroups:setgroups(int, const gid_t*) arm64,mips,x86_64
+int setgroups:setgroups(int, const gid_t*) arm64,mips,mips64,x86_64
int setpgid(pid_t, pid_t) all
pid_t vfork(void) arm
int setregid:setregid32(gid_t, gid_t) arm,x86
-int setregid:setregid(gid_t, gid_t) arm64,mips,x86_64
+int setregid:setregid(gid_t, gid_t) arm64,mips,mips64,x86_64
int chroot(const char*) all
# IMPORTANT: Even though <sys/prctl.h> declares prctl(int, ...), the syscall stub must take 6 arguments
# to match the kernel implementation.
@@ -97,9 +97,9 @@
ssize_t read(int, void*, size_t) all
ssize_t write(int, const void*, size_t) all
ssize_t pread64(int, void*, size_t, off64_t) arm,mips,x86
-ssize_t pread64|pread(int, void*, size_t, off_t) arm64,x86_64
+ssize_t pread64|pread(int, void*, size_t, off_t) arm64,mips64,x86_64
ssize_t pwrite64(int, void*, size_t, off64_t) arm,mips,x86
-ssize_t pwrite64|pwrite(int, void*, size_t, off_t) arm64,x86_64
+ssize_t pwrite64|pwrite(int, void*, size_t, off_t) arm64,mips64,x86_64
int close(int) all
pid_t getpid() all
int munmap(void*, size_t) all
@@ -116,31 +116,37 @@
int readv(int, const struct iovec*, int) all
int writev(int, const struct iovec*, int) all
int __fcntl64:fcntl64(int, int, void*) arm,mips,x86
-int fcntl(int, int, void*) arm64,x86_64
+int fcntl(int, int, void*) arm64,mips64,x86_64
int flock(int, int) all
int fchmod(int, mode_t) all
int dup(int) all
int pipe2(int*, int) all
int dup3(int, int, int) all
-int getdents:getdents64(unsigned int, struct dirent*, unsigned int) all
int fsync(int) all
int fdatasync(int) all
int fchown:fchown32(int, uid_t, gid_t) arm,x86
-int fchown:fchown(int, uid_t, gid_t) arm64,mips,x86_64
+int fchown:fchown(int, uid_t, gid_t) arm64,mips,mips64,x86_64
void sync(void) all
int __fstatfs64:fstatfs64(int, size_t, struct statfs*) arm,mips,x86
-int fstatfs(int, struct statfs*) arm64,x86_64
+int fstatfs(int, struct statfs*) arm64,mips64,x86_64
int fsetxattr(int, const char*, const void*, size_t, int) all
ssize_t fgetxattr(int, const char*, void*, size_t) all
ssize_t flistxattr(int, char*, size_t) all
int fremovexattr(int, const char*) all
+# mips64 doesn't have getdents64 until 3.10 kernels.
+# We need this special-case hack as long as we need to support mips64 on older kernels.
+# The currently-available Debian qemu image is on a 3.2 kernel.
+int getdents:getdents64(unsigned int, struct dirent*, unsigned int) arm,arm64,mips,x86,x86_64
+int __getdents64:getdents64(unsigned int, struct dirent*, unsigned int) mips64
+int __getdents:getdents(unsigned int, void*, unsigned int) mips64
+
int __openat:openat(int, const char*, int, mode_t) all
int faccessat(int, const char*, int, int) all
int fchmodat(int, const char*, mode_t, int) all
int fchownat(int, const char*, uid_t, gid_t, int) all
int fstatat:fstatat64(int, const char*, struct stat*, int) arm,mips,x86
-int fstatat:newfstatat(int, const char*, struct stat*, int) arm64,x86_64
+int fstatat:newfstatat(int, const char*, struct stat*, int) arm64,mips64,x86_64
int linkat(int, const char*, int, const char*, int) all
int mkdirat(int, const char*, mode_t) all
int mknodat(int, const char*, mode_t, dev_t) all
@@ -156,29 +162,29 @@
# That means that every system call in this section should take three lines.
off_t lseek(int, off_t, int) arm,mips,x86
int __llseek:_llseek(int, unsigned long, unsigned long, off64_t*, int) arm,mips,x86
-off_t lseek|lseek64(int, off_t, int) arm64,x86_64
+off_t lseek|lseek64(int, off_t, int) arm64,mips64,x86_64
int ftruncate(int, off_t) arm,mips,x86
int ftruncate64(int, off64_t) arm,mips,x86
-int ftruncate|ftruncate64(int, off_t) arm64,x86_64
+int ftruncate|ftruncate64(int, off_t) arm64,mips64,x86_64
ssize_t sendfile(int out_fd, int in_fd, off_t* offset, size_t count) arm,mips,x86
ssize_t sendfile64(int out_fd, int in_fd, off64_t* offset, size_t count) arm,mips,x86
-ssize_t sendfile|sendfile64(int out_fd, int in_fd, off_t* offset, size_t count) arm64,x86_64
+ssize_t sendfile|sendfile64(int out_fd, int in_fd, off_t* offset, size_t count) arm64,mips64,x86_64
int truncate(const char*, off_t) arm,mips,x86
int truncate64(const char*, off64_t) arm,mips,x86
-int truncate|truncate64(const char*, off_t) arm64,x86_64
+int truncate|truncate64(const char*, off_t) arm64,mips64,x86_64
# (mmap only gets two lines because we only used the 64-bit variant on 32-bit systems.)
void* __mmap2:mmap2(void*, size_t, int, int, int, long) arm,mips,x86
-void* mmap|mmap64(void*, size_t, int, int, int, off_t) arm64,x86_64
+void* mmap|mmap64(void*, size_t, int, int, int, off_t) arm64,mips64,x86_64
# (fallocate only gets two lines because there is no 32-bit variant.)
int fallocate64:fallocate(int, int, off64_t, off64_t) arm,mips,x86
-int fallocate|fallocate64(int, int, off_t, off_t) arm64,x86_64
+int fallocate|fallocate64(int, int, off_t, off_t) arm64,mips64,x86_64
# file system
int chdir(const char*) all
int mount(const char*, const char*, const char*, unsigned long, const void*) all
int umount2(const char*, int) all
int fstat:fstat64(int, struct stat*) arm,mips,x86
-int fstat(int, struct stat*) arm64,x86_64
+int fstat(int, struct stat*) arm64,mips64,x86_64
int __getcwd:getcwd(char* buf, size_t size) all
int fchdir(int) all
int setxattr(const char*, const char*, const void*, size_t, int) all
@@ -190,7 +196,7 @@
int removexattr(const char*, const char*) all
int lremovexattr(const char*, const char*) all
int __statfs64:statfs64(const char*, size_t, struct statfs*) arm,mips,x86
-int statfs(const char*, struct statfs*) arm64,x86_64
+int statfs(const char*, struct statfs*) arm64,mips64,x86_64
int swapon(const char*, int) all
int swapoff(const char*) all
@@ -224,21 +230,21 @@
int signalfd4(int, const sigset_t*, size_t, int) all
# sockets
-int socket(int, int, int) arm,arm64,mips,x86_64
-int socketpair(int, int, int, int*) arm,arm64,mips,x86_64
-int bind(int, struct sockaddr*, int) arm,arm64,mips,x86_64
-int connect(int, struct sockaddr*, socklen_t) arm,arm64,mips,x86_64
-int listen(int, int) arm,arm64,mips,x86_64
-int accept(int, struct sockaddr*, socklen_t*) arm,arm64,mips,x86_64
-int getsockname(int, struct sockaddr*, socklen_t*) arm,arm64,mips,x86_64
-int getpeername(int, struct sockaddr*, socklen_t*) arm,arm64,mips,x86_64
-int sendto(int, const void*, size_t, int, const struct sockaddr*, socklen_t) arm,arm64,mips,x86_64
-int recvfrom(int, void*, size_t, unsigned int, struct sockaddr*, socklen_t*) arm,arm64,mips,x86_64
-int shutdown(int, int) arm,arm64,mips,x86_64
-int setsockopt(int, int, int, const void*, socklen_t) arm,arm64,mips,x86_64
-int getsockopt(int, int, int, void*, socklen_t*) arm,arm64,mips,x86_64
-int sendmsg(int, const struct msghdr*, unsigned int) arm,arm64,mips,x86_64
-int recvmsg(int, struct msghdr*, unsigned int) arm,arm64,mips,x86_64
+int socket(int, int, int) arm,arm64,mips,mips64,x86_64
+int socketpair(int, int, int, int*) arm,arm64,mips,mips64,x86_64
+int bind(int, struct sockaddr*, int) arm,arm64,mips,mips64,x86_64
+int connect(int, struct sockaddr*, socklen_t) arm,arm64,mips,mips64,x86_64
+int listen(int, int) arm,arm64,mips,mips64,x86_64
+int accept(int, struct sockaddr*, socklen_t*) arm,arm64,mips,mips64,x86_64
+int getsockname(int, struct sockaddr*, socklen_t*) arm,arm64,mips,mips64,x86_64
+int getpeername(int, struct sockaddr*, socklen_t*) arm,arm64,mips,mips64,x86_64
+int sendto(int, const void*, size_t, int, const struct sockaddr*, socklen_t) arm,arm64,mips,mips64,x86_64
+int recvfrom(int, void*, size_t, unsigned int, struct sockaddr*, socklen_t*) arm,arm64,mips,mips64,x86_64
+int shutdown(int, int) arm,arm64,mips,mips64,x86_64
+int setsockopt(int, int, int, const void*, socklen_t) arm,arm64,mips,mips64,x86_64
+int getsockopt(int, int, int, void*, socklen_t*) arm,arm64,mips,mips64,x86_64
+int sendmsg(int, const struct msghdr*, unsigned int) arm,arm64,mips,mips64,x86_64
+int recvmsg(int, struct msghdr*, unsigned int) arm,arm64,mips,mips64,x86_64
# sockets for x86. These are done as an "indexed" call to socketcall syscall.
int socket:socketcall:1(int, int, int) x86
@@ -316,4 +322,4 @@
int cacheflush:__ARM_NR_cacheflush(long start, long end, long flags) arm
# MIPS-specific
-int _flush_cache:cacheflush(char* addr, const int nbytes, const int op) mips
+int _flush_cache:cacheflush(char* addr, const int nbytes, const int op) mips,mips64
diff --git a/libc/arch-mips/mips.mk b/libc/arch-mips/mips.mk
index 1119a66..6f5792c 100644
--- a/libc/arch-mips/mips.mk
+++ b/libc/arch-mips/mips.mk
@@ -6,7 +6,6 @@
arch-mips/bionic/futex_mips.S \
arch-mips/bionic/__get_sp.S \
arch-mips/bionic/memcmp16.S \
- arch-mips/bionic/memmove.c \
arch-mips/bionic/_setjmp.S \
arch-mips/bionic/setjmp.S \
arch-mips/bionic/__set_tls.c \
diff --git a/libc/arch-mips64/bionic/__bionic_clone.S b/libc/arch-mips64/bionic/__bionic_clone.S
new file mode 100644
index 0000000..2a9a2b0
--- /dev/null
+++ b/libc/arch-mips64/bionic/__bionic_clone.S
@@ -0,0 +1,99 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+#include <asm/unistd.h>
+#include <linux/errno.h>
+#include <linux/sched.h>
+
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+FRAMESZ = MKFSIZ(NARGSAVE,0)
+FRAME_ARG = 0*REGSZ
+FRAME_FN = 1*REGSZ
+#else
+FRAMESZ = MKFSIZ(0,3)
+FRAME_GP = FRAMESZ-1*REGSZ
+FRAME_ARG = FRAMESZ-2*REGSZ
+FRAME_FN = FRAMESZ-3*REGSZ
+#endif
+
+// pid_t __bionic_clone(int flags, void* child_stack, pid_t* parent_tid, void* tls, pid_t* child_tid, int (*fn)(void*), void* arg);
+ .text
+LEAF(__bionic_clone,FRAMESZ)
+ PTR_SUBU sp, FRAMESZ # allocate stack frame
+ SETUP_GP64(FRAME_GP,__bionic_clone)
+ SAVE_GP(FRAME_GP)
+
+ # set up child stack
+ PTR_SUBU a1,FRAMESZ
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+ PTR_L t0,FRAMESZ+5*REGSZ(sp) # fn
+ PRL_L t1,FRAMESZ+6*REGSZ(sp) # arg
+ PTR_S t0,FRAME_FN(a1) # fn
+ PTR_S t1,FRAME_ARG(a1) # arg
+#else
+ PTR_L t0,FRAME_GP(sp) # copy gp to child stack
+ PTR_S t0,FRAME_GP(a1)
+ PTR_S a5,FRAME_FN(a1) # fn
+ PTR_S a6,FRAME_ARG(a1) # arg
+# endif
+
+ # remainder of arguments are correct for clone system call
+ LI v0,__NR_clone
+ syscall
+
+ move a0,v0
+ bnez a3,.L__error_bc
+
+ beqz v0,.L__thread_start_bc
+
+ RESTORE_GP64
+ PTR_ADDU sp,FRAMESZ
+ j ra
+
+.L__thread_start_bc:
+ # void __bionic_clone_entry(int (*func)(void*), void *arg)
+ PTR_L a0,FRAME_FN(sp) # fn
+ PTR_L a1,FRAME_ARG(sp) # arg
+ LA t9,__bionic_clone_entry
+ RESTORE_GP64
+ /*
+ * For O32 etc the child stack must have space for a0..a3 to be stored
+ * For N64 etc, the child stack can be restored to the original value
+ */
+#if !((_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32))
+ PTR_ADDU sp,FRAMESZ
+#endif
+ j t9
+
+.L__error_bc:
+ LA t9,__set_errno
+ RESTORE_GP64
+ PTR_ADDU sp,FRAMESZ
+ j t9
+ END(__bionic_clone)
diff --git a/libc/arch-mips/bionic/memmove.c b/libc/arch-mips64/bionic/__get_sp.S
similarity index 75%
copy from libc/arch-mips/bionic/memmove.c
copy to libc/arch-mips64/bionic/__get_sp.S
index 1f4522b..834c89d 100644
--- a/libc/arch-mips/bionic/memmove.c
+++ b/libc/arch-mips64/bionic/__get_sp.S
@@ -25,20 +25,15 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
-#include <string.h>
-#include <strings.h>
+ .text
-void *memmove(void *dst, const void *src, size_t n)
-{
- const char *p = src;
- char *q = dst;
- /* We can use the optimized memcpy if the destination is completely below the
- * source (i.e. q + n <= p), or if it is completely over it (i.e. q >= p+n).
- */
- if (__builtin_expect((q + n < p) || (q >= p + n), 1)) {
- return memcpy(dst, src, n);
- } else {
- bcopy(src, dst, n);
- return dst;
- }
-}
+/* void *__get_sp(void) */
+
+ .type __get_sp, @function
+ .global __get_sp
+ .align 4
+ .ent __get_sp
+__get_sp:
+ move $v0, $sp
+ j $ra
+ .end __get_sp
diff --git a/libc/arch-mips/bionic/memmove.c b/libc/arch-mips64/bionic/__set_tls.c
similarity index 75%
copy from libc/arch-mips/bionic/memmove.c
copy to libc/arch-mips64/bionic/__set_tls.c
index 1f4522b..38e3a50 100644
--- a/libc/arch-mips/bionic/memmove.c
+++ b/libc/arch-mips64/bionic/__set_tls.c
@@ -25,20 +25,11 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
-#include <string.h>
-#include <strings.h>
+#include <pthread.h>
-void *memmove(void *dst, const void *src, size_t n)
+extern int __set_thread_area(void *u_info);
+
+int __set_tls(void *ptr)
{
- const char *p = src;
- char *q = dst;
- /* We can use the optimized memcpy if the destination is completely below the
- * source (i.e. q + n <= p), or if it is completely over it (i.e. q >= p+n).
- */
- if (__builtin_expect((q + n < p) || (q >= p + n), 1)) {
- return memcpy(dst, src, n);
- } else {
- bcopy(src, dst, n);
- return dst;
- }
+ return __set_thread_area(ptr);
}
diff --git a/libc/arch-mips/bionic/memmove.c b/libc/arch-mips64/bionic/_exit_with_stack_teardown.S
similarity index 74%
copy from libc/arch-mips/bionic/memmove.c
copy to libc/arch-mips64/bionic/_exit_with_stack_teardown.S
index 1f4522b..8f624c3 100644
--- a/libc/arch-mips/bionic/memmove.c
+++ b/libc/arch-mips64/bionic/_exit_with_stack_teardown.S
@@ -25,20 +25,24 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
-#include <string.h>
-#include <strings.h>
-void *memmove(void *dst, const void *src, size_t n)
-{
- const char *p = src;
- char *q = dst;
- /* We can use the optimized memcpy if the destination is completely below the
- * source (i.e. q + n <= p), or if it is completely over it (i.e. q >= p+n).
- */
- if (__builtin_expect((q + n < p) || (q >= p + n), 1)) {
- return memcpy(dst, src, n);
- } else {
- bcopy(src, dst, n);
- return dst;
- }
-}
+#include <asm/unistd.h>
+
+ .text
+
+// void _exit_with_stack_teardown(void* stackBase, size_t stackSize)
+
+ .type _exit_with_stack_teardown, @function
+ .global _exit_with_stack_teardown
+ .align 4
+ .ent _exit_with_stack_teardown
+_exit_with_stack_teardown:
+ li $v0, __NR_munmap
+ syscall
+ // If munmap failed, we ignore the failure and exit anyway.
+
+ li $a0, 0
+ li $v0, __NR_exit
+ syscall
+ // The exit syscall does not return.
+ .end _exit_with_stack_teardown
diff --git a/libc/arch-mips64/bionic/_setjmp.S b/libc/arch-mips64/bionic/_setjmp.S
new file mode 100644
index 0000000..e7083ae
--- /dev/null
+++ b/libc/arch-mips64/bionic/_setjmp.S
@@ -0,0 +1,188 @@
+/* $OpenBSD: _setjmp.S,v 1.4 2005/08/07 16:40:15 espie Exp $ */
+
+/*
+ * Copyright (c) 2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Opsycon AB nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <machine/asm.h>
+#include <machine/regnum.h>
+#include <machine/signal.h>
+
+/*
+ * _setjmp, _longjmp (not restoring signal state)
+ *
+ * XXX FPSET should probably be taken from SR setting. hmmm...
+ * GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
+ *
+ */
+
+FRAMESZ= MKFSIZ(0,4)
+GPOFF= FRAMESZ-2*REGSZ
+
+#define FPREG64_S(FPR, OFF, BASE) \
+ swc1 FPR, OFF(BASE) ; \
+ mfhc1 t0, FPR ; \
+ sw t0, OFF+4(BASE) ;
+
+#define FPREG64_L(FPR, OFF, BASE) \
+ lw t0, OFF+4(BASE) ; \
+ lw t1, OFF(BASE) ; \
+ mtc1 t1, FPR ; \
+ mthc1 t0, FPR ; \
+
+LEAF(_setjmp, FRAMESZ)
+ PTR_SUBU sp, FRAMESZ
+ SETUP_GP64(GPOFF, _setjmp)
+ SAVE_GP(GPOFF)
+ .set noreorder
+#if defined(__mips64)
+ dli v0, 0xACEDBADE # sigcontext magic number
+#else
+ li v0, 0xACEDBADE # sigcontext magic number
+#endif
+ REG_S v0, SC_REGS+ZERO*REGSZ(a0)
+ REG_S s0, SC_REGS+S0*REGSZ(a0)
+ REG_S s1, SC_REGS+S1*REGSZ(a0)
+ REG_S s2, SC_REGS+S2*REGSZ(a0)
+ REG_S s3, SC_REGS+S3*REGSZ(a0)
+ REG_S s4, SC_REGS+S4*REGSZ(a0)
+ REG_S s5, SC_REGS+S5*REGSZ(a0)
+ REG_S s6, SC_REGS+S6*REGSZ(a0)
+ REG_S s7, SC_REGS+S7*REGSZ(a0)
+ REG_S s8, SC_REGS+S8*REGSZ(a0)
+ REG_L v0, GPOFF(sp)
+ REG_S v0, SC_REGS+GP*REGSZ(a0)
+ PTR_ADDU v0, sp, FRAMESZ
+ REG_S v0, SC_REGS+SP*REGSZ(a0)
+ REG_S ra, SC_PC(a0)
+
+#if !defined(SOFTFLOAT)
+ li v0, 1 # be nice if we could tell
+ REG_S v0, SC_FPUSED(a0) # sc_fpused = 1
+ cfc1 v0, $31
+#if _MIPS_FPSET == 32
+ FPREG64_S($f20, SC_FPREGS+((F20-F0)*REGSZ_FP), a0)
+ FPREG64_S($f21, SC_FPREGS+((F21-F0)*REGSZ_FP), a0)
+ FPREG64_S($f22, SC_FPREGS+((F22-F0)*REGSZ_FP), a0)
+ FPREG64_S($f23, SC_FPREGS+((F23-F0)*REGSZ_FP), a0)
+ FPREG64_S($f24, SC_FPREGS+((F24-F0)*REGSZ_FP), a0)
+ FPREG64_S($f25, SC_FPREGS+((F25-F0)*REGSZ_FP), a0)
+ FPREG64_S($f26, SC_FPREGS+((F26-F0)*REGSZ_FP), a0)
+ FPREG64_S($f27, SC_FPREGS+((F27-F0)*REGSZ_FP), a0)
+ FPREG64_S($f28, SC_FPREGS+((F28-F0)*REGSZ_FP), a0)
+ FPREG64_S($f29, SC_FPREGS+((F29-F0)*REGSZ_FP), a0)
+ FPREG64_S($f30, SC_FPREGS+((F30-F0)*REGSZ_FP), a0)
+ FPREG64_S($f31, SC_FPREGS+((F31-F0)*REGSZ_FP), a0)
+#else
+ swc1 $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
+ swc1 $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
+ swc1 $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
+ swc1 $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
+ swc1 $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
+ swc1 $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
+ swc1 $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
+ swc1 $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
+ swc1 $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
+ swc1 $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
+ swc1 $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
+ swc1 $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+#endif
+ REG_S v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
+#endif /* !SOFTFLOAT */
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+ j ra
+ move v0, zero
+END(_setjmp)
+
+LEAF(_longjmp, FRAMESZ)
+ PTR_SUBU sp, FRAMESZ
+ SETUP_GP64(GPOFF, _longjmp)
+ SAVE_GP(GPOFF)
+ .set noreorder
+ REG_L v0, SC_REGS+ZERO*REGSZ(a0)
+ bne v0, 0xACEDBADE, botch # jump if error
+ REG_L ra, SC_PC(a0)
+ REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
+ REG_L s0, SC_REGS+S0*REGSZ(a0)
+ REG_L s1, SC_REGS+S1*REGSZ(a0)
+ REG_L s2, SC_REGS+S2*REGSZ(a0)
+ REG_L s3, SC_REGS+S3*REGSZ(a0)
+ REG_L s4, SC_REGS+S4*REGSZ(a0)
+ REG_L s5, SC_REGS+S5*REGSZ(a0)
+ REG_L s6, SC_REGS+S6*REGSZ(a0)
+ REG_L s7, SC_REGS+S7*REGSZ(a0)
+ REG_L s8, SC_REGS+S8*REGSZ(a0)
+ REG_L gp, SC_REGS+GP*REGSZ(a0)
+ REG_L sp, SC_REGS+SP*REGSZ(a0)
+#if !defined(SOFTFLOAT)
+ ctc1 v0, $31
+#if _MIPS_FPSET == 32
+ FPREG64_L($f20, SC_FPREGS+((F20-F0)*REGSZ_FP), a0)
+ FPREG64_L($f21, SC_FPREGS+((F21-F0)*REGSZ_FP), a0)
+ FPREG64_L($f22, SC_FPREGS+((F22-F0)*REGSZ_FP), a0)
+ FPREG64_L($f23, SC_FPREGS+((F23-F0)*REGSZ_FP), a0)
+ FPREG64_L($f24, SC_FPREGS+((F24-F0)*REGSZ_FP), a0)
+ FPREG64_L($f25, SC_FPREGS+((F25-F0)*REGSZ_FP), a0)
+ FPREG64_L($f26, SC_FPREGS+((F26-F0)*REGSZ_FP), a0)
+ FPREG64_L($f27, SC_FPREGS+((F27-F0)*REGSZ_FP), a0)
+ FPREG64_L($f28, SC_FPREGS+((F28-F0)*REGSZ_FP), a0)
+ FPREG64_L($f29, SC_FPREGS+((F29-F0)*REGSZ_FP), a0)
+ FPREG64_L($f30, SC_FPREGS+((F30-F0)*REGSZ_FP), a0)
+ FPREG64_L($f31, SC_FPREGS+((F31-F0)*REGSZ_FP), a0)
+#else
+ lwc1 $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
+ lwc1 $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
+ lwc1 $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
+ lwc1 $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
+ lwc1 $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
+ lwc1 $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
+ lwc1 $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
+ lwc1 $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
+ lwc1 $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
+ lwc1 $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
+ lwc1 $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
+ lwc1 $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+#endif
+#endif /* !SOFTFLOAT */
+ bne a1, zero, 1f
+ nop
+ li a1, 1 # never return 0!
+1:
+ j ra
+ move v0, a1
+
+botch:
+ jal longjmperror
+ nop
+ jal abort
+ nop
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+END(_longjmp)
+
diff --git a/libc/arch-mips/bionic/memmove.c b/libc/arch-mips64/bionic/atexit.h
similarity index 72%
copy from libc/arch-mips/bionic/memmove.c
copy to libc/arch-mips64/bionic/atexit.h
index 1f4522b..759008c 100644
--- a/libc/arch-mips/bionic/memmove.c
+++ b/libc/arch-mips64/bionic/atexit.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2008 The Android Open Source Project
+ * Copyright (C) 2013 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -25,20 +25,12 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
-#include <string.h>
-#include <strings.h>
-void *memmove(void *dst, const void *src, size_t n)
+extern void *__dso_handle;
+extern int __cxa_atexit(void (*func)(void *), void *arg, void *dso);
+
+__attribute__ ((visibility ("hidden")))
+int atexit(void (*func)(void))
{
- const char *p = src;
- char *q = dst;
- /* We can use the optimized memcpy if the destination is completely below the
- * source (i.e. q + n <= p), or if it is completely over it (i.e. q >= p+n).
- */
- if (__builtin_expect((q + n < p) || (q >= p + n), 1)) {
- return memcpy(dst, src, n);
- } else {
- bcopy(src, dst, n);
- return dst;
- }
+ return (__cxa_atexit((void (*)(void *))func, (void *)0, &__dso_handle));
}
diff --git a/libc/arch-mips/bionic/memmove.c b/libc/arch-mips64/bionic/bzero.S
similarity index 75%
copy from libc/arch-mips/bionic/memmove.c
copy to libc/arch-mips64/bionic/bzero.S
index 1f4522b..d0b5c84 100644
--- a/libc/arch-mips/bionic/memmove.c
+++ b/libc/arch-mips64/bionic/bzero.S
@@ -25,20 +25,19 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
-#include <string.h>
-#include <strings.h>
+ .text
-void *memmove(void *dst, const void *src, size_t n)
-{
- const char *p = src;
- char *q = dst;
- /* We can use the optimized memcpy if the destination is completely below the
- * source (i.e. q + n <= p), or if it is completely over it (i.e. q >= p+n).
- */
- if (__builtin_expect((q + n < p) || (q >= p + n), 1)) {
- return memcpy(dst, src, n);
- } else {
- bcopy(src, dst, n);
- return dst;
- }
-}
+#include <machine/asm.h>
+
+/*
+ * void bzero(void *s, size_t n);
+ */
+LEAF(bzero,0)
+ SETUP_GP64(t0,bzero)
+ move a2,a1
+ move a1,zero
+ LA t9,memset
+ RESTORE_GP64
+ j t9
+END(bzero)
+
diff --git a/libc/arch-mips64/bionic/cacheflush.cpp b/libc/arch-mips64/bionic/cacheflush.cpp
new file mode 100644
index 0000000..7955dd6
--- /dev/null
+++ b/libc/arch-mips64/bionic/cacheflush.cpp
@@ -0,0 +1,99 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#include <unistd.h>
+#include <sys/cachectl.h>
+
+#ifdef DEBUG
+#include "private/libc_logging.h"
+#define XLOG(...) __libc_format_log(ANDROID_LOG_DEBUG,"libc-cacheflush",__VA_ARGS__)
+#endif
+
+/*
+ * Linux historically defines a cacheflush(3) routine for MIPS
+ * with this signature:
+ * int cacheflush(char *addr, int nbytes, int cache);
+ *
+ * Android defines an alternate cacheflush routine which exposes the
+ * ARM system call interface:
+ * int cacheflush (long start, long end, long flags)
+ *
+ * This is an attempt to maintain compatibility between the historical MIPS
+ * usage for software previously ported to MIPS and Android specific
+ * uses of cacheflush()
+ *
+ * Use the gcc __clear_cache builtin if possible. This will generate inline synci
+ * instructions if available or call _flush_cache(start, len, BCACHE) directly
+ */
+
+#if defined (__GNUC__)
+#define GCC_VERSION ((__GNUC__*10000) + __GNUC_MINOR__*100 + __GNUC_PATCHLEVEL__)
+#endif
+
+/* This is the Android signature */
+int cacheflush (long start, long end, long /*flags*/) {
+ if (end < start) {
+ /*
+ * It looks like this is really MIPS style cacheflush call
+ * start => addr
+ * end => nbytes
+ */
+#ifdef DEBUG
+ static int warned = 0;
+ if (!warned) {
+ XLOG("called with (start,len) instead of (start,end)");
+ warned = 1;
+ }
+#endif
+ end += start;
+ }
+
+#if !defined(ARCH_MIPS_USE_FLUSHCACHE_SYSCALL) && \
+ defined(GCC_VERSION) && (GCC_VERSION >= 40300)
+
+#if (__mips_isa_rev >= 2) && (GCC_VERSION < 40403)
+ /*
+ * Modify "start" and "end" to avoid GCC 4.3.0-4.4.2 bug in
+ * mips_expand_synci_loop that may execute synci one more time.
+ * "start" points to the first byte of the cache line.
+ * "end" points to the last byte of the line before the last cache line.
+ * Because size is always a multiple of 4, this is safe to set
+ * "end" to the last byte.
+ */
+ {
+ int lineSize;
+ asm("rdhwr %0, $1" : "=r" (lineSize));
+ start = start & (-lineSize);
+ end = (end & (-lineSize)) - 1;
+ }
+#endif
+ __builtin___clear_cache((char *)start, (char *)end);
+#else
+ _flush_cache((char *)start, end-start, BCACHE);
+#endif
+ return 0;
+}
diff --git a/libc/arch-mips64/bionic/crtbegin.c b/libc/arch-mips64/bionic/crtbegin.c
new file mode 100644
index 0000000..2ea31ad
--- /dev/null
+++ b/libc/arch-mips64/bionic/crtbegin.c
@@ -0,0 +1,94 @@
+/*
+ * Copyright (C) 2013 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include "../../bionic/libc_init_common.h"
+#include <stddef.h>
+#include <stdint.h>
+
+__attribute__ ((section (".preinit_array")))
+void (*__PREINIT_ARRAY__)(void) = (void (*)(void)) -1;
+
+__attribute__ ((section (".init_array")))
+void (*__INIT_ARRAY__)(void) = (void (*)(void)) -1;
+
+__attribute__ ((section (".fini_array")))
+void (*__FINI_ARRAY__)(void) = (void (*)(void)) -1;
+
+
+__LIBC_HIDDEN__ void do_mips_start(void *raw_args) {
+ structors_array_t array;
+ array.preinit_array = &__PREINIT_ARRAY__;
+ array.init_array = &__INIT_ARRAY__;
+ array.fini_array = &__FINI_ARRAY__;
+
+ __libc_init(raw_args, NULL, &main, &array);
+}
+
+/*
+ * This function prepares the return address with a branch-and-link
+ * instruction (bal) and then uses a .cpsetup to compute the Global
+ * Offset Table (GOT) pointer ($gp). The $gp is then used to load
+ * the address of _do_mips_start() into $t9 just before calling it.
+ * Terminating the stack with a NULL return address.
+ */
+__asm__ (
+" .set push \n"
+" \n"
+" .text \n"
+" .align 4 \n"
+" .type __start,@function \n"
+" .globl __start \n"
+" .globl _start \n"
+" \n"
+" .ent __start \n"
+"__start: \n"
+" _start: \n"
+" .frame $sp,32,$0 \n"
+" .mask 0x80000000,-8 \n"
+" \n"
+" move $a0, $sp \n"
+" daddiu $sp, $sp, -32 \n"
+" \n"
+" .set noreorder \n"
+" bal 1f \n"
+" nop \n"
+"1: \n"
+" .cpsetup $ra,16,1b \n"
+" .set reorder \n"
+" \n"
+" sd $0, 24($sp) \n"
+" jal do_mips_start \n"
+" \n"
+"2: b 2b \n"
+" .end __start \n"
+" \n"
+" .set pop \n"
+);
+
+#include "../../arch-common/bionic/__dso_handle.h"
+#include "atexit.h"
diff --git a/libc/arch-mips/bionic/memmove.c b/libc/arch-mips64/bionic/crtbegin_so.c
similarity index 72%
copy from libc/arch-mips/bionic/memmove.c
copy to libc/arch-mips64/bionic/crtbegin_so.c
index 1f4522b..d664ce6 100644
--- a/libc/arch-mips/bionic/memmove.c
+++ b/libc/arch-mips64/bionic/crtbegin_so.c
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2008 The Android Open Source Project
+ * Copyright (C) 2013 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -25,20 +25,14 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
-#include <string.h>
-#include <strings.h>
-void *memmove(void *dst, const void *src, size_t n)
-{
- const char *p = src;
- char *q = dst;
- /* We can use the optimized memcpy if the destination is completely below the
- * source (i.e. q + n <= p), or if it is completely over it (i.e. q >= p+n).
- */
- if (__builtin_expect((q + n < p) || (q >= p + n), 1)) {
- return memcpy(dst, src, n);
- } else {
- bcopy(src, dst, n);
- return dst;
- }
+extern void __cxa_finalize(void *);
+extern void *__dso_handle;
+
+__attribute__((visibility("hidden"),destructor))
+void __on_dlclose() {
+ __cxa_finalize(&__dso_handle);
}
+
+#include "../../arch-common/bionic/__dso_handle_so.h"
+#include "atexit.h"
diff --git a/libc/arch-mips64/bionic/futex_mips.S b/libc/arch-mips64/bionic/futex_mips.S
new file mode 100644
index 0000000..1a249a7
--- /dev/null
+++ b/libc/arch-mips64/bionic/futex_mips.S
@@ -0,0 +1,145 @@
+/*
+ * Copyright (C) 2008 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+#include <private/bionic_asm.h>
+
+#define FUTEX_WAIT 0
+#define FUTEX_WAKE 1
+
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+FRAMESZ = MKFSIZ(NARGSAVE+2,0)
+FRAME_A4 = 4*REGSZ
+FRAME_A5 = 5*REGSZ
+#else
+FRAMESZ = 0
+#endif
+
+// int __futex_wait(volatile void* ftx, int val, const struct timespec* timeout)
+LEAF(__futex_wait, FRAMESZ)
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+ PTR_SUBU sp, FRAMESZ
+ REG_S $0,FRAME_A5(sp) /* val3 */
+ REG_S $0,FRAME_A4(sp) /* addr2 */
+#else
+ move a5,$0 /* val3 */
+ move a4,$0 /* addr2 */
+#endif
+ move a3,a2 /* timespec */
+ move a2,a1 /* val */
+ LI a1,FUTEX_WAIT /* op */
+# move a0,a0 /* ftx */
+ LI v0,__NR_futex
+ syscall
+ neg v0 /* Negate errno */
+ bnez a3,1f /* Check for error */
+ move v0,$0 /* Return 0 if no error */
+1:
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+ PTR_ADDU sp,FRAMESZ
+#endif
+ j ra
+ END(__futex_wait)
+
+// int __futex_wake(volatile void* ftx, int count)
+LEAF(__futex_wake,FRAMESZ)
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+ PTR_SUBU sp, FRAMESZ
+ REG_S $0,FRAME_A5(sp) /* val3 */
+ REG_S $0,FRAME_A4(sp) /* addr2 */
+#else
+ move a5,$0 /* val3 */
+ move a4,$0 /* addr2 */
+#endif
+ move a3,$0 /* timespec */
+ move a2,a1 /* val */
+ LI a1,FUTEX_WAKE /* op */
+# move a0,a0 /* ftx */
+ LI v0,__NR_futex
+ syscall
+ neg v0 /* Negate errno */
+ bnez a3,1f /* Check for error */
+ move v0,$0 /* Return 0 if no error */
+1:
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+ PTR_ADDU sp,FRAMESZ
+#endif
+ j ra
+ END(__futex_wake)
+
+// int __futex_syscall3(volatile void* ftx, int op, int count)
+LEAF(__futex_syscall3,FRAMESZ)
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+ PTR_SUBU sp, FRAMESZ
+ REG_S $0,FRAME_A5(sp) /* val3 */
+ REG_S $0,FRAME_A4(sp) /* addr2 */
+#else
+ move a5,$0 /* val3 */
+ move a4,$0 /* addr2 */
+#endif
+ move a3,$0 /* timespec */
+# move a2,a2 /* val */
+# move a1,a1 /* op */
+# move a0,a0 /* ftx */
+ LI v0,__NR_futex
+ syscall
+ neg v0 /* Negate errno */
+ bnez a3,1f /* Check for error */
+ move v0,$0 /* Return 0 if no error */
+1:
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+ PTR_ADDU sp,FRAMESZ
+#endif
+ j ra
+ END(__futex_syscall3)
+
+// int __futex_syscall4(volatile void* ftx, int op, int val, const struct timespec* timeout)
+LEAF(__futex_syscall4,FRAMESZ)
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+ PTR_SUBU sp, FRAMESZ
+ REG_S $0,FRAME_A5(sp) /* val3 */
+ REG_S $0,FRAME_A4(sp) /* addr2 */
+#else
+ move a5,$0 /* val3 */
+ move a4,$0 /* addr2 */
+#endif
+# move a3,a3 /* timespec */
+# move a2,a2 /* val */
+# move a1,a1 /* op */
+# move a0,a0 /* ftx */
+ LI v0,__NR_futex
+ syscall
+ neg v0 /* Negate errno */
+ bnez a3,1f /* Check for error */
+ move v0,$0 /* Return 0 if no error */
+1:
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+ PTR_ADDU sp,FRAMESZ
+#endif
+ j ra
+ END(__futex_syscall4)
diff --git a/libc/arch-mips64/bionic/getdents.cpp b/libc/arch-mips64/bionic/getdents.cpp
new file mode 100644
index 0000000..66a61ec
--- /dev/null
+++ b/libc/arch-mips64/bionic/getdents.cpp
@@ -0,0 +1,97 @@
+/*
+ * Copyright (C) 2014 The Android Open Source Project
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in
+ * the documentation and/or other materials provided with the
+ * distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * The MIPS64 getdents64() system call is only present in 3.10+ kernels.
+ * If the getdents64() system call is not available fall back to using
+ * getdents() and modify the result to be compatible with getdents64().
+ */
+
+#include <dirent.h>
+
+#include <errno.h>
+#include <fcntl.h>
+#include <sys/stat.h>
+#include <sys/types.h>
+#include <unistd.h>
+
+
+/* The mips_getdents type is 64bit clean */
+struct mips_dirent {
+ uint64_t d_ino; /* Inode number */
+ uint64_t d_off; /* Offset to next mips_dirent */
+ uint16_t d_reclen; /* Length of this mips_dirent */
+ char d_name[]; /* Filename (null-terminated) */
+ /* length is actually (d_reclen - 2 -
+ offsetof(struct mips_dirent, d_name) */
+ // char pad; /* Zero padding byte */
+ // char d_type; /* File type (only since Linux 2.6.4; offset is (d_reclen - 1)) */
+};
+
+extern "C" int __getdents64(unsigned int fd, struct dirent *dirp, unsigned int count);
+extern "C" int __getdents(unsigned int fd, struct mips_dirent *dirp, unsigned int count);
+int getdents(unsigned int fd, struct dirent *dirp, unsigned int count)
+{
+ int r;
+ int oerrno = errno;
+
+ /* Use getdents64() if it is available */
+ r = __getdents64(fd, dirp, count);
+ if (r >= 0 || errno != ENOSYS)
+ return r;
+
+ /* Fallback to getdents() */
+ errno = oerrno;
+ r = __getdents(fd, (struct mips_dirent *)dirp, count);
+ if (r > 0) {
+ char *p;
+ char type;
+ union dirents {
+ struct mips_dirent m;
+ struct dirent d;
+ } *u;
+
+ p = (char *)dirp;
+ do {
+ u = (union dirents *)p;
+
+ /* This should not happen, but just in case... */
+ if (p + u->m.d_reclen > (char *)dirp + r)
+ break;
+
+ /* shuffle the dirent */
+ type = *(p + u->m.d_reclen - 1);
+ memmove(u->d.d_name, u->m.d_name,
+ u->m.d_reclen - 2 - offsetof(struct mips_dirent, d_name) + 1);
+ u->d.d_type = type;
+
+ p += u->m.d_reclen;
+ } while (p < (char *)dirp + r);
+ }
+ return r;
+}
diff --git a/libc/arch-mips/bionic/memmove.c b/libc/arch-mips64/bionic/memcmp16.S
similarity index 75%
rename from libc/arch-mips/bionic/memmove.c
rename to libc/arch-mips64/bionic/memcmp16.S
index 1f4522b..b70c078 100644
--- a/libc/arch-mips/bionic/memmove.c
+++ b/libc/arch-mips64/bionic/memcmp16.S
@@ -25,20 +25,29 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
-#include <string.h>
-#include <strings.h>
+ .text
-void *memmove(void *dst, const void *src, size_t n)
-{
- const char *p = src;
- char *q = dst;
- /* We can use the optimized memcpy if the destination is completely below the
- * source (i.e. q + n <= p), or if it is completely over it (i.e. q >= p+n).
- */
- if (__builtin_expect((q + n < p) || (q >= p + n), 1)) {
- return memcpy(dst, src, n);
- } else {
- bcopy(src, dst, n);
- return dst;
- }
-}
+#include <machine/asm.h>
+
+/*
+ * u4 __memcmp16(const u2* s0, const u2* s1, size_t count);
+ */
+LEAF(__memcmp16,0)
+ move t0,$0
+ move t1,$0
+ beqz a2,.L_done /* 0 length string */
+ beq a0,a1,.L_done /* strings are identical */
+
+ /* Unoptimised... */
+1: lhu t0,0(a0)
+ lhu t1,0(a1)
+ PTR_ADDU a1,2
+ bne t0,t1,.L_done
+ PTR_ADDU a0,2
+ SUBU a2,1
+ bnez a2,1b
+
+.L_done:
+ SUBU v0,t0,t1
+ j ra
+ END(__memcmp16)
diff --git a/libc/arch-mips64/bionic/setjmp.S b/libc/arch-mips64/bionic/setjmp.S
new file mode 100644
index 0000000..7c21195
--- /dev/null
+++ b/libc/arch-mips64/bionic/setjmp.S
@@ -0,0 +1,211 @@
+/* $OpenBSD: setjmp.S,v 1.5 2005/08/07 16:40:15 espie Exp $ */
+
+/*
+ * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of Opsycon AB nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#include <machine/asm.h>
+#include <machine/regnum.h>
+#include <machine/signal.h>
+
+/*
+ * setjmp, longjmp implementation for libc. this code depends
+ * on the layout of the struct sigcontext in machine/signal.h.
+ *
+ */
+
+FRAMESZ= MKFSIZ(2,6)
+A1OFF= FRAMESZ-4*REGSZ
+A0OFF= FRAMESZ-3*REGSZ
+GPOFF= FRAMESZ-2*REGSZ
+RAOFF= FRAMESZ-1*REGSZ
+
+#define FPREG64_S(FPR, OFF, BASE) \
+ swc1 FPR, OFF(BASE) ; \
+ mfhc1 t0, FPR ; \
+ sw t0, OFF+4(BASE) ;
+
+#define FPREG64_L(FPR, OFF, BASE) \
+ lw t0, OFF+4(BASE) ; \
+ lw t1, OFF(BASE) ; \
+ mtc1 t1, FPR ; \
+ mthc1 t0, FPR ; \
+
+NON_LEAF(setjmp, FRAMESZ, ra)
+ .mask 0x80000000, RAOFF
+ PTR_SUBU sp, FRAMESZ # allocate stack frame
+ SETUP_GP64(GPOFF, setjmp)
+ SAVE_GP(GPOFF)
+ .set reorder
+ REG_S ra, RAOFF(sp) # save state
+ REG_S a0, A0OFF(sp)
+
+ move a0, zero # get current signal mask
+ jal sigblock
+
+ REG_L v1, A0OFF(sp) # v1 = jmpbuf
+ REG_S v0, SC_MASK(v1) # save sc_mask = sigblock(0)
+
+ REG_L a0, A0OFF(sp) # restore jmpbuf
+ REG_L ra, RAOFF(sp)
+ REG_S ra, SC_PC(a0) # sc_pc = return address
+#if defined(__mips64)
+ dli v0, 0xACEDBADE # sigcontext magic number
+#else
+ li v0, 0xACEDBADE # sigcontext magic number
+#endif
+ REG_S v0, SC_REGS+ZERO*REGSZ(a0)
+ REG_S s0, SC_REGS+S0*REGSZ(a0)
+ REG_S s1, SC_REGS+S1*REGSZ(a0)
+ REG_S s2, SC_REGS+S2*REGSZ(a0)
+ REG_S s3, SC_REGS+S3*REGSZ(a0)
+ REG_S s4, SC_REGS+S4*REGSZ(a0)
+ REG_S s5, SC_REGS+S5*REGSZ(a0)
+ REG_S s6, SC_REGS+S6*REGSZ(a0)
+ REG_S s7, SC_REGS+S7*REGSZ(a0)
+ REG_S s8, SC_REGS+S8*REGSZ(a0)
+ REG_L v0, GPOFF(sp)
+ REG_S v0, SC_REGS+GP*REGSZ(a0)
+ PTR_ADDU v0, sp, FRAMESZ
+ REG_S v0, SC_REGS+SP*REGSZ(a0)
+
+#if !defined(SOFTFLOAT)
+ li v0, 1 # be nice if we could tell
+ REG_S v0, SC_FPUSED(a0) # sc_fpused = 1
+ cfc1 v0, $31
+#if _MIPS_FPSET == 32
+ FPREG64_S($f20, SC_FPREGS+((F20-F0)*REGSZ_FP), a0)
+ FPREG64_S($f21, SC_FPREGS+((F21-F0)*REGSZ_FP), a0)
+ FPREG64_S($f22, SC_FPREGS+((F22-F0)*REGSZ_FP), a0)
+ FPREG64_S($f23, SC_FPREGS+((F23-F0)*REGSZ_FP), a0)
+ FPREG64_S($f24, SC_FPREGS+((F24-F0)*REGSZ_FP), a0)
+ FPREG64_S($f25, SC_FPREGS+((F25-F0)*REGSZ_FP), a0)
+ FPREG64_S($f26, SC_FPREGS+((F26-F0)*REGSZ_FP), a0)
+ FPREG64_S($f27, SC_FPREGS+((F27-F0)*REGSZ_FP), a0)
+ FPREG64_S($f28, SC_FPREGS+((F28-F0)*REGSZ_FP), a0)
+ FPREG64_S($f29, SC_FPREGS+((F29-F0)*REGSZ_FP), a0)
+ FPREG64_S($f30, SC_FPREGS+((F30-F0)*REGSZ_FP), a0)
+ FPREG64_S($f31, SC_FPREGS+((F31-F0)*REGSZ_FP), a0)
+#else
+ swc1 $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
+ swc1 $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
+ swc1 $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
+ swc1 $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
+ swc1 $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
+ swc1 $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
+ swc1 $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
+ swc1 $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
+ swc1 $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
+ swc1 $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
+ swc1 $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
+ swc1 $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+#endif
+ REG_S v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
+#endif /* !SOFTFLOAT */
+ move v0, zero
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+ j ra
+
+botch:
+ jal longjmperror
+ jal abort
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+END(setjmp)
+
+
+LEAF(longjmp, FRAMESZ)
+ PTR_SUBU sp, FRAMESZ
+ SETUP_GP64(GPOFF, longjmp)
+ SAVE_GP(GPOFF)
+ .set reorder
+ sw a1, A1OFF(sp)
+ sw a0, A0OFF(sp)
+
+ lw a0, SC_MASK(a0)
+ jal sigsetmask
+
+ lw a0, A0OFF(sp)
+ lw a1, A1OFF(sp)
+
+ .set noreorder
+ REG_L v0, SC_REGS+ZERO*REGSZ(a0)
+ bne v0, 0xACEDBADE, botch # jump if error
+ REG_L ra, SC_PC(a0)
+ REG_L s0, SC_REGS+S0*REGSZ(a0)
+ REG_L s1, SC_REGS+S1*REGSZ(a0)
+ REG_L s2, SC_REGS+S2*REGSZ(a0)
+ REG_L s3, SC_REGS+S3*REGSZ(a0)
+ REG_L s4, SC_REGS+S4*REGSZ(a0)
+ REG_L s5, SC_REGS+S5*REGSZ(a0)
+ REG_L s6, SC_REGS+S6*REGSZ(a0)
+ REG_L s7, SC_REGS+S7*REGSZ(a0)
+ REG_L s8, SC_REGS+S8*REGSZ(a0)
+ REG_L gp, SC_REGS+GP*REGSZ(a0)
+ REG_L sp, SC_REGS+SP*REGSZ(a0)
+
+#if !defined(SOFTFLOAT)
+ REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
+ ctc1 v0, $31
+#if _MIPS_FPSET == 32
+ FPREG64_L($f20, SC_FPREGS+((F20-F0)*REGSZ_FP), a0)
+ FPREG64_L($f21, SC_FPREGS+((F21-F0)*REGSZ_FP), a0)
+ FPREG64_L($f22, SC_FPREGS+((F22-F0)*REGSZ_FP), a0)
+ FPREG64_L($f23, SC_FPREGS+((F23-F0)*REGSZ_FP), a0)
+ FPREG64_L($f24, SC_FPREGS+((F24-F0)*REGSZ_FP), a0)
+ FPREG64_L($f25, SC_FPREGS+((F25-F0)*REGSZ_FP), a0)
+ FPREG64_L($f26, SC_FPREGS+((F26-F0)*REGSZ_FP), a0)
+ FPREG64_L($f27, SC_FPREGS+((F27-F0)*REGSZ_FP), a0)
+ FPREG64_L($f28, SC_FPREGS+((F28-F0)*REGSZ_FP), a0)
+ FPREG64_L($f29, SC_FPREGS+((F29-F0)*REGSZ_FP), a0)
+ FPREG64_L($f30, SC_FPREGS+((F30-F0)*REGSZ_FP), a0)
+ FPREG64_L($f31, SC_FPREGS+((F31-F0)*REGSZ_FP), a0)
+#else
+ lwc1 $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
+ lwc1 $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
+ lwc1 $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
+ lwc1 $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
+ lwc1 $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
+ lwc1 $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
+ lwc1 $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
+ lwc1 $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
+ lwc1 $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0)
+ lwc1 $f29, SC_FPREGS+((F29-F0)*REGSZ_FP)(a0)
+ lwc1 $f30, SC_FPREGS+((F30-F0)*REGSZ_FP)(a0)
+ lwc1 $f31, SC_FPREGS+((F31-F0)*REGSZ_FP)(a0)
+#endif
+#endif /* !SOFTFLOAT */
+ bne a1, zero, 1f
+ nop
+ li a1, 1 # never return 0!
+1:
+ j ra
+ move v0, a1
+
+END(longjmp)
diff --git a/libc/arch-mips64/bionic/sigsetjmp.S b/libc/arch-mips64/bionic/sigsetjmp.S
new file mode 100644
index 0000000..b05454c
--- /dev/null
+++ b/libc/arch-mips64/bionic/sigsetjmp.S
@@ -0,0 +1,77 @@
+/* $OpenBSD: sigsetjmp.S,v 1.5 2005/08/07 16:40:15 espie Exp $ */
+/*-
+ * Copyright (c) 1991, 1993, 1995,
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Havard Eidnes.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <machine/asm.h>
+#include <machine/regnum.h>
+#include <machine/setjmp.h>
+
+/*
+ * trampolines for sigsetjmp and siglongjmp save and restore mask.
+ *
+ */
+FRAMESZ= MKFSIZ(1,1)
+GPOFF= FRAMESZ-2*REGSZ
+
+LEAF(sigsetjmp, FRAMESZ)
+ PTR_SUBU sp, FRAMESZ
+ SETUP_GP64(GPOFF, sigsetjmp)
+ .set reorder
+ REG_S a1, (_JBLEN*REGSZ)(a0) # save "savemask"
+ bne a1, 0x0, 1f # do saving of signal mask?
+ LA t9, _setjmp
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+ jr t9
+
+1: LA t9, setjmp
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+ jr t9
+END(sigsetjmp)
+
+LEAF(siglongjmp, FRAMESZ)
+ PTR_SUBU sp, FRAMESZ
+ SETUP_GP64(GPOFF, siglongjmp)
+ .set reorder
+ REG_L t0, (_JBLEN*REGSZ)(a0) # get "savemask"
+ bne t0, 0x0, 1f # restore signal mask?
+ LA t9, _longjmp
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+ jr t9
+1:
+ LA t9, longjmp
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+ jr t9
+END(siglongjmp)
diff --git a/libc/arch-mips/bionic/memmove.c b/libc/arch-mips64/bionic/syscall.S
similarity index 60%
copy from libc/arch-mips/bionic/memmove.c
copy to libc/arch-mips64/bionic/syscall.S
index 1f4522b..08aa705 100644
--- a/libc/arch-mips/bionic/memmove.c
+++ b/libc/arch-mips64/bionic/syscall.S
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2008 The Android Open Source Project
+ * Copyright (C) 2013 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -25,20 +25,45 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
-#include <string.h>
-#include <strings.h>
-void *memmove(void *dst, const void *src, size_t n)
-{
- const char *p = src;
- char *q = dst;
- /* We can use the optimized memcpy if the destination is completely below the
- * source (i.e. q + n <= p), or if it is completely over it (i.e. q >= p+n).
- */
- if (__builtin_expect((q + n < p) || (q >= p + n), 1)) {
- return memcpy(dst, src, n);
- } else {
- bcopy(src, dst, n);
- return dst;
- }
-}
+#include <machine/asm.h>
+#include <asm/unistd.h>
+
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+FRAMESZ = MKFSIZ(6,0)
+#else
+FRAMESZ = MKFSIZ(0,1)
+FRAME_GP = FRAMESZ-1*REGSZ
+#endif
+
+LEAF(syscall,FRAMESZ)
+ PTR_SUBU sp, FRAMESZ # allocate stack frame
+ SETUP_GP64(FRAME_GP,syscall)
+ SAVE_GP(FRAME_GP)
+ move v0, a0 # syscall number to v0
+ move a0, a1 # shift args down
+ move a1, a2
+ move a2, a3
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+ REG_L a3, FRAMESZ+4*REGSZ(sp)
+ REG_L t0, FRAMESZ+5*REGSZ(sp)
+ REG_L t1, FRAMESZ+6*REGSZ(sp)
+ REG_S t0, 4*REGSZ(sp)
+ REG_S t1, 5*REGSZ(sp)
+#else
+ move a3, a4
+ move a4, a5
+ REG_L a5, FRAMESZ(sp)
+#endif
+ syscall
+ move a0, v0
+ bnez a3, 1f
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+ j ra
+1:
+ LA t9,__set_errno
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+ j t9
+ END(syscall)
diff --git a/libc/arch-mips/bionic/memmove.c b/libc/arch-mips64/bionic/vfork.S
similarity index 64%
copy from libc/arch-mips/bionic/memmove.c
copy to libc/arch-mips64/bionic/vfork.S
index 1f4522b..c936945 100644
--- a/libc/arch-mips/bionic/memmove.c
+++ b/libc/arch-mips64/bionic/vfork.S
@@ -25,20 +25,48 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
-#include <string.h>
-#include <strings.h>
-void *memmove(void *dst, const void *src, size_t n)
-{
- const char *p = src;
- char *q = dst;
- /* We can use the optimized memcpy if the destination is completely below the
- * source (i.e. q + n <= p), or if it is completely over it (i.e. q >= p+n).
- */
- if (__builtin_expect((q + n < p) || (q >= p + n), 1)) {
- return memcpy(dst, src, n);
- } else {
- bcopy(src, dst, n);
- return dst;
- }
-}
+#include <machine/asm.h>
+#include <asm/unistd.h>
+#include <linux/sched.h>
+
+// TODO: mips' uapi signal.h is missing #ifndef __ASSEMBLY__.
+// #include <asm/signal.h>
+#define SIGCHLD 18
+
+ .text
+
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+FRAMESZ = MKFSIZ(5,0)
+#else
+FRAMESZ = MKFSIZ(0,0)
+#endif
+
+LEAF(vfork,FRAMESZ)
+#if FRAMESZ!=0
+ PTR_SUBU sp, FRAMESZ
+#endif
+ SETUP_GP64(a5,vfork)
+ LI a0, (CLONE_VM | CLONE_VFORK | SIGCHLD)
+ move a1, $0
+ move a2, $0
+ move a3, $0
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+ REG_S $0, 4*REGSZ(sp)
+#else
+ move a4, $0
+#endif
+ LI v0, __NR_clone
+ syscall
+#if FRAMESZ!=0
+ PTR_ADDU sp,FRAMESZ
+#endif
+ move a0, v0
+ bnez a3, 1f
+ RESTORE_GP64
+ j ra
+1:
+ LA t9,__set_errno
+ RESTORE_GP64
+ j t9
+ END(vfork)
diff --git a/libc/arch-mips64/include/machine/asm.h b/libc/arch-mips64/include/machine/asm.h
new file mode 100644
index 0000000..eabb1bf
--- /dev/null
+++ b/libc/arch-mips64/include/machine/asm.h
@@ -0,0 +1,305 @@
+/* $OpenBSD: asm.h,v 1.7 2004/10/20 12:49:15 pefo Exp $ */
+
+/*
+ * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+#ifndef _MIPS64_ASM_H
+#define _MIPS64_ASM_H
+
+#include <machine/regdef.h>
+
+#ifdef NEED_OLD_RM7KFIX
+#define ITLBNOPFIX nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
+#else
+#define ITLBNOPFIX nop;nop;nop;nop
+#endif
+
+#define _MIPS_ISA_MIPS1 1 /* R2000/R3000 */
+#define _MIPS_ISA_MIPS2 2 /* R4000/R6000 */
+#define _MIPS_ISA_MIPS3 3 /* R4000 */
+#define _MIPS_ISA_MIPS4 4 /* TFP (R1x000) */
+#ifdef __linux__
+#define _MIPS_ISA_MIPS5 5
+#define _MIPS_ISA_MIPS32 6
+#define _MIPS_ISA_MIPS64 7
+#else
+#define _MIPS_ISA_MIPS32 32 /* MIPS32 */
+#endif
+
+#if !defined(ABICALLS) && !defined(_NO_ABICALLS)
+#define ABICALLS .abicalls
+#endif
+
+#if defined(ABICALLS) && !defined(_KERNEL)
+ ABICALLS
+#endif
+
+#define _C_LABEL(x) x /* XXX Obsolete but keep for a while */
+
+#if !defined(__MIPSEL__) && !defined(__MIPSEB__)
+#error "__MIPSEL__ or __MIPSEB__ must be defined"
+#endif
+/*
+ * Define how to access unaligned data word
+ */
+#if defined(__MIPSEL__)
+#define LWLO lwl
+#define LWHI lwr
+#define SWLO swl
+#define SWHI swr
+#define LDLO ldl
+#define LDHI ldr
+#define SDLO sdl
+#define SDHI sdr
+#endif
+#if defined(__MIPSEB__)
+#define LWLO lwr
+#define LWHI lwl
+#define SWLO swr
+#define SWHI swl
+#define LDLO ldr
+#define LDHI ldl
+#define SDLO sdr
+#define SDHI sdl
+#endif
+
+/*
+ * Define programming environment for ABI.
+ */
+#if defined(ABICALLS) && !defined(_KERNEL) && !defined(_STANDALONE)
+
+#ifndef _MIPS_SIM
+#define _MIPS_SIM 1
+#define _ABIO32 1
+#endif
+#ifndef _MIPS_ISA
+#define _MIPS_ISA 2
+#define _MIPS_ISA_MIPS2 2
+#endif
+
+#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
+#define NARGSAVE 4
+
+#define SETUP_GP \
+ .set noreorder; \
+ .cpload t9; \
+ .set reorder;
+
+#define SAVE_GP(x) \
+ .cprestore x
+
+#define SETUP_GP64(gpoff, name)
+#define RESTORE_GP64
+#endif
+
+#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32)
+#define NARGSAVE 0
+
+#define SETUP_GP
+#define SAVE_GP(x)
+#define SETUP_GP64(gpoff, name) \
+ .cpsetup t9, gpoff, name
+#define RESTORE_GP64 \
+ .cpreturn
+#endif
+
+#define MKFSIZ(narg,locals) (((narg+locals)*REGSZ+31)&(~31))
+
+#else /* defined(ABICALLS) && !defined(_KERNEL) */
+
+#define NARGSAVE 4
+#define SETUP_GP
+#define SAVE_GP(x)
+
+#define ALIGNSZ 16 /* Stack layout alignment */
+#define FRAMESZ(sz) (((sz) + (ALIGNSZ-1)) & ~(ALIGNSZ-1))
+
+#endif
+
+/*
+ * Basic register operations based on selected ISA
+ */
+#if (_MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || _MIPS_ISA == _MIPS_ISA_MIPS32)
+#define REGSZ 4 /* 32 bit mode register size */
+#define LOGREGSZ 2 /* log rsize */
+#define REG_S sw
+#define REG_L lw
+#define CF_SZ 24 /* Call frame size */
+#define CF_ARGSZ 16 /* Call frame arg size */
+#define CF_RA_OFFS 20 /* Call ra save offset */
+#endif
+
+#if (_MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS64)
+#define REGSZ 8 /* 64 bit mode register size */
+#define LOGREGSZ 3 /* log rsize */
+#define REG_S sd
+#define REG_L ld
+#define CF_SZ 48 /* Call frame size (multiple of ALIGNSZ) */
+#define CF_ARGSZ 32 /* Call frame arg size */
+#define CF_RA_OFFS 40 /* Call ra save offset */
+#endif
+
+#define REGSZ_FP 8 /* 64 bit FP register size */
+
+#ifndef __LP64__
+#define PTR_L lw
+#define PTR_S sw
+#define PTR_SUB sub
+#define PTR_ADD add
+#define PTR_SUBU subu
+#define PTR_ADDU addu
+#define LI li
+#define LA la
+#define PTR_SLL sll
+#define PTR_SRL srl
+#define PTR_VAL .word
+#else
+#define PTR_L ld
+#define PTR_S sd
+#define PTR_ADD dadd
+#define PTR_SUB dsub
+#define PTR_SUBU dsubu
+#define PTR_ADDU daddu
+#define LI dli
+#define LA dla
+#define PTR_SLL dsll
+#define PTR_SRL dsrl
+#define PTR_VAL .dword
+#endif
+
+/*
+ * Define -pg profile entry code.
+ */
+#if defined(XGPROF) || defined(XPROF)
+#define MCOUNT \
+ PTR_SUBU sp, sp, 64; \
+ SAVE_GP(16); \
+ sd ra, 56(sp); \
+ sd gp, 48(sp); \
+ .set noat; \
+ .set noreorder; \
+ move AT, ra; \
+ jal _mcount; \
+ PTR_SUBU sp, sp, 16; \
+ ld ra, 56(sp); \
+ PTR_ADDU sp, sp, 64; \
+ .set reorder; \
+ .set at;
+#else
+#define MCOUNT
+#endif
+
+/*
+ * LEAF(x, fsize)
+ *
+ * Declare a leaf routine.
+ */
+#define LEAF(x, fsize) \
+ .align 3; \
+ .globl x; \
+ .ent x, 0; \
+x: ; \
+ .frame sp, fsize, ra; \
+ SETUP_GP \
+ MCOUNT
+
+#define ALEAF(x) \
+ .globl x; \
+x:
+
+/*
+ * NLEAF(x)
+ *
+ * Declare a non-profiled leaf routine.
+ */
+#define NLEAF(x, fsize) \
+ .align 3; \
+ .globl x; \
+ .ent x, 0; \
+x: ; \
+ .frame sp, fsize, ra; \
+ SETUP_GP
+
+/*
+ * NON_LEAF(x)
+ *
+ * Declare a non-leaf routine (a routine that makes other C calls).
+ */
+#define NON_LEAF(x, fsize, retpc) \
+ .align 3; \
+ .globl x; \
+ .ent x, 0; \
+x: ; \
+ .frame sp, fsize, retpc; \
+ SETUP_GP \
+ MCOUNT
+
+/*
+ * NNON_LEAF(x)
+ *
+ * Declare a non-profiled non-leaf routine
+ * (a routine that makes other C calls).
+ */
+#define NNON_LEAF(x, fsize, retpc) \
+ .align 3; \
+ .globl x; \
+ .ent x, 0; \
+x: ; \
+ .frame sp, fsize, retpc \
+ SETUP_GP
+
+/*
+ * END(x)
+ *
+ * Mark end of a procedure.
+ */
+#define END(x) \
+ .end x
+
+/*
+ * Macros to panic and printf from assembly language.
+ */
+#define PANIC(msg) \
+ LA a0, 9f; \
+ jal panic; \
+ nop ; \
+ MSG(msg)
+
+#define PRINTF(msg) \
+ LA a0, 9f; \
+ jal printf; \
+ nop ; \
+ MSG(msg)
+
+#define MSG(msg) \
+ .rdata; \
+9: .asciiz msg; \
+ .text
+
+#define ASMSTR(str) \
+ .asciiz str; \
+ .align 3
+
+#endif /* !_MIPS_ASM_H */
diff --git a/libc/arch-mips64/include/machine/elf_machdep.h b/libc/arch-mips64/include/machine/elf_machdep.h
new file mode 100644
index 0000000..d27d431
--- /dev/null
+++ b/libc/arch-mips64/include/machine/elf_machdep.h
@@ -0,0 +1,196 @@
+/* $NetBSD: elf_machdep.h,v 1.15 2011/03/15 07:39:22 matt Exp $ */
+
+#ifndef _MIPS_ELF_MACHDEP_H_
+#define _MIPS_ELF_MACHDEP_H_
+
+#ifdef _LP64
+#define ARCH_ELFSIZE 64 /* MD native binary size */
+#else
+#define ARCH_ELFSIZE 32 /* MD native binary size */
+#endif
+
+#if ELFSIZE == 32
+#define ELF32_MACHDEP_ID_CASES \
+ case EM_MIPS: \
+ break;
+
+#define ELF32_MACHDEP_ID EM_MIPS
+#elif ELFSIZE == 64
+#define ELF64_MACHDEP_ID_CASES \
+ case EM_MIPS: \
+ break;
+
+#define ELF64_MACHDEP_ID EM_MIPS
+#endif
+
+/* mips relocs. */
+
+#define R_MIPS_NONE 0
+#define R_MIPS_16 1
+#define R_MIPS_32 2
+#define R_MIPS_REL32 3
+#define R_MIPS_REL R_MIPS_REL32
+#define R_MIPS_26 4
+#define R_MIPS_HI16 5 /* high 16 bits of symbol value */
+#define R_MIPS_LO16 6 /* low 16 bits of symbol value */
+#define R_MIPS_GPREL16 7 /* GP-relative reference */
+#define R_MIPS_LITERAL 8 /* Reference to literal section */
+#define R_MIPS_GOT16 9 /* Reference to global offset table */
+#define R_MIPS_GOT R_MIPS_GOT16
+#define R_MIPS_PC16 10 /* 16 bit PC relative reference */
+#define R_MIPS_CALL16 11 /* 16 bit call thru glbl offset tbl */
+#define R_MIPS_CALL R_MIPS_CALL16
+#define R_MIPS_GPREL32 12
+
+/* 13, 14, 15 are not defined at this point. */
+#define R_MIPS_UNUSED1 13
+#define R_MIPS_UNUSED2 14
+#define R_MIPS_UNUSED3 15
+
+/*
+ * The remaining relocs are apparently part of the 64-bit Irix ELF ABI.
+ */
+#define R_MIPS_SHIFT5 16
+#define R_MIPS_SHIFT6 17
+
+#define R_MIPS_64 18
+#define R_MIPS_GOT_DISP 19
+#define R_MIPS_GOT_PAGE 20
+#define R_MIPS_GOT_OFST 21
+#define R_MIPS_GOT_HI16 22
+#define R_MIPS_GOT_LO16 23
+#define R_MIPS_SUB 24
+#define R_MIPS_INSERT_A 25
+#define R_MIPS_INSERT_B 26
+#define R_MIPS_DELETE 27
+#define R_MIPS_HIGHER 28
+#define R_MIPS_HIGHEST 29
+#define R_MIPS_CALL_HI16 30
+#define R_MIPS_CALL_LO16 31
+#define R_MIPS_SCN_DISP 32
+#define R_MIPS_REL16 33
+#define R_MIPS_ADD_IMMEDIATE 34
+#define R_MIPS_PJUMP 35
+#define R_MIPS_RELGOT 36
+#define R_MIPS_JALR 37
+/* TLS relocations */
+
+#define R_MIPS_TLS_DTPMOD32 38 /* Module number 32 bit */
+#define R_MIPS_TLS_DTPREL32 39 /* Module-relative offset 32 bit */
+#define R_MIPS_TLS_DTPMOD64 40 /* Module number 64 bit */
+#define R_MIPS_TLS_DTPREL64 41 /* Module-relative offset 64 bit */
+#define R_MIPS_TLS_GD 42 /* 16 bit GOT offset for GD */
+#define R_MIPS_TLS_LDM 43 /* 16 bit GOT offset for LDM */
+#define R_MIPS_TLS_DTPREL_HI16 44 /* Module-relative offset, high 16 bits */
+#define R_MIPS_TLS_DTPREL_LO16 45 /* Module-relative offset, low 16 bits */
+#define R_MIPS_TLS_GOTTPREL 46 /* 16 bit GOT offset for IE */
+#define R_MIPS_TLS_TPREL32 47 /* TP-relative offset, 32 bit */
+#define R_MIPS_TLS_TPREL64 48 /* TP-relative offset, 64 bit */
+#define R_MIPS_TLS_TPREL_HI16 49 /* TP-relative offset, high 16 bits */
+#define R_MIPS_TLS_TPREL_LO16 50 /* TP-relative offset, low 16 bits */
+
+#define R_MIPS_max 51
+
+#define R_TYPE(name) __CONCAT(R_MIPS_,name)
+
+#define R_MIPS16_min 100
+#define R_MIPS16_26 100
+#define R_MIPS16_GPREL 101
+#define R_MIPS16_GOT16 102
+#define R_MIPS16_CALL16 103
+#define R_MIPS16_HI16 104
+#define R_MIPS16_LO16 105
+#define R_MIPS16_max 106
+
+
+/* mips dynamic tags */
+
+#define DT_MIPS_RLD_VERSION 0x70000001
+#define DT_MIPS_TIME_STAMP 0x70000002
+#define DT_MIPS_ICHECKSUM 0x70000003
+#define DT_MIPS_IVERSION 0x70000004
+#define DT_MIPS_FLAGS 0x70000005
+#define DT_MIPS_BASE_ADDRESS 0x70000006
+#define DT_MIPS_CONFLICT 0x70000008
+#define DT_MIPS_LIBLIST 0x70000009
+#define DT_MIPS_CONFLICTNO 0x7000000b
+#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* number of local got ents */
+#define DT_MIPS_LIBLISTNO 0x70000010
+#define DT_MIPS_SYMTABNO 0x70000011 /* number of .dynsym entries */
+#define DT_MIPS_UNREFEXTNO 0x70000012
+#define DT_MIPS_GOTSYM 0x70000013 /* first dynamic sym in got */
+#define DT_MIPS_HIPAGENO 0x70000014
+#define DT_MIPS_RLD_MAP 0x70000016 /* address of loader map */
+
+/*
+ * ELF Flags
+ */
+#define EF_MIPS_PIC 0x00000002 /* Contains PIC code */
+#define EF_MIPS_CPIC 0x00000004 /* STD PIC calling sequence */
+#define EF_MIPS_ABI2 0x00000020 /* N32 */
+
+#define EF_MIPS_ARCH_ASE 0x0f000000 /* Architectural extensions */
+#define EF_MIPS_ARCH_MDMX 0x08000000 /* MDMX multimedia extension */
+#define EF_MIPS_ARCH_M16 0x04000000 /* MIPS-16 ISA extensions */
+
+#define EF_MIPS_ARCH 0xf0000000 /* Architecture field */
+#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code */
+#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code */
+#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code */
+#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code */
+#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code */
+#define EF_MIPS_ARCH_32 0x50000000 /* -mips32 code */
+#define EF_MIPS_ARCH_64 0x60000000 /* -mips64 code */
+#define EF_MIPS_ARCH_32R2 0x70000000 /* -mips32r2 code */
+#define EF_MIPS_ARCH_64R2 0x80000000 /* -mips64r2 code */
+
+#define EF_MIPS_ABI 0x0000f000
+#define EF_MIPS_ABI_O32 0x00001000
+#define EF_MIPS_ABI_O64 0x00002000
+#define EF_MIPS_ABI_EABI32 0x00003000
+#define EF_MIPS_ABI_EABI64 0x00004000
+
+#if defined(__MIPSEB__)
+#define ELF32_MACHDEP_ENDIANNESS ELFDATA2MSB
+#define ELF64_MACHDEP_ENDIANNESS ELFDATA2MSB
+#elif defined(__MIPSEL__)
+#define ELF32_MACHDEP_ENDIANNESS ELFDATA2LSB
+#define ELF64_MACHDEP_ENDIANNESS ELFDATA2LSB
+#elif !defined(HAVE_NBTOOL_CONFIG_H)
+#error neither __MIPSEL__ nor __MIPSEB__ are defined.
+#endif
+
+#ifdef _KERNEL
+#ifdef _KERNEL_OPT
+#include "opt_compat_netbsd.h"
+#endif
+#ifdef COMPAT_16
+/*
+ * Up to 1.6, the ELF dynamic loader (ld.elf_so) was not relocatable.
+ * Tell the kernel ELF exec code not to try relocating the interpreter
+ * for dynamically-linked ELF binaries.
+ */
+#define ELF_INTERP_NON_RELOCATABLE
+#endif /* COMPAT_16 */
+
+/*
+ * We need to be able to include the ELF header so we can pick out the
+ * ABI being used.
+ */
+#ifdef ELFSIZE
+#define ELF_MD_PROBE_FUNC ELFNAME2(mips_netbsd,probe)
+#define ELF_MD_COREDUMP_SETUP ELFNAME2(coredump,setup)
+#endif
+
+struct exec_package;
+
+int mips_netbsd_elf32_probe(struct lwp *, struct exec_package *, void *, char *,
+ vaddr_t *);
+void coredump_elf32_setup(struct lwp *, void *);
+
+int mips_netbsd_elf64_probe(struct lwp *, struct exec_package *, void *, char *,
+ vaddr_t *);
+void coredump_elf64_setup(struct lwp *, void *);
+#endif /* _KERNEL */
+
+#endif /* _MIPS_ELF_MACHDEP_H_ */
diff --git a/libc/arch-mips64/include/machine/endian.h b/libc/arch-mips64/include/machine/endian.h
new file mode 100644
index 0000000..41a9004
--- /dev/null
+++ b/libc/arch-mips64/include/machine/endian.h
@@ -0,0 +1,70 @@
+/* $OpenBSD: endian.h,v 1.5 2006/02/27 23:35:59 miod Exp $ */
+
+/*
+ * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef _MIPS64_ENDIAN_H_
+#define _MIPS64_ENDIAN_H_
+
+#ifdef __GNUC__
+
+#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
+#define __swap16md(x) ({ \
+ register uint16_t _x = (x); \
+ register uint16_t _r; \
+ __asm volatile ("wsbh %0, %1" : "=r" (_r) : "r" (_x)); \
+ _r; \
+})
+
+#define __swap32md(x) ({ \
+ register uint32_t _x = (x); \
+ register uint32_t _r; \
+ __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
+ _r; \
+})
+
+#define __swap64md(x) ({ \
+ uint64_t _swap64md_x = (x); \
+ (uint64_t) __swap32md(_swap64md_x >> 32) | \
+ (uint64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \
+})
+
+/* Tell sys/endian.h we have MD variants of the swap macros. */
+#define MD_SWAP
+
+#endif /* __mips32r2__ */
+#endif /* __GNUC__ */
+
+#if defined(__MIPSEB__)
+#define _BYTE_ORDER _BIG_ENDIAN
+#else
+#define _BYTE_ORDER _LITTLE_ENDIAN
+#endif
+#define __STRICT_ALIGNMENT
+#include <sys/types.h>
+#include <sys/endian.h>
+
+#endif /* _MIPS64_ENDIAN_H_ */
diff --git a/libc/arch-mips64/include/machine/exec.h b/libc/arch-mips64/include/machine/exec.h
new file mode 100644
index 0000000..3c63f74
--- /dev/null
+++ b/libc/arch-mips64/include/machine/exec.h
@@ -0,0 +1,188 @@
+/* $OpenBSD: exec.h,v 1.1 2004/10/18 19:05:36 grange Exp $ */
+
+/*
+ * Copyright (c) 1996-2004 Per Fogelstrom, Opsycon AB
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef _MIPS64_EXEC_H_
+#define _MIPS64_EXEC_H_
+
+#define __LDPGSZ 4096
+
+/*
+ * Define what exec "formats" we should handle.
+ */
+#define NATIVE_EXEC_ELF
+#define NATIVE_ELFSIZE 64
+#define EXEC_SCRIPT
+
+/*
+ * If included from sys/exec.h define kernels ELF format.
+ */
+#ifdef __LP64__
+#define ARCH_ELFSIZE 64
+#define DB_ELFSIZE 64
+#define ELF_TARG_CLASS ELFCLASS64
+#else
+#define ARCH_ELFSIZE 32
+#define DB_ELFSIZE 32
+#define ELF_TARG_CLASS ELFCLASS32
+#endif
+
+#if defined(__MIPSEB__)
+#define ELF_TARG_DATA ELFDATA2MSB
+#else
+#define ELF_TARG_DATA ELFDATA2LSB
+#endif
+#define ELF_TARG_MACH EM_MIPS
+
+#define _NLIST_DO_ELF
+
+#if defined(_LP64)
+#define _KERN_DO_ELF64
+#if defined(COMPAT_O32)
+#define _KERN_DO_ELF
+#endif
+#else
+#define _KERN_DO_ELF
+#endif
+
+/* Information taken from MIPS ABI supplemental */
+
+/* Architecture dependent Segment types - p_type */
+#define PT_MIPS_REGINFO 0x70000000 /* Register usage information */
+
+/* Architecture dependent d_tag field for Elf32_Dyn. */
+#define DT_MIPS_RLD_VERSION 0x70000001 /* Runtime Linker Interface ID */
+#define DT_MIPS_TIME_STAMP 0x70000002 /* Timestamp */
+#define DT_MIPS_ICHECKSUM 0x70000003 /* Cksum of ext. str. and com. sizes */
+#define DT_MIPS_IVERSION 0x70000004 /* Version string (string tbl index) */
+#define DT_MIPS_FLAGS 0x70000005 /* Flags */
+#define DT_MIPS_BASE_ADDRESS 0x70000006 /* Segment base address */
+#define DT_MIPS_CONFLICT 0x70000008 /* Adr of .conflict section */
+#define DT_MIPS_LIBLIST 0x70000009 /* Address of .liblist section */
+#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* Number of local .GOT entries */
+#define DT_MIPS_CONFLICTNO 0x7000000b /* Number of .conflict entries */
+#define DT_MIPS_LIBLISTNO 0x70000010 /* Number of .liblist entries */
+#define DT_MIPS_SYMTABNO 0x70000011 /* Number of .dynsym entries */
+#define DT_MIPS_UNREFEXTNO 0x70000012 /* First external DYNSYM */
+#define DT_MIPS_GOTSYM 0x70000013 /* First GOT entry in .dynsym */
+#define DT_MIPS_HIPAGENO 0x70000014 /* Number of GOT page table entries */
+#define DT_MIPS_RLD_MAP 0x70000016 /* Address of debug map pointer */
+
+#define DT_PROCNUM (DT_MIPS_RLD_MAP - DT_LOPROC + 1)
+
+/*
+ * Legal values for e_flags field of Elf32_Ehdr.
+ */
+#define EF_MIPS_NOREORDER 0x00000001 /* .noreorder was used */
+#define EF_MIPS_PIC 0x00000002 /* Contains PIC code */
+#define EF_MIPS_CPIC 0x00000004 /* Uses PIC calling sequence */
+#define EF_MIPS_ABI2 0x00000020 /* -n32 on Irix 6 */
+#define EF_MIPS_32BITMODE 0x00000100 /* 64 bit in 32 bit mode... */
+#define EF_MIPS_ARCH 0xf0000000 /* MIPS architecture level */
+#define E_MIPS_ARCH_1 0x00000000
+#define E_MIPS_ARCH_2 0x10000000
+#define E_MIPS_ARCH_3 0x20000000
+#define E_MIPS_ARCH_4 0x30000000
+#define EF_MIPS_ABI 0x0000f000 /* ABI level */
+#define E_MIPS_ABI_NONE 0x00000000 /* ABI level not set */
+#define E_MIPS_ABI_O32 0x00001000
+#define E_MIPS_ABI_O64 0x00002000
+#define E_MIPS_ABI_EABI32 0x00004000
+#define E_MIPS_ABI_EABI64 0x00004000
+
+/*
+ * Mips special sections.
+ */
+#define SHN_MIPS_ACOMMON 0xff00 /* Allocated common symbols */
+#define SHN_MIPS_SCOMMON 0xff03 /* Small common symbols */
+#define SHN_MIPS_SUNDEFINED 0xff04 /* Small undefined symbols */
+
+/*
+ * Legal values for sh_type field of Elf32_Shdr.
+ */
+#define SHT_MIPS_LIBLIST 0x70000000 /* Shared objects used in link */
+#define SHT_MIPS_CONFLICT 0x70000002 /* Conflicting symbols */
+#define SHT_MIPS_GPTAB 0x70000003 /* Global data area sizes */
+#define SHT_MIPS_UCODE 0x70000004 /* Reserved for SGI/MIPS compilers */
+#define SHT_MIPS_DEBUG 0x70000005 /* MIPS ECOFF debugging information */
+#define SHT_MIPS_REGINFO 0x70000006 /* Register usage information */
+
+/*
+ * Legal values for sh_flags field of Elf32_Shdr.
+ */
+#define SHF_MIPS_GPREL 0x10000000 /* Must be part of global data area */
+
+#if 0
+/*
+ * Entries found in sections of type SHT_MIPS_GPTAB.
+ */
+typedef union {
+ struct {
+ Elf32_Word gt_current_g_value; /* -G val used in compilation */
+ Elf32_Word gt_unused; /* Not used */
+ } gt_header; /* First entry in section */
+ struct {
+ Elf32_Word gt_g_value; /* If this val were used for -G */
+ Elf32_Word gt_bytes; /* This many bytes would be used */
+ } gt_entry; /* Subsequent entries in section */
+} Elf32_gptab;
+
+/*
+ * Entry found in sections of type SHT_MIPS_REGINFO.
+ */
+typedef struct {
+ Elf32_Word ri_gprmask; /* General registers used */
+ Elf32_Word ri_cprmask[4]; /* Coprocessor registers used */
+ Elf32_Sword ri_gp_value; /* $gp register value */
+} Elf32_RegInfo;
+#endif
+
+
+/*
+ * Mips relocations.
+ */
+
+#define R_MIPS_NONE 0 /* No reloc */
+#define R_MIPS_16 1 /* Direct 16 bit */
+#define R_MIPS_32 2 /* Direct 32 bit */
+#define R_MIPS_REL32 3 /* PC relative 32 bit */
+#define R_MIPS_26 4 /* Direct 26 bit shifted */
+#define R_MIPS_HI16 5 /* High 16 bit */
+#define R_MIPS_LO16 6 /* Low 16 bit */
+#define R_MIPS_GPREL16 7 /* GP relative 16 bit */
+#define R_MIPS_LITERAL 8 /* 16 bit literal entry */
+#define R_MIPS_GOT16 9 /* 16 bit GOT entry */
+#define R_MIPS_PC16 10 /* PC relative 16 bit */
+#define R_MIPS_CALL16 11 /* 16 bit GOT entry for function */
+#define R_MIPS_GPREL32 12 /* GP relative 32 bit */
+
+#define R_MIPS_64 18
+
+#define R_MIPS_REL32_64 ((R_MIPS_64 << 8) | R_MIPS_REL32)
+
+
+#endif /* !_MIPS64_EXEC_H_ */
diff --git a/libc/arch-mips64/include/machine/ieee.h b/libc/arch-mips64/include/machine/ieee.h
new file mode 100644
index 0000000..520a77b
--- /dev/null
+++ b/libc/arch-mips64/include/machine/ieee.h
@@ -0,0 +1,169 @@
+/* $OpenBSD: ieee.h,v 1.4 2010/01/23 19:11:21 miod Exp $ */
+
+/*
+ * Copyright (c) 1992, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This software was developed by the Computer Systems Engineering group
+ * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
+ * contributed to Berkeley.
+ *
+ * All advertising materials mentioning features or use of this software
+ * must display the following acknowledgement:
+ * This product includes software developed by the University of
+ * California, Lawrence Berkeley Laboratory.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)ieee.h 8.1 (Berkeley) 6/11/93
+ */
+
+/*
+ * ieee.h defines the machine-dependent layout of the machine's IEEE
+ * floating point. It does *not* define (yet?) any of the rounding
+ * mode bits, exceptions, and so forth.
+ */
+
+/*
+ * Define the number of bits in each fraction and exponent.
+ *
+ * k k+1
+ * Note that 1.0 x 2 == 0.1 x 2 and that denorms are represented
+ *
+ * (-exp_bias+1)
+ * as fractions that look like 0.fffff x 2 . This means that
+ *
+ * -126
+ * the number 0.10000 x 2 , for instance, is the same as the normalized
+ *
+ * -127 -128
+ * float 1.0 x 2 . Thus, to represent 2 , we need one leading zero
+ *
+ * -129
+ * in the fraction; to represent 2 , we need two, and so on. This
+ *
+ * (-exp_bias-fracbits+1)
+ * implies that the smallest denormalized number is 2
+ *
+ * for whichever format we are talking about: for single precision, for
+ *
+ * -126 -149
+ * instance, we get .00000000000000000000001 x 2 , or 1.0 x 2 , and
+ *
+ * -149 == -127 - 23 + 1.
+ */
+#define SNG_EXPBITS 8
+#define SNG_FRACBITS 23
+
+#define DBL_EXPBITS 11
+#define DBL_FRACHBITS 20
+#define DBL_FRACLBITS 32
+#define DBL_FRACBITS 52
+
+#define EXT_EXPBITS 15
+#define EXT_FRACHBITS 16
+#define EXT_FRACHMBITS 32
+#define EXT_FRACLMBITS 32
+#define EXT_FRACLBITS 32
+#define EXT_FRACBITS 112
+
+#define EXT_IMPLICIT_NBIT
+
+#define EXT_TO_ARRAY32(p, a) do { \
+ (a)[0] = (uint32_t)(p)->ext_fracl; \
+ (a)[1] = (uint32_t)(p)->ext_fraclm; \
+ (a)[2] = (uint32_t)(p)->ext_frachm; \
+ (a)[3] = (uint32_t)(p)->ext_frach; \
+} while(0)
+
+struct ieee_single {
+#ifdef __MIPSEB__
+ u_int sng_sign:1;
+ u_int sng_exp:8;
+ u_int sng_frac:23;
+#else
+ u_int sng_frac:23;
+ u_int sng_exp:8;
+ u_int sng_sign:1;
+#endif
+};
+
+struct ieee_double {
+#ifdef __MIPSEB__
+ u_int dbl_sign:1;
+ u_int dbl_exp:11;
+ u_int dbl_frach:20;
+ u_int dbl_fracl;
+#else
+ u_int dbl_fracl;
+ u_int dbl_frach:20;
+ u_int dbl_exp:11;
+ u_int dbl_sign:1;
+#endif
+};
+
+struct ieee_ext {
+#ifdef __MIPSEB__
+ u_int ext_sign:1;
+ u_int ext_exp:15;
+ u_int ext_frach:16;
+ u_int ext_frachm;
+ u_int ext_fraclm;
+ u_int ext_fracl;
+#else
+ u_int ext_fracl;
+ u_int ext_fraclm;
+ u_int ext_frachm;
+ u_int ext_frach:16;
+ u_int ext_exp:15;
+ u_int ext_sign:1;
+#endif
+};
+
+/*
+ * Floats whose exponent is in [1..INFNAN) (of whatever type) are
+ * `normal'. Floats whose exponent is INFNAN are either Inf or NaN.
+ * Floats whose exponent is zero are either zero (iff all fraction
+ * bits are zero) or subnormal values.
+ *
+ * A NaN is a `signalling NaN' if its QUIETNAN bit is clear in its
+ * high fraction; if the bit is set, it is a `quiet NaN'.
+ */
+#define SNG_EXP_INFNAN 255
+#define DBL_EXP_INFNAN 2047
+#define EXT_EXP_INFNAN 32767
+
+#if 0
+#define SNG_QUIETNAN (1 << 22)
+#define DBL_QUIETNAN (1 << 19)
+#define EXT_QUIETNAN (1 << 15)
+#endif
+
+/*
+ * Exponent biases.
+ */
+#define SNG_EXP_BIAS 127
+#define DBL_EXP_BIAS 1023
+#define EXT_EXP_BIAS 16383
diff --git a/libc/arch-mips64/include/machine/limits.h b/libc/arch-mips64/include/machine/limits.h
new file mode 100644
index 0000000..339444d
--- /dev/null
+++ b/libc/arch-mips64/include/machine/limits.h
@@ -0,0 +1,62 @@
+/* $OpenBSD: limits.h,v 1.5 2007/05/07 20:51:07 kettenis Exp $ */
+
+/*
+ * Copyright (c) 1988, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)limits.h 8.3 (Berkeley) 1/4/94
+ */
+
+#ifndef _MIPS_LIMITS_H_
+#define _MIPS_LIMITS_H_
+
+#include <sys/cdefs.h>
+
+#define MB_LEN_MAX 6 /* Allow 31 bit UTF2 */
+
+#ifndef SIZE_MAX
+#define SIZE_MAX ULONG_MAX /* max value for a size_t */
+#endif
+#define SSIZE_MAX LONG_MAX /* max value for a ssize_t */
+
+#if __BSD_VISIBLE
+#define SIZE_T_MAX ULONG_MAX /* max value for a size_t (historic) */
+
+/* Quads and longs are the same on mips64 */
+#define UQUAD_MAX (ULONG_MAX) /* max value for a uquad_t */
+#define QUAD_MAX (LONG_MAX) /* max value for a quad_t */
+#define QUAD_MIN (LONG_MIN) /* min value for a quad_t */
+
+#endif /* __BSD_VISIBLE */
+
+
+#define LONGLONG_BIT 64
+#define LONGLONG_MIN (-9223372036854775807LL-1)
+#define LONGLONG_MAX 9223372036854775807LL
+#define ULONGLONG_MAX 18446744073709551615ULL
+
+#endif /* !_MIPS_LIMITS_H_ */
diff --git a/libc/arch-mips64/include/machine/regdef.h b/libc/arch-mips64/include/machine/regdef.h
new file mode 100644
index 0000000..3a7cd68
--- /dev/null
+++ b/libc/arch-mips64/include/machine/regdef.h
@@ -0,0 +1,99 @@
+/* $OpenBSD: regdef.h,v 1.3 2005/08/07 07:29:44 miod Exp $ */
+
+/*
+ * Copyright (c) 1992, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Ralph Campbell. This file is derived from the MIPS RISC
+ * Architecture book by Gerry Kane.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)regdef.h 8.1 (Berkeley) 6/10/93
+ */
+#ifndef _MIPS_REGDEF_H_
+#define _MIPS_REGDEF_H_
+
+#if (_MIPS_SIM == _ABI64) && !defined(__mips_n64)
+#define __mips_n64 1
+#endif
+#if (_MIPS_SIM == _ABIN32) && !defined(__mips_n32)
+#define __mips_n32 1
+#endif
+
+#define zero $0 /* always zero */
+#define AT $at /* assembler temp */
+#define v0 $2 /* return value */
+#define v1 $3
+#define a0 $4 /* argument registers */
+#define a1 $5
+#define a2 $6
+#define a3 $7
+#if defined(__mips_n32) || defined(__mips_n64)
+#define a4 $8 /* expanded register arguments */
+#define a5 $9
+#define a6 $10
+#define a7 $11
+#define ta0 $8 /* alias */
+#define ta1 $9
+#define ta2 $10
+#define ta3 $11
+#define t0 $12 /* temp registers (not saved across subroutine calls) */
+#define t1 $13
+#define t2 $14
+#define t3 $15
+#else
+#define t0 $8 /* temp registers (not saved across subroutine calls) */
+#define t1 $9
+#define t2 $10
+#define t3 $11
+#define t4 $12
+#define t5 $13
+#define t6 $14
+#define t7 $15
+#define ta0 $12 /* alias */
+#define ta1 $13
+#define ta2 $14
+#define ta3 $15
+#endif
+#define s0 $16 /* saved across subroutine calls (callee saved) */
+#define s1 $17
+#define s2 $18
+#define s3 $19
+#define s4 $20
+#define s5 $21
+#define s6 $22
+#define s7 $23
+#define t8 $24 /* two more temp registers */
+#define t9 $25
+#define k0 $26 /* kernel temporary */
+#define k1 $27
+#define gp $28 /* global pointer */
+#define sp $29 /* stack pointer */
+#define s8 $30 /* one more callee saved */
+#define ra $31 /* return address */
+
+#endif /* !_MIPS_REGDEF_H_ */
diff --git a/libc/arch-mips64/include/machine/regnum.h b/libc/arch-mips64/include/machine/regnum.h
new file mode 100644
index 0000000..bfe1280
--- /dev/null
+++ b/libc/arch-mips64/include/machine/regnum.h
@@ -0,0 +1,119 @@
+/* $OpenBSD: regnum.h,v 1.3 2004/08/10 20:28:13 deraadt Exp $ */
+
+/*
+ * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
+ * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ */
+
+#ifndef _MIPS64_REGNUM_H_
+#define _MIPS64_REGNUM_H_
+
+/*
+ * Location of the saved registers relative to ZERO.
+ * Usage is p->p_regs[XX].
+ */
+#define ZERO 0
+#define AST 1
+#define V0 2
+#define V1 3
+#define A0 4
+#define A1 5
+#define A2 6
+#define A3 7
+#define T0 8
+#define T1 9
+#define T2 10
+#define T3 11
+#define T4 12
+#define T5 13
+#define T6 14
+#define T7 15
+#define S0 16
+#define S1 17
+#define S2 18
+#define S3 19
+#define S4 20
+#define S5 21
+#define S6 22
+#define S7 23
+#define T8 24
+#define T9 25
+#define K0 26
+#define K1 27
+#define GP 28
+#define SP 29
+#define S8 30
+#define RA 31
+#define SR 32
+#define PS SR /* alias for SR */
+#define MULLO 33
+#define MULHI 34
+#define BADVADDR 35
+#define CAUSE 36
+#define PC 37
+#define IC 38
+#define CPL 39
+
+#define NUMSAVEREGS 40 /* Number of registers saved in trap */
+
+#define FPBASE NUMSAVEREGS
+#define F0 (FPBASE+0)
+#define F1 (FPBASE+1)
+#define F2 (FPBASE+2)
+#define F3 (FPBASE+3)
+#define F4 (FPBASE+4)
+#define F5 (FPBASE+5)
+#define F6 (FPBASE+6)
+#define F7 (FPBASE+7)
+#define F8 (FPBASE+8)
+#define F9 (FPBASE+9)
+#define F10 (FPBASE+10)
+#define F11 (FPBASE+11)
+#define F12 (FPBASE+12)
+#define F13 (FPBASE+13)
+#define F14 (FPBASE+14)
+#define F15 (FPBASE+15)
+#define F16 (FPBASE+16)
+#define F17 (FPBASE+17)
+#define F18 (FPBASE+18)
+#define F19 (FPBASE+19)
+#define F20 (FPBASE+20)
+#define F21 (FPBASE+21)
+#define F22 (FPBASE+22)
+#define F23 (FPBASE+23)
+#define F24 (FPBASE+24)
+#define F25 (FPBASE+25)
+#define F26 (FPBASE+26)
+#define F27 (FPBASE+27)
+#define F28 (FPBASE+28)
+#define F29 (FPBASE+29)
+#define F30 (FPBASE+30)
+#define F31 (FPBASE+31)
+#define FSR (FPBASE+32)
+
+#define NUMFPREGS 33
+
+#define NREGS (NUMSAVEREGS + NUMFPREGS)
+
+#endif /* !_MIPS64_REGNUM_H_ */
diff --git a/libc/arch-mips64/include/machine/setjmp.h b/libc/arch-mips64/include/machine/setjmp.h
new file mode 100644
index 0000000..55ba7be
--- /dev/null
+++ b/libc/arch-mips64/include/machine/setjmp.h
@@ -0,0 +1,10 @@
+/* $OpenBSD: setjmp.h,v 1.2 2004/08/10 21:10:56 pefo Exp $ */
+
+/* Public domain */
+
+#ifndef _MIPS_SETJMP_H_
+#define _MIPS_SETJMP_H_
+
+#define _JBLEN 157 /* size, in longs, of a jmp_buf */
+
+#endif /* !_MIPS_SETJMP_H_ */
diff --git a/libc/arch-mips64/include/machine/signal.h b/libc/arch-mips64/include/machine/signal.h
new file mode 100644
index 0000000..f02ec0d
--- /dev/null
+++ b/libc/arch-mips64/include/machine/signal.h
@@ -0,0 +1,53 @@
+/* $OpenBSD: signal.h,v 1.8 2006/01/09 18:18:37 millert Exp $ */
+
+/*
+ * Copyright (c) 1992, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Ralph Campbell.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)signal.h 8.1 (Berkeley) 6/10/93
+ */
+
+#ifndef _MIPS_SIGNAL_H_
+#define _MIPS_SIGNAL_H_
+
+#include <machine/asm.h>
+
+#define SC_REGMASK (0*REGSZ)
+#define SC_STATUS (1*REGSZ)
+#define SC_PC (2*REGSZ)
+#define SC_REGS (SC_PC+8)
+#define SC_FPREGS (SC_REGS+32*8)
+#define SC_ACX (SC_FPREGS+32*REGSZ_FP)
+#define SC_USED_MATH (SC_ACX+3*REGSZ)
+/* OpenBSD compatibility */
+#define SC_MASK SC_REGMASK
+#define SC_FPUSED SC_USED_MATH
+
+#endif /* !_MIPS_SIGNAL_H_ */
diff --git a/libc/arch-mips64/mips64.mk b/libc/arch-mips64/mips64.mk
new file mode 100644
index 0000000..fa09caa
--- /dev/null
+++ b/libc/arch-mips64/mips64.mk
@@ -0,0 +1,28 @@
+_LIBC_ARCH_COMMON_SRC_FILES := \
+ arch-mips64/bionic/__bionic_clone.S \
+ arch-mips64/bionic/bzero.S \
+ arch-mips64/bionic/cacheflush.cpp \
+ arch-mips64/bionic/_exit_with_stack_teardown.S \
+ arch-mips64/bionic/futex_mips.S \
+ arch-mips64/bionic/__get_sp.S \
+ arch-mips64/bionic/getdents.cpp \
+ arch-mips64/bionic/memcmp16.S \
+ arch-mips64/bionic/_setjmp.S \
+ arch-mips64/bionic/setjmp.S \
+ arch-mips64/bionic/__set_tls.c \
+ arch-mips64/bionic/sigsetjmp.S \
+ arch-mips64/bionic/syscall.S \
+ arch-mips64/bionic/vfork.S \
+
+# FIXME TODO
+## _LIBC_ARCH_COMMON_SRC_FILES += arch-mips64/string/memcpy.S
+## _LIBC_ARCH_COMMON_SRC_FILES += arch-mips64/string/memset.S
+## _LIBC_ARCH_COMMON_SRC_FILES += arch-mips64/string/mips_strlen.c
+_LIBC_ARCH_COMMON_SRC_FILES += bionic/memcpy.c
+_LIBC_ARCH_COMMON_SRC_FILES += bionic/memset.c
+_LIBC_ARCH_COMMON_SRC_FILES += string/strlen.c
+
+_LIBC_ARCH_STATIC_SRC_FILES := \
+ bionic/dl_iterate_phdr_static.c \
+
+_LIBC_ARCH_DYNAMIC_SRC_FILES :=
diff --git a/libc/arch-mips64/string/memcpy.S b/libc/arch-mips64/string/memcpy.S
new file mode 100644
index 0000000..aabdfcf
--- /dev/null
+++ b/libc/arch-mips64/string/memcpy.S
@@ -0,0 +1,423 @@
+/*
+ * Copyright (c) 2009
+ * MIPS Technologies, Inc., California.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/************************************************************************
+ *
+ * memcpy.S
+ * Version: "043009"
+ *
+ ************************************************************************/
+
+
+/************************************************************************
+ * Include files
+ ************************************************************************/
+
+#include "machine/asm.h"
+
+
+/*
+ * This routine could be optimized for MIPS64. The current code only
+ * uses MIPS32 instructions.
+ */
+#if defined(__MIPSEB__)
+# define LWHI lwl /* high part is left in big-endian */
+# define SWHI swl /* high part is left in big-endian */
+# define LWLO lwr /* low part is right in big-endian */
+# define SWLO swr /* low part is right in big-endian */
+#endif
+
+#if defined(__MIPSEL__)
+# define LWHI lwr /* high part is right in little-endian */
+# define SWHI swr /* high part is right in little-endian */
+# define LWLO lwl /* low part is left in big-endian */
+# define SWLO swl /* low part is left in big-endian */
+#endif
+
+LEAF(memcpy,0)
+
+ .set noreorder
+ .set noat
+/*
+ * Below we handle the case where memcpy is called with overlapping src and dst.
+ * Although memcpy is not required to handle this case, some parts of Android like Skia
+ * rely on such usage. We call memmove to handle such cases.
+ */
+ subu t0,a0,a1
+ sra AT,t0,31
+ xor t1,t0,AT
+ subu t0,t1,AT
+ sltu AT,t0,a2
+ beq AT,zero,.Lmemcpy
+ la t9,memmove
+ jr t9
+ nop
+.Lmemcpy:
+ slti AT,a2,8
+ bne AT,zero,.Llast8
+ move v0,a0 # memcpy returns the dst pointer
+
+# Test if the src and dst are word-aligned, or can be made word-aligned
+ xor t8,a1,a0
+ andi t8,t8,0x3 # t8 is a0/a1 word-displacement
+
+ bne t8,zero,.Lunaligned
+ negu a3,a0
+
+ andi a3,a3,0x3 # we need to copy a3 bytes to make a0/a1 aligned
+ beq a3,zero,.Lchk16w # when a3=0 then the dst (a0) is word-aligned
+ subu a2,a2,a3 # now a2 is the remining bytes count
+
+ LWHI t8,0(a1)
+ addu a1,a1,a3
+ SWHI t8,0(a0)
+ addu a0,a0,a3
+
+# Now the dst/src are mutually word-aligned with word-aligned addresses
+.Lchk16w:
+ andi t8,a2,0x3f # any whole 64-byte chunks?
+ # t8 is the byte count after 64-byte chunks
+
+ beq a2,t8,.Lchk8w # if a2==t8, no 64-byte chunks
+ # There will be at most 1 32-byte chunk after it
+ subu a3,a2,t8 # subtract from a2 the reminder
+ # Here a3 counts bytes in 16w chunks
+ addu a3,a0,a3 # Now a3 is the final dst after 64-byte chunks
+
+ addu t0,a0,a2 # t0 is the "past the end" address
+
+# When in the loop we exercise "pref 30,x(a0)", the a0+x should not be past
+# the "t0-32" address
+# This means: for x=128 the last "safe" a0 address is "t0-160"
+# Alternatively, for x=64 the last "safe" a0 address is "t0-96"
+# In the current version we will use "pref 30,128(a0)", so "t0-160" is the limit
+ subu t9,t0,160 # t9 is the "last safe pref 30,128(a0)" address
+
+ pref 0,0(a1) # bring the first line of src, addr 0
+ pref 0,32(a1) # bring the second line of src, addr 32
+ pref 0,64(a1) # bring the third line of src, addr 64
+ pref 30,32(a0) # safe, as we have at least 64 bytes ahead
+# In case the a0 > t9 don't use "pref 30" at all
+ sgtu v1,a0,t9
+ bgtz v1,.Lloop16w # skip "pref 30,64(a0)" for too short arrays
+ nop
+# otherwise, start with using pref30
+ pref 30,64(a0)
+.Lloop16w:
+ pref 0,96(a1)
+ lw t0,0(a1)
+ bgtz v1,.Lskip_pref30_96 # skip "pref 30,96(a0)"
+ lw t1,4(a1)
+ pref 30,96(a0) # continue setting up the dest, addr 96
+.Lskip_pref30_96:
+ lw t2,8(a1)
+ lw t3,12(a1)
+ lw t4,16(a1)
+ lw t5,20(a1)
+ lw t6,24(a1)
+ lw t7,28(a1)
+ pref 0,128(a1) # bring the next lines of src, addr 128
+
+ sw t0,0(a0)
+ sw t1,4(a0)
+ sw t2,8(a0)
+ sw t3,12(a0)
+ sw t4,16(a0)
+ sw t5,20(a0)
+ sw t6,24(a0)
+ sw t7,28(a0)
+
+ lw t0,32(a1)
+ bgtz v1,.Lskip_pref30_128 # skip "pref 30,128(a0)"
+ lw t1,36(a1)
+ pref 30,128(a0) # continue setting up the dest, addr 128
+.Lskip_pref30_128:
+ lw t2,40(a1)
+ lw t3,44(a1)
+ lw t4,48(a1)
+ lw t5,52(a1)
+ lw t6,56(a1)
+ lw t7,60(a1)
+ pref 0, 160(a1) # bring the next lines of src, addr 160
+
+ sw t0,32(a0)
+ sw t1,36(a0)
+ sw t2,40(a0)
+ sw t3,44(a0)
+ sw t4,48(a0)
+ sw t5,52(a0)
+ sw t6,56(a0)
+ sw t7,60(a0)
+
+ addiu a0,a0,64 # adding 64 to dest
+ sgtu v1,a0,t9
+ bne a0,a3,.Lloop16w
+ addiu a1,a1,64 # adding 64 to src
+ move a2,t8
+
+# Here we have src and dest word-aligned but less than 64-bytes to go
+
+.Lchk8w:
+ pref 0, 0x0(a1)
+ andi t8,a2,0x1f # is there a 32-byte chunk?
+ # the t8 is the reminder count past 32-bytes
+ beq a2,t8,.Lchk1w # when a2=t8, no 32-byte chunk
+ nop
+
+ lw t0,0(a1)
+ lw t1,4(a1)
+ lw t2,8(a1)
+ lw t3,12(a1)
+ lw t4,16(a1)
+ lw t5,20(a1)
+ lw t6,24(a1)
+ lw t7,28(a1)
+ addiu a1,a1,32
+
+ sw t0,0(a0)
+ sw t1,4(a0)
+ sw t2,8(a0)
+ sw t3,12(a0)
+ sw t4,16(a0)
+ sw t5,20(a0)
+ sw t6,24(a0)
+ sw t7,28(a0)
+ addiu a0,a0,32
+
+.Lchk1w:
+ andi a2,t8,0x3 # now a2 is the reminder past 1w chunks
+ beq a2,t8,.Llast8
+ subu a3,t8,a2 # a3 is count of bytes in 1w chunks
+ addu a3,a0,a3 # now a3 is the dst address past the 1w chunks
+
+# copying in words (4-byte chunks)
+.LwordCopy_loop:
+ lw t3,0(a1) # the first t3 may be equal t0 ... optimize?
+ addiu a1,a1,4
+ addiu a0,a0,4
+ bne a0,a3,.LwordCopy_loop
+ sw t3,-4(a0)
+
+# For the last (<8) bytes
+.Llast8:
+ blez a2,.Lleave
+ addu a3,a0,a2 # a3 is the last dst address
+.Llast8loop:
+ lb v1,0(a1)
+ addiu a1,a1,1
+ addiu a0,a0,1
+ bne a0,a3,.Llast8loop
+ sb v1,-1(a0)
+
+.Lleave:
+ j ra
+ nop
+
+#
+# UNALIGNED case
+#
+
+.Lunaligned:
+ # got here with a3="negu a0"
+ andi a3,a3,0x3 # test if the a0 is word aligned
+ beqz a3,.Lua_chk16w
+ subu a2,a2,a3 # bytes left after initial a3 bytes
+
+ LWHI v1,0(a1)
+ LWLO v1,3(a1)
+ addu a1,a1,a3 # a3 may be here 1, 2 or 3
+ SWHI v1,0(a0)
+ addu a0,a0,a3 # below the dst will be word aligned (NOTE1)
+
+.Lua_chk16w:
+ andi t8,a2,0x3f # any whole 64-byte chunks?
+ # t8 is the byte count after 64-byte chunks
+ beq a2,t8,.Lua_chk8w # if a2==t8, no 64-byte chunks
+ # There will be at most 1 32-byte chunk after it
+ subu a3,a2,t8 # subtract from a2 the reminder
+ # Here a3 counts bytes in 16w chunks
+ addu a3,a0,a3 # Now a3 is the final dst after 64-byte chunks
+
+ addu t0,a0,a2 # t0 is the "past the end" address
+
+ subu t9,t0,160 # t9 is the "last safe pref 30,128(a0)" address
+
+ pref 0,0(a1) # bring the first line of src, addr 0
+ pref 0,32(a1) # bring the second line of src, addr 32
+ pref 0,64(a1) # bring the third line of src, addr 64
+ pref 30,32(a0) # safe, as we have at least 64 bytes ahead
+# In case the a0 > t9 don't use "pref 30" at all
+ sgtu v1,a0,t9
+ bgtz v1,.Lua_loop16w # skip "pref 30,64(a0)" for too short arrays
+ nop
+# otherwise, start with using pref30
+ pref 30,64(a0)
+.Lua_loop16w:
+ pref 0,96(a1)
+ LWHI t0,0(a1)
+ LWLO t0,3(a1)
+ LWHI t1,4(a1)
+ bgtz v1,.Lua_skip_pref30_96
+ LWLO t1,7(a1)
+ pref 30,96(a0) # continue setting up the dest, addr 96
+.Lua_skip_pref30_96:
+ LWHI t2,8(a1)
+ LWLO t2,11(a1)
+ LWHI t3,12(a1)
+ LWLO t3,15(a1)
+ LWHI t4,16(a1)
+ LWLO t4,19(a1)
+ LWHI t5,20(a1)
+ LWLO t5,23(a1)
+ LWHI t6,24(a1)
+ LWLO t6,27(a1)
+ LWHI t7,28(a1)
+ LWLO t7,31(a1)
+ pref 0,128(a1) # bring the next lines of src, addr 128
+
+ sw t0,0(a0)
+ sw t1,4(a0)
+ sw t2,8(a0)
+ sw t3,12(a0)
+ sw t4,16(a0)
+ sw t5,20(a0)
+ sw t6,24(a0)
+ sw t7,28(a0)
+
+ LWHI t0,32(a1)
+ LWLO t0,35(a1)
+ LWHI t1,36(a1)
+ bgtz v1,.Lua_skip_pref30_128
+ LWLO t1,39(a1)
+ pref 30,128(a0) # continue setting up the dest, addr 128
+.Lua_skip_pref30_128:
+ LWHI t2,40(a1)
+ LWLO t2,43(a1)
+ LWHI t3,44(a1)
+ LWLO t3,47(a1)
+ LWHI t4,48(a1)
+ LWLO t4,51(a1)
+ LWHI t5,52(a1)
+ LWLO t5,55(a1)
+ LWHI t6,56(a1)
+ LWLO t6,59(a1)
+ LWHI t7,60(a1)
+ LWLO t7,63(a1)
+ pref 0, 160(a1) # bring the next lines of src, addr 160
+
+ sw t0,32(a0)
+ sw t1,36(a0)
+ sw t2,40(a0)
+ sw t3,44(a0)
+ sw t4,48(a0)
+ sw t5,52(a0)
+ sw t6,56(a0)
+ sw t7,60(a0)
+
+ addiu a0,a0,64 # adding 64 to dest
+ sgtu v1,a0,t9
+ bne a0,a3,.Lua_loop16w
+ addiu a1,a1,64 # adding 64 to src
+ move a2,t8
+
+# Here we have src and dest word-aligned but less than 64-bytes to go
+
+.Lua_chk8w:
+ pref 0, 0x0(a1)
+ andi t8,a2,0x1f # is there a 32-byte chunk?
+ # the t8 is the reminder count
+ beq a2,t8,.Lua_chk1w # when a2=t8, no 32-byte chunk
+ nop
+
+ LWHI t0,0(a1)
+ LWLO t0,3(a1)
+ LWHI t1,4(a1)
+ LWLO t1,7(a1)
+ LWHI t2,8(a1)
+ LWLO t2,11(a1)
+ LWHI t3,12(a1)
+ LWLO t3,15(a1)
+ LWHI t4,16(a1)
+ LWLO t4,19(a1)
+ LWHI t5,20(a1)
+ LWLO t5,23(a1)
+ LWHI t6,24(a1)
+ LWLO t6,27(a1)
+ LWHI t7,28(a1)
+ LWLO t7,31(a1)
+ addiu a1,a1,32
+
+ sw t0,0(a0)
+ sw t1,4(a0)
+ sw t2,8(a0)
+ sw t3,12(a0)
+ sw t4,16(a0)
+ sw t5,20(a0)
+ sw t6,24(a0)
+ sw t7,28(a0)
+ addiu a0,a0,32
+
+.Lua_chk1w:
+ andi a2,t8,0x3 # now a2 is the reminder past 1w chunks
+ beq a2,t8,.Lua_smallCopy
+ subu a3,t8,a2 # a3 is count of bytes in 1w chunks
+ addu a3,a0,a3 # now a3 is the dst address past the 1w chunks
+
+# copying in words (4-byte chunks)
+.Lua_wordCopy_loop:
+ LWHI v1,0(a1)
+ LWLO v1,3(a1)
+ addiu a1,a1,4
+ addiu a0,a0,4 # note: dst=a0 is word aligned here, see NOTE1
+ bne a0,a3,.Lua_wordCopy_loop
+ sw v1,-4(a0)
+
+# Now less than 4 bytes (value in a2) left to copy
+.Lua_smallCopy:
+ beqz a2,.Lleave
+ addu a3,a0,a2 # a3 is the last dst address
+.Lua_smallCopy_loop:
+ lb v1,0(a1)
+ addiu a1,a1,1
+ addiu a0,a0,1
+ bne a0,a3,.Lua_smallCopy_loop
+ sb v1,-1(a0)
+
+ j ra
+ nop
+
+ .set at
+ .set reorder
+
+END(memcpy)
+
+
+/************************************************************************
+ * Implementation : Static functions
+ ************************************************************************/
diff --git a/libc/arch-mips64/string/memset.S b/libc/arch-mips64/string/memset.S
new file mode 100644
index 0000000..a1c5055
--- /dev/null
+++ b/libc/arch-mips64/string/memset.S
@@ -0,0 +1,323 @@
+/*
+ * Copyright (c) 2009
+ * MIPS Technologies, Inc., California.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
+ * contributors may be used to endorse or promote products derived from
+ * this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/************************************************************************
+ *
+ * memset.S, version "64h" with 1 cache line horizon for "pref 30" and 14 nops
+ * Version: "043009"
+ *
+ ************************************************************************/
+
+
+/************************************************************************
+ * Include files
+ ************************************************************************/
+
+#include "machine/asm.h"
+
+/*
+ * This routine could be optimized for MIPS64. The current code only
+ * uses MIPS32 instructions.
+ */
+
+#if defined(__MIPSEB__)
+# define SWHI swl /* high part is left in big-endian */
+# define SWLO swr /* low part is right in big-endian */
+#endif
+
+#if defined(__MIPSEL__)
+# define SWHI swr /* high part is right in little-endian */
+# define SWLO swl /* low part is left in little-endian */
+#endif
+
+#if !(defined(XGPROF) || defined(XPROF))
+#undef SETUP_GP
+#define SETUP_GP
+#endif
+
+#ifdef NDEBUG
+#define DBG #
+#else
+#define DBG
+#endif
+
+/*
+ * void _memset16(uint16_t* dst, uint16_t value, size_t size);
+ */
+
+LEAF(_memset16,0)
+ .set noreorder
+DBG /* Check parameters */
+DBG andi t0,a0,1 # a0 must be halfword aligned
+DBG tne t0,zero
+DBG andi t2,a2,1 # a2 must be even
+DBG tne t2,zero
+
+#ifdef FIXARGS
+ # ensure count is even
+#if (__mips==32) && (__mips_isa_rev>=2)
+ ins a2,zero,0,1
+#else
+ ori a2,1
+ xori a2,1
+#endif
+#endif
+
+#if (__mips==32) && (__mips_isa_rev>=2)
+ ins a1,a1,16,16
+#else
+ andi a1,0xffff
+ sll t3,a1,16
+ or a1,t3
+#endif
+
+ beqz a2,.Ldone
+ andi t1,a0,2
+ beqz t1,.Lalignok
+ addu t0,a0,a2 # t0 is the "past the end" address
+ sh a1,0(a0) # store one halfword to get aligned
+ addu a0,2
+ subu a2,2
+.Lalignok:
+ slti t1,a2,4 # .Laligned for 4 or more bytes
+ beqz t1,.Laligned
+ sne t1,a2,2 # one more halfword?
+ bnez t1,.Ldone
+ nop
+ sh a1,0(a0)
+.Ldone:
+ j ra
+ nop
+ .set reorder
+END(_memset16)
+
+/*
+ * void _memset32(uint32_t* dst, uint32_t value, size_t size);
+ */
+
+LEAF(_memset32,0)
+ .set noreorder
+DBG /* Check parameters */
+DBG andi t0,a0,3 # a0 must be word aligned
+DBG tne t0,zero
+DBG andi t2,a2,3 # a2 must be a multiple of 4 bytes
+DBG tne t2,zero
+
+#ifdef FIXARGS
+ # ensure count is a multiple of 4
+#if (__mips==32) && (__mips_isa_rev>=2)
+ ins $a2,$0,0,2
+#else
+ ori a2,3
+ xori a2,3
+#endif
+#endif
+
+ bnez a2,.Laligned # any work to do?
+ addu t0,a0,a2 # t0 is the "past the end" address
+
+ j ra
+ nop
+ .set reorder
+END(_memset32)
+
+LEAF(memset,0)
+
+ .set noreorder
+ .set noat
+
+ addu t0,a0,a2 # t0 is the "past the end" address
+ slti AT,a2,4 # is a2 less than 4?
+ bne AT,zero,.Llast4 # if yes, go to last4
+ move v0,a0 # memset returns the dst pointer
+
+ beq a1,zero,.Lset0
+ subu v1,zero,a0
+
+ # smear byte into 32 bit word
+#if (__mips==32) && (__mips_isa_rev>=2)
+ ins a1, a1, 8, 8 # Replicate fill byte into half-word.
+ ins a1, a1, 16, 16 # Replicate fill byte into word.
+#else
+ and a1,0xff
+ sll AT,a1,8
+ or a1,AT
+ sll AT,a1,16
+ or a1,AT
+#endif
+
+.Lset0:
+ andi v1,v1,0x3 # word-unaligned address?
+ beq v1,zero,.Laligned # v1 is the unalignment count
+ subu a2,a2,v1
+ SWHI a1,0(a0)
+ addu a0,a0,v1
+
+# Here we have the "word-aligned" a0 (until the "last4")
+.Laligned:
+ andi t8,a2,0x3f # any 64-byte chunks?
+ # t8 is the byte count past 64-byte chunks
+ beq a2,t8,.Lchk8w # when a2==t8, no 64-byte chunks
+ # There will be at most 1 32-byte chunk then
+ subu a3,a2,t8 # subtract from a2 the reminder
+ # Here a3 counts bytes in 16w chunks
+ addu a3,a0,a3 # Now a3 is the final dst after 64-byte chunks
+
+# Find out, if there are any 64-byte chunks after which will be still at least
+# 96 bytes left. The value "96" is calculated as needed buffer for
+# "pref 30,64(a0)" prefetch, which can be used as "pref 30,0(a0)" after
+# incrementing "a0" by 64.
+# For "a2" below 160 there will be no such "pref 30 safe" 64-byte chunk.
+#
+ sltiu v1,a2,160
+ bgtz v1,.Lloop16w_nopref30 # skip "pref 30,0(a0)"
+ subu t7,a2,96 # subtract "pref 30 unsafe" region
+ # below we have at least 1 64-byte chunk which is "pref 30 safe"
+ andi t6,t7,0x3f # t6 is past "64-byte safe chunks" reminder
+ subu t5,t7,t6 # subtract from t7 the reminder
+ # Here t5 counts bytes in 16w "safe" chunks
+ addu t4,a0,t5 # Now t4 is the dst after 64-byte "safe" chunks
+
+# Don't use "pref 30,0(a0)" for a0 in a "middle" of a cache line
+# pref 30,0(a0)
+# Here we are in the region, where it is safe to use "pref 30,64(a0)"
+.Lloop16w:
+ addiu a0,a0,64
+ pref 30,-32(a0) # continue setting up the dest, addr 64-32
+ sw a1,-64(a0)
+ sw a1,-60(a0)
+ sw a1,-56(a0)
+ sw a1,-52(a0)
+ sw a1,-48(a0)
+ sw a1,-44(a0)
+ sw a1,-40(a0)
+ sw a1,-36(a0)
+ nop
+ nop # the extra nop instructions help to balance
+ nop # cycles needed for "store" + "fill" + "evict"
+ nop # For 64byte store there are needed 8 fill
+ nop # and 8 evict cycles, i.e. at least 32 instr.
+ nop
+ nop
+ pref 30,0(a0) # continue setting up the dest, addr 64-0
+ sw a1,-32(a0)
+ sw a1,-28(a0)
+ sw a1,-24(a0)
+ sw a1,-20(a0)
+ sw a1,-16(a0)
+ sw a1,-12(a0)
+ sw a1,-8(a0)
+ sw a1,-4(a0)
+ nop
+ nop
+ nop
+ nop # NOTE: adding 14 nop-s instead of 12 nop-s
+ nop # gives better results for "fast" memory
+ nop
+ bne a0,t4,.Lloop16w
+ nop
+
+ beq a0,a3,.Lchk8w # maybe no more 64-byte chunks?
+ nop # this "delayed slot" is useless ...
+
+.Lloop16w_nopref30: # there could be up to 3 "64-byte nopref30" chunks
+ addiu a0,a0,64
+ sw a1,-64(a0)
+ sw a1,-60(a0)
+ sw a1,-56(a0)
+ sw a1,-52(a0)
+ sw a1,-48(a0)
+ sw a1,-44(a0)
+ sw a1,-40(a0)
+ sw a1,-36(a0)
+ sw a1,-32(a0)
+ sw a1,-28(a0)
+ sw a1,-24(a0)
+ sw a1,-20(a0)
+ sw a1,-16(a0)
+ sw a1,-12(a0)
+ sw a1,-8(a0)
+ bne a0,a3,.Lloop16w_nopref30
+ sw a1,-4(a0)
+
+.Lchk8w: # t8 here is the byte count past 64-byte chunks
+
+ andi t7,t8,0x1f # is there a 32-byte chunk?
+ # the t7 is the reminder count past 32-bytes
+ beq t8,t7,.Lchk1w # when t8==t7, no 32-byte chunk
+ move a2,t7
+
+ sw a1,0(a0)
+ sw a1,4(a0)
+ sw a1,8(a0)
+ sw a1,12(a0)
+ sw a1,16(a0)
+ sw a1,20(a0)
+ sw a1,24(a0)
+ sw a1,28(a0)
+ addiu a0,a0,32
+
+.Lchk1w:
+ andi t8,a2,0x3 # now t8 is the reminder past 1w chunks
+ beq a2,t8,.Llast4aligned
+ subu a3,a2,t8 # a3 is the count of bytes in 1w chunks
+ addu a3,a0,a3 # now a3 is the dst address past the 1w chunks
+
+# copying in words (4-byte chunks)
+.LwordCopy_loop:
+ addiu a0,a0,4
+ bne a0,a3,.LwordCopy_loop
+ sw a1,-4(a0)
+
+# store last 0-3 bytes
+# this will repeat the last store if the memset finishes on a word boundary
+.Llast4aligned:
+ j ra
+ SWLO a1,-1(t0)
+
+.Llast4:
+ beq a0,t0,.Llast4e
+.Llast4l:
+ addiu a0,a0,1
+ bne a0,t0,.Llast4l
+ sb a1,-1(a0)
+.Llast4e:
+ j ra
+ nop
+
+ .set at
+ .set reorder
+
+END(memset)
+
+
+/************************************************************************
+ * Implementation : Static functions
+ ************************************************************************/
+
diff --git a/libc/arch-mips64/string/mips-string-ops.h b/libc/arch-mips64/string/mips-string-ops.h
new file mode 100644
index 0000000..e635ba1
--- /dev/null
+++ b/libc/arch-mips64/string/mips-string-ops.h
@@ -0,0 +1,148 @@
+/*
+ * Copyright (c) 2010 MIPS Technologies, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer
+ * in the documentation and/or other materials provided with
+ * the distribution.
+ * * Neither the name of MIPS Technologies Inc. nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef __MIPS_STRING_OPS_H
+#define __MIPS_STRING_OPS_H
+ /* This definition of the byte bitfields uses the
+ assumption that the layout of the bitfields is
+ equivalent to the layout in memory. Generally,
+ for the MIPS ABIs, this is true. If you compile
+ the strcmp.c file with -DSMOKE_TEST_NEW_STRCMP,
+ this assumption will be tested.
+
+ Also, regardless of char signedness, ANSI C dictates that
+ strcmp() treats each character as unsigned char. For
+ strlen and the like, signedness doesn't matter.
+
+ Also, this code assumes that there are 8-bits per 'char'. */
+
+#if __mips64
+typedef struct bits
+{
+ unsigned long B0:8, B1:8, B2:8, B3:8, B4:8, B5:8, B6:8, B7:8;
+} bits_t;
+#else
+typedef struct bits
+{
+ unsigned long B0:8, B1:8, B2:8, B3:8;
+} bits_t;
+#endif
+
+#ifndef _ULW
+ /* for MIPS GCC, there is no unaligned builtins - so this code forces
+ the compiler to treat the pointer access as unaligned. */
+struct ulw
+{
+ unsigned long b;
+} __attribute__ ((packed));
+
+#define _ULW(__x) ((struct ulw *) ((char *)(&__x)))->b;
+#endif
+
+/* This union assumes that small structures can be in registers. If
+ not, then memory accesses will be done - not optimal, but ok. */
+typedef union
+{
+ unsigned long v;
+ bits_t b;
+} bitfields_t;
+
+#ifndef detect_zero
+/* __mips_dsp, __mips_dspr2, and __mips64 are predefined by
+ the compiler, based on command line options. */
+#if (__mips_dsp || __mips_dspr2) && !__mips64
+#define __mips_using_dsp 1
+
+/* DSP 4-lane (8 unsigned bits per line) subtract and saturate
+ * Intrinsic operation. How this works:
+ * Given a 4-byte string of "ABC\0", subtract this as
+ * an unsigned integer from 0x01010101:
+ * 0x01010101
+ * - 0x41424300
+ * -----------
+ ( 0xbfbebe01 <-- answer without saturation
+ * 0x00000001 <-- answer with saturation
+ * When this 4-lane vector is treated as an unsigned int value,
+ * a non-zero answer indicates the presence of a zero in the
+ * original 4-byte argument. */
+
+typedef signed char v4i8 __attribute__ ((vector_size (4)));
+
+#define detect_zero(__x,__y,__01s,__80s)\
+ ((unsigned) __builtin_mips_subu_s_qb((v4i8) __01s,(v4i8) __x))
+
+ /* sets all 4 lanes to requested byte. */
+#define set_byte_lanes(__x) ((unsigned) __builtin_mips_repl_qb(__x))
+
+ /* sets all 4 lanes to 0x01. */
+#define def_and_set_01(__x) unsigned long __x = (unsigned) __builtin_mips_repl_qb(0x01)
+
+ /* sets all 4 lanes to 0x80. Not needed when subu_s.qb used. */
+#define def_and_set_80(__x) /* do nothing */
+
+#else
+ /* this version, originally published in the 80's, uses
+ a reverse-carry-set like determination of the zero byte.
+ The steps are, for __x = 0x31ff0001:
+ __x - _01s = 0x30fdff00
+ ~__x = 0xce00fffe
+ ((__x - _01s) & ~__x) = 0x0000ff00
+ x & _80s = 0x00008000 <- byte 3 was zero
+ Some implementaions naively assume that characters are
+ always 7-bit unsigned ASCII. With that assumption, the
+ "& ~x" is usually discarded. Since character strings
+ are 8-bit, the and is needed to catch the case of
+ a false positive when the byte is 0x80. */
+
+#define detect_zero(__x,__y,_01s,_80s)\
+ ((unsigned) (((__x) - _01s) & ~(__x)) & _80s)
+
+#if __mips64
+#define def_and_set_80(__x) unsigned long __x = 0x8080808080808080ul
+#define def_and_set_01(__x) unsigned long __x = 0x0101010101010101ul
+#else
+#define def_and_set_80(__x) unsigned long __x = 0x80808080ul
+#define def_and_set_01(__x) unsigned long __x = 0x01010101ul
+#endif
+
+#endif
+#endif
+
+/* dealing with 'void *' conversions without using extra variables. */
+#define get_byte(__x,__idx) (((unsigned char *) (__x))[__idx])
+#define set_byte(__x,__idx,__fill) ((unsigned char *) (__x))[__idx] = (__fill)
+#define get_word(__x,__idx) (((unsigned long *) (__x))[__idx])
+#define set_word(__x,__idx,__fill) ((unsigned long *) (__x))[__idx] = (__fill)
+#define inc_ptr_as(__type,__x,__inc) __x = (void *) (((__type) __x) + (__inc))
+#define cvt_ptr_to(__type,__x) ((__type) (__x))
+
+#endif
diff --git a/libc/arch-mips64/string/mips_strlen.c b/libc/arch-mips64/string/mips_strlen.c
new file mode 100644
index 0000000..37e5865
--- /dev/null
+++ b/libc/arch-mips64/string/mips_strlen.c
@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2010 MIPS Technologies, Inc.
+ *
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ *
+ * * Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer
+ * in the documentation and/or other materials provided with
+ * the distribution.
+ * * Neither the name of MIPS Technologies Inc. nor the names of its
+ * contributors may be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+ * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+ * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+ * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+ * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+ * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+ * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <string.h>
+#include "mips-string-ops.h"
+
+#define do_strlen_word(__av) {\
+ if (detect_zero(x,x,_01s,_80s)) break;\
+ x = __av;\
+ cnt += sizeof (unsigned);\
+ }
+
+#define do_strlen_byte(__x) {\
+ if ((bx.b.B##__x) == 0) break;\
+ ++cnt;\
+ }
+
+#if SMOKE_TEST_MIPS_STRLEN
+#define strlen my_strlen
+#endif
+
+size_t
+strlen (const char *_a)
+{
+ int cnt = 0;
+ unsigned long x;
+
+ /* align the string to word boundary so we can do word at a time. */
+ if ((cvt_ptr_to (unsigned long, _a) & (sizeof (unsigned long) - 1)) != 0)
+ {
+ if ((cvt_ptr_to (unsigned long, _a) & 1) != 0)
+ {
+ if (get_byte (_a, 0) == 0)
+ return cnt;
+ /* set bit 1 so 2-bytes are checked and incremented. */
+ inc_ptr_as (char *, _a, 1);
+ ++cnt;
+ }
+ if ((cvt_ptr_to (unsigned long, _a) & 2) != 0)
+ {
+ if (get_byte (_a, 0) == 0)
+ return cnt + 0;
+ if (get_byte (_a, 1) == 0)
+ return cnt + 1;
+ inc_ptr_as (char *, _a, 2);
+ cnt += 2;
+ }
+ }
+
+#if __mips64
+#error strlen: mips64 check for 4-byte alignment not implemented.
+#endif
+
+ if (1)
+ {
+ def_and_set_01 (_01s);
+ def_and_set_80 (_80s);
+
+ /* as advantagous as it is to performance, this code cannot pre-load
+ the following word, nor can it prefetch the next line at the start
+ of the loop since the string can be at the end of a page with the
+ following page unmapped. There are tests in the suite to catch
+ any attempt to go beyond the current word. */
+ x = get_word (_a, 0);
+ while (1)
+ {
+ /* doing 8 words should cover most strings. */
+ do_strlen_word (get_word (_a, 1));
+ do_strlen_word (get_word (_a, 2));
+ do_strlen_word (get_word (_a, 3));
+ do_strlen_word (get_word (_a, 4));
+ do_strlen_word (get_word (_a, 5));
+ do_strlen_word (get_word (_a, 6));
+ do_strlen_word (get_word (_a, 7));
+ do_strlen_word (get_word (_a, 8));
+ inc_ptr_as (unsigned long*, _a, 8);
+ }
+ }
+ while (1)
+ {
+ /* pull apart the last word processed and find the zero. */
+ bitfields_t bx;
+ bx.v = x;
+#if __mips64
+ do_strlen_byte (0);
+ do_strlen_byte (1);
+ do_strlen_byte (2);
+ do_strlen_byte (3);
+ do_strlen_byte (4);
+ do_strlen_byte (5);
+ do_strlen_byte (6);
+#else
+ do_strlen_byte (0);
+ do_strlen_byte (1);
+ do_strlen_byte (2);
+#endif
+ /* last byte is zero */
+ break;
+ }
+ return cnt;
+}
+
+#undef do_strlen_byte
+#undef do_strlen_word
+
+#if SMOKE_TEST_MIPS_STRLEN
+#include <stdio.h>
+char str1[] = "DHRYSTONE PROGRAM, 1'ST STRING";
+char str2[] = "DHRYSTONE PROGRAM, 2'ST STRING";
+
+char str3[] = "another string";
+char str4[] = "another";
+
+char str5[] = "somes tring";
+char str6[] = "somes_tring";
+
+char str7[16], str8[16];
+
+static char *
+chk (unsigned long mine, unsigned long libs, int *errors)
+{
+ static char answer[1024];
+ char *result = mine == libs ? "PASS" : "FAIL";
+ sprintf (answer, "new_strlen=%d: lib_strlen=%d: %s!", mine, libs, result);
+ if (mine != libs)
+ (*errors)++;
+ return answer;
+}
+
+int
+main (int argc, char **argv)
+{
+ int errors = 0;
+ /* set -1 in one position */
+ str6[5] = 0xff;
+ /* set zero in same position with junk in following 3 */
+ str7[0] = str8[0] = 0;
+ str7[1] = 0xff;
+ str7[2] = 'a';
+ str7[3] = 2;
+ str8[1] = 's';
+ str8[2] = -2;
+ str8[3] = 0;
+
+ fprintf (stderr, "========== mips_strlen%s test...\n",
+ argv[0] ? argv[0] : "unknown strlen");
+#define P(__x,__y) {\
+ int a = my_strlen(__x + __y);\
+ int b = (strlen)(__x + __y) /* library version */;\
+ fprintf(stderr,"%s+%d: %s\n",#__x,__y,chk(a,b,&errors));\
+ }
+
+ P (str1, 0);
+ P (str1, 1);
+ P (str1, 2);
+ P (str1, 3);
+
+ P (str2, 0);
+ P (str2, 1);
+ P (str2, 2);
+ P (str2, 3);
+
+ P (str3, 0);
+ P (str3, 1);
+ P (str3, 2);
+ P (str3, 3);
+
+ P (str4, 0);
+ P (str4, 1);
+ P (str4, 2);
+ P (str4, 3);
+
+ P (str5, 0);
+ P (str5, 1);
+ P (str5, 2);
+ P (str5, 3);
+
+ P (str6, 0);
+ P (str6, 1);
+ P (str6, 2);
+ P (str6, 3);
+
+ P (str7, 0);
+ P (str7, 1);
+ P (str7, 2);
+ P (str7, 3);
+
+ P (str8, 0);
+ P (str8, 1);
+ P (str8, 2);
+ P (str8, 3);
+
+ return errors;
+}
+#endif
diff --git a/libc/arch-mips64/syscalls.mk b/libc/arch-mips64/syscalls.mk
new file mode 100644
index 0000000..5d8029e
--- /dev/null
+++ b/libc/arch-mips64/syscalls.mk
@@ -0,0 +1,194 @@
+# Generated by gensyscalls.py. Do not edit.
+syscall_src :=
+syscall_src += arch-mips64/syscalls/__brk.S
+syscall_src += arch-mips64/syscalls/__epoll_pwait.S
+syscall_src += arch-mips64/syscalls/__exit.S
+syscall_src += arch-mips64/syscalls/__getcpu.S
+syscall_src += arch-mips64/syscalls/__getcwd.S
+syscall_src += arch-mips64/syscalls/__getdents.S
+syscall_src += arch-mips64/syscalls/__getdents64.S
+syscall_src += arch-mips64/syscalls/__getpriority.S
+syscall_src += arch-mips64/syscalls/__ioctl.S
+syscall_src += arch-mips64/syscalls/__openat.S
+syscall_src += arch-mips64/syscalls/__ppoll.S
+syscall_src += arch-mips64/syscalls/__pselect6.S
+syscall_src += arch-mips64/syscalls/__ptrace.S
+syscall_src += arch-mips64/syscalls/__reboot.S
+syscall_src += arch-mips64/syscalls/__rt_sigaction.S
+syscall_src += arch-mips64/syscalls/__rt_sigpending.S
+syscall_src += arch-mips64/syscalls/__rt_sigprocmask.S
+syscall_src += arch-mips64/syscalls/__rt_sigsuspend.S
+syscall_src += arch-mips64/syscalls/__rt_sigtimedwait.S
+syscall_src += arch-mips64/syscalls/__sched_getaffinity.S
+syscall_src += arch-mips64/syscalls/__set_thread_area.S
+syscall_src += arch-mips64/syscalls/__set_tid_address.S
+syscall_src += arch-mips64/syscalls/__syslog.S
+syscall_src += arch-mips64/syscalls/__timer_create.S
+syscall_src += arch-mips64/syscalls/__timer_delete.S
+syscall_src += arch-mips64/syscalls/__timer_getoverrun.S
+syscall_src += arch-mips64/syscalls/__timer_gettime.S
+syscall_src += arch-mips64/syscalls/__timer_settime.S
+syscall_src += arch-mips64/syscalls/__waitid.S
+syscall_src += arch-mips64/syscalls/_exit.S
+syscall_src += arch-mips64/syscalls/_flush_cache.S
+syscall_src += arch-mips64/syscalls/accept.S
+syscall_src += arch-mips64/syscalls/acct.S
+syscall_src += arch-mips64/syscalls/bind.S
+syscall_src += arch-mips64/syscalls/capget.S
+syscall_src += arch-mips64/syscalls/capset.S
+syscall_src += arch-mips64/syscalls/chdir.S
+syscall_src += arch-mips64/syscalls/chroot.S
+syscall_src += arch-mips64/syscalls/clock_getres.S
+syscall_src += arch-mips64/syscalls/clock_gettime.S
+syscall_src += arch-mips64/syscalls/clock_nanosleep.S
+syscall_src += arch-mips64/syscalls/clock_settime.S
+syscall_src += arch-mips64/syscalls/close.S
+syscall_src += arch-mips64/syscalls/connect.S
+syscall_src += arch-mips64/syscalls/delete_module.S
+syscall_src += arch-mips64/syscalls/dup.S
+syscall_src += arch-mips64/syscalls/dup3.S
+syscall_src += arch-mips64/syscalls/epoll_create1.S
+syscall_src += arch-mips64/syscalls/epoll_ctl.S
+syscall_src += arch-mips64/syscalls/eventfd.S
+syscall_src += arch-mips64/syscalls/execve.S
+syscall_src += arch-mips64/syscalls/faccessat.S
+syscall_src += arch-mips64/syscalls/fallocate.S
+syscall_src += arch-mips64/syscalls/fchdir.S
+syscall_src += arch-mips64/syscalls/fchmod.S
+syscall_src += arch-mips64/syscalls/fchmodat.S
+syscall_src += arch-mips64/syscalls/fchown.S
+syscall_src += arch-mips64/syscalls/fchownat.S
+syscall_src += arch-mips64/syscalls/fcntl.S
+syscall_src += arch-mips64/syscalls/fdatasync.S
+syscall_src += arch-mips64/syscalls/fgetxattr.S
+syscall_src += arch-mips64/syscalls/flistxattr.S
+syscall_src += arch-mips64/syscalls/flock.S
+syscall_src += arch-mips64/syscalls/fremovexattr.S
+syscall_src += arch-mips64/syscalls/fsetxattr.S
+syscall_src += arch-mips64/syscalls/fstat.S
+syscall_src += arch-mips64/syscalls/fstatat.S
+syscall_src += arch-mips64/syscalls/fstatfs.S
+syscall_src += arch-mips64/syscalls/fsync.S
+syscall_src += arch-mips64/syscalls/ftruncate.S
+syscall_src += arch-mips64/syscalls/futex.S
+syscall_src += arch-mips64/syscalls/getegid.S
+syscall_src += arch-mips64/syscalls/geteuid.S
+syscall_src += arch-mips64/syscalls/getgid.S
+syscall_src += arch-mips64/syscalls/getgroups.S
+syscall_src += arch-mips64/syscalls/getitimer.S
+syscall_src += arch-mips64/syscalls/getpeername.S
+syscall_src += arch-mips64/syscalls/getpgid.S
+syscall_src += arch-mips64/syscalls/getpid.S
+syscall_src += arch-mips64/syscalls/getppid.S
+syscall_src += arch-mips64/syscalls/getresgid.S
+syscall_src += arch-mips64/syscalls/getresuid.S
+syscall_src += arch-mips64/syscalls/getrlimit.S
+syscall_src += arch-mips64/syscalls/getrusage.S
+syscall_src += arch-mips64/syscalls/getsid.S
+syscall_src += arch-mips64/syscalls/getsockname.S
+syscall_src += arch-mips64/syscalls/getsockopt.S
+syscall_src += arch-mips64/syscalls/gettid.S
+syscall_src += arch-mips64/syscalls/gettimeofday.S
+syscall_src += arch-mips64/syscalls/getuid.S
+syscall_src += arch-mips64/syscalls/getxattr.S
+syscall_src += arch-mips64/syscalls/init_module.S
+syscall_src += arch-mips64/syscalls/inotify_add_watch.S
+syscall_src += arch-mips64/syscalls/inotify_init1.S
+syscall_src += arch-mips64/syscalls/inotify_rm_watch.S
+syscall_src += arch-mips64/syscalls/ioprio_get.S
+syscall_src += arch-mips64/syscalls/ioprio_set.S
+syscall_src += arch-mips64/syscalls/kill.S
+syscall_src += arch-mips64/syscalls/klogctl.S
+syscall_src += arch-mips64/syscalls/lgetxattr.S
+syscall_src += arch-mips64/syscalls/linkat.S
+syscall_src += arch-mips64/syscalls/listen.S
+syscall_src += arch-mips64/syscalls/listxattr.S
+syscall_src += arch-mips64/syscalls/llistxattr.S
+syscall_src += arch-mips64/syscalls/lremovexattr.S
+syscall_src += arch-mips64/syscalls/lseek.S
+syscall_src += arch-mips64/syscalls/lsetxattr.S
+syscall_src += arch-mips64/syscalls/madvise.S
+syscall_src += arch-mips64/syscalls/mincore.S
+syscall_src += arch-mips64/syscalls/mkdirat.S
+syscall_src += arch-mips64/syscalls/mknodat.S
+syscall_src += arch-mips64/syscalls/mlock.S
+syscall_src += arch-mips64/syscalls/mlockall.S
+syscall_src += arch-mips64/syscalls/mmap.S
+syscall_src += arch-mips64/syscalls/mount.S
+syscall_src += arch-mips64/syscalls/mprotect.S
+syscall_src += arch-mips64/syscalls/mremap.S
+syscall_src += arch-mips64/syscalls/msync.S
+syscall_src += arch-mips64/syscalls/munlock.S
+syscall_src += arch-mips64/syscalls/munlockall.S
+syscall_src += arch-mips64/syscalls/munmap.S
+syscall_src += arch-mips64/syscalls/nanosleep.S
+syscall_src += arch-mips64/syscalls/perf_event_open.S
+syscall_src += arch-mips64/syscalls/personality.S
+syscall_src += arch-mips64/syscalls/pipe2.S
+syscall_src += arch-mips64/syscalls/prctl.S
+syscall_src += arch-mips64/syscalls/pread64.S
+syscall_src += arch-mips64/syscalls/prlimit64.S
+syscall_src += arch-mips64/syscalls/pwrite64.S
+syscall_src += arch-mips64/syscalls/read.S
+syscall_src += arch-mips64/syscalls/readahead.S
+syscall_src += arch-mips64/syscalls/readlinkat.S
+syscall_src += arch-mips64/syscalls/readv.S
+syscall_src += arch-mips64/syscalls/recvfrom.S
+syscall_src += arch-mips64/syscalls/recvmsg.S
+syscall_src += arch-mips64/syscalls/removexattr.S
+syscall_src += arch-mips64/syscalls/renameat.S
+syscall_src += arch-mips64/syscalls/sched_get_priority_max.S
+syscall_src += arch-mips64/syscalls/sched_get_priority_min.S
+syscall_src += arch-mips64/syscalls/sched_getparam.S
+syscall_src += arch-mips64/syscalls/sched_getscheduler.S
+syscall_src += arch-mips64/syscalls/sched_rr_get_interval.S
+syscall_src += arch-mips64/syscalls/sched_setaffinity.S
+syscall_src += arch-mips64/syscalls/sched_setparam.S
+syscall_src += arch-mips64/syscalls/sched_setscheduler.S
+syscall_src += arch-mips64/syscalls/sched_yield.S
+syscall_src += arch-mips64/syscalls/sendfile.S
+syscall_src += arch-mips64/syscalls/sendmsg.S
+syscall_src += arch-mips64/syscalls/sendto.S
+syscall_src += arch-mips64/syscalls/setgid.S
+syscall_src += arch-mips64/syscalls/setgroups.S
+syscall_src += arch-mips64/syscalls/setitimer.S
+syscall_src += arch-mips64/syscalls/setns.S
+syscall_src += arch-mips64/syscalls/setpgid.S
+syscall_src += arch-mips64/syscalls/setpriority.S
+syscall_src += arch-mips64/syscalls/setregid.S
+syscall_src += arch-mips64/syscalls/setresgid.S
+syscall_src += arch-mips64/syscalls/setresuid.S
+syscall_src += arch-mips64/syscalls/setreuid.S
+syscall_src += arch-mips64/syscalls/setrlimit.S
+syscall_src += arch-mips64/syscalls/setsid.S
+syscall_src += arch-mips64/syscalls/setsockopt.S
+syscall_src += arch-mips64/syscalls/settimeofday.S
+syscall_src += arch-mips64/syscalls/setuid.S
+syscall_src += arch-mips64/syscalls/setxattr.S
+syscall_src += arch-mips64/syscalls/shutdown.S
+syscall_src += arch-mips64/syscalls/sigaltstack.S
+syscall_src += arch-mips64/syscalls/signalfd4.S
+syscall_src += arch-mips64/syscalls/socket.S
+syscall_src += arch-mips64/syscalls/socketpair.S
+syscall_src += arch-mips64/syscalls/statfs.S
+syscall_src += arch-mips64/syscalls/swapoff.S
+syscall_src += arch-mips64/syscalls/swapon.S
+syscall_src += arch-mips64/syscalls/symlinkat.S
+syscall_src += arch-mips64/syscalls/sync.S
+syscall_src += arch-mips64/syscalls/sysinfo.S
+syscall_src += arch-mips64/syscalls/tgkill.S
+syscall_src += arch-mips64/syscalls/timerfd_create.S
+syscall_src += arch-mips64/syscalls/timerfd_gettime.S
+syscall_src += arch-mips64/syscalls/timerfd_settime.S
+syscall_src += arch-mips64/syscalls/times.S
+syscall_src += arch-mips64/syscalls/tkill.S
+syscall_src += arch-mips64/syscalls/truncate.S
+syscall_src += arch-mips64/syscalls/umask.S
+syscall_src += arch-mips64/syscalls/umount2.S
+syscall_src += arch-mips64/syscalls/uname.S
+syscall_src += arch-mips64/syscalls/unlinkat.S
+syscall_src += arch-mips64/syscalls/unshare.S
+syscall_src += arch-mips64/syscalls/utimensat.S
+syscall_src += arch-mips64/syscalls/wait4.S
+syscall_src += arch-mips64/syscalls/write.S
+syscall_src += arch-mips64/syscalls/writev.S
diff --git a/libc/arch-mips64/syscalls/__brk.S b/libc/arch-mips64/syscalls/__brk.S
new file mode 100644
index 0000000..1e3939a
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__brk.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __brk
+ .align 4
+ .ent __brk
+
+__brk:
+ .set push
+ .set noreorder
+ li v0, __NR_brk
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __brk
+.hidden _C_LABEL(__brk)
diff --git a/libc/arch-mips64/syscalls/__epoll_pwait.S b/libc/arch-mips64/syscalls/__epoll_pwait.S
new file mode 100644
index 0000000..6167f48
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__epoll_pwait.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __epoll_pwait
+ .align 4
+ .ent __epoll_pwait
+
+__epoll_pwait:
+ .set push
+ .set noreorder
+ li v0, __NR_epoll_pwait
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __epoll_pwait
+.hidden _C_LABEL(__epoll_pwait)
diff --git a/libc/arch-mips64/syscalls/__exit.S b/libc/arch-mips64/syscalls/__exit.S
new file mode 100644
index 0000000..0297a68
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__exit.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __exit
+ .align 4
+ .ent __exit
+
+__exit:
+ .set push
+ .set noreorder
+ li v0, __NR_exit
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __exit
+.hidden _C_LABEL(__exit)
diff --git a/libc/arch-mips64/syscalls/__getcpu.S b/libc/arch-mips64/syscalls/__getcpu.S
new file mode 100644
index 0000000..d20369e
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__getcpu.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __getcpu
+ .align 4
+ .ent __getcpu
+
+__getcpu:
+ .set push
+ .set noreorder
+ li v0, __NR_getcpu
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __getcpu
+.hidden _C_LABEL(__getcpu)
diff --git a/libc/arch-mips64/syscalls/__getcwd.S b/libc/arch-mips64/syscalls/__getcwd.S
new file mode 100644
index 0000000..47a32df
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__getcwd.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __getcwd
+ .align 4
+ .ent __getcwd
+
+__getcwd:
+ .set push
+ .set noreorder
+ li v0, __NR_getcwd
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __getcwd
+.hidden _C_LABEL(__getcwd)
diff --git a/libc/arch-mips64/syscalls/__getdents.S b/libc/arch-mips64/syscalls/__getdents.S
new file mode 100644
index 0000000..3b89c8c
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__getdents.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __getdents
+ .align 4
+ .ent __getdents
+
+__getdents:
+ .set push
+ .set noreorder
+ li v0, __NR_getdents
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __getdents
+.hidden _C_LABEL(__getdents)
diff --git a/libc/arch-mips64/syscalls/__getdents64.S b/libc/arch-mips64/syscalls/__getdents64.S
new file mode 100644
index 0000000..eac06aa
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__getdents64.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __getdents64
+ .align 4
+ .ent __getdents64
+
+__getdents64:
+ .set push
+ .set noreorder
+ li v0, __NR_getdents64
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __getdents64
+.hidden _C_LABEL(__getdents64)
diff --git a/libc/arch-mips64/syscalls/__getpriority.S b/libc/arch-mips64/syscalls/__getpriority.S
new file mode 100644
index 0000000..e3cd90e
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__getpriority.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __getpriority
+ .align 4
+ .ent __getpriority
+
+__getpriority:
+ .set push
+ .set noreorder
+ li v0, __NR_getpriority
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __getpriority
+.hidden _C_LABEL(__getpriority)
diff --git a/libc/arch-mips64/syscalls/__ioctl.S b/libc/arch-mips64/syscalls/__ioctl.S
new file mode 100644
index 0000000..c3bd575
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__ioctl.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __ioctl
+ .align 4
+ .ent __ioctl
+
+__ioctl:
+ .set push
+ .set noreorder
+ li v0, __NR_ioctl
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __ioctl
+.hidden _C_LABEL(__ioctl)
diff --git a/libc/arch-mips64/syscalls/__openat.S b/libc/arch-mips64/syscalls/__openat.S
new file mode 100644
index 0000000..0f14454
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__openat.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __openat
+ .align 4
+ .ent __openat
+
+__openat:
+ .set push
+ .set noreorder
+ li v0, __NR_openat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __openat
+.hidden _C_LABEL(__openat)
diff --git a/libc/arch-mips64/syscalls/__ppoll.S b/libc/arch-mips64/syscalls/__ppoll.S
new file mode 100644
index 0000000..ac7acb9
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__ppoll.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __ppoll
+ .align 4
+ .ent __ppoll
+
+__ppoll:
+ .set push
+ .set noreorder
+ li v0, __NR_ppoll
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __ppoll
+.hidden _C_LABEL(__ppoll)
diff --git a/libc/arch-mips64/syscalls/__pselect6.S b/libc/arch-mips64/syscalls/__pselect6.S
new file mode 100644
index 0000000..1e5ac2f
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__pselect6.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __pselect6
+ .align 4
+ .ent __pselect6
+
+__pselect6:
+ .set push
+ .set noreorder
+ li v0, __NR_pselect6
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __pselect6
+.hidden _C_LABEL(__pselect6)
diff --git a/libc/arch-mips64/syscalls/__ptrace.S b/libc/arch-mips64/syscalls/__ptrace.S
new file mode 100644
index 0000000..79b75b2
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__ptrace.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __ptrace
+ .align 4
+ .ent __ptrace
+
+__ptrace:
+ .set push
+ .set noreorder
+ li v0, __NR_ptrace
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __ptrace
+.hidden _C_LABEL(__ptrace)
diff --git a/libc/arch-mips64/syscalls/__reboot.S b/libc/arch-mips64/syscalls/__reboot.S
new file mode 100644
index 0000000..31ae824
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__reboot.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __reboot
+ .align 4
+ .ent __reboot
+
+__reboot:
+ .set push
+ .set noreorder
+ li v0, __NR_reboot
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __reboot
+.hidden _C_LABEL(__reboot)
diff --git a/libc/arch-mips64/syscalls/__rt_sigaction.S b/libc/arch-mips64/syscalls/__rt_sigaction.S
new file mode 100644
index 0000000..ef537a4
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__rt_sigaction.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __rt_sigaction
+ .align 4
+ .ent __rt_sigaction
+
+__rt_sigaction:
+ .set push
+ .set noreorder
+ li v0, __NR_rt_sigaction
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __rt_sigaction
+.hidden _C_LABEL(__rt_sigaction)
diff --git a/libc/arch-mips64/syscalls/__rt_sigpending.S b/libc/arch-mips64/syscalls/__rt_sigpending.S
new file mode 100644
index 0000000..2dc1bf6
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__rt_sigpending.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __rt_sigpending
+ .align 4
+ .ent __rt_sigpending
+
+__rt_sigpending:
+ .set push
+ .set noreorder
+ li v0, __NR_rt_sigpending
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __rt_sigpending
+.hidden _C_LABEL(__rt_sigpending)
diff --git a/libc/arch-mips64/syscalls/__rt_sigprocmask.S b/libc/arch-mips64/syscalls/__rt_sigprocmask.S
new file mode 100644
index 0000000..2814d66
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__rt_sigprocmask.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __rt_sigprocmask
+ .align 4
+ .ent __rt_sigprocmask
+
+__rt_sigprocmask:
+ .set push
+ .set noreorder
+ li v0, __NR_rt_sigprocmask
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __rt_sigprocmask
+.hidden _C_LABEL(__rt_sigprocmask)
diff --git a/libc/arch-mips64/syscalls/__rt_sigsuspend.S b/libc/arch-mips64/syscalls/__rt_sigsuspend.S
new file mode 100644
index 0000000..83c1990
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__rt_sigsuspend.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __rt_sigsuspend
+ .align 4
+ .ent __rt_sigsuspend
+
+__rt_sigsuspend:
+ .set push
+ .set noreorder
+ li v0, __NR_rt_sigsuspend
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __rt_sigsuspend
+.hidden _C_LABEL(__rt_sigsuspend)
diff --git a/libc/arch-mips64/syscalls/__rt_sigtimedwait.S b/libc/arch-mips64/syscalls/__rt_sigtimedwait.S
new file mode 100644
index 0000000..48daea8
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__rt_sigtimedwait.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __rt_sigtimedwait
+ .align 4
+ .ent __rt_sigtimedwait
+
+__rt_sigtimedwait:
+ .set push
+ .set noreorder
+ li v0, __NR_rt_sigtimedwait
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __rt_sigtimedwait
+.hidden _C_LABEL(__rt_sigtimedwait)
diff --git a/libc/arch-mips64/syscalls/__sched_getaffinity.S b/libc/arch-mips64/syscalls/__sched_getaffinity.S
new file mode 100644
index 0000000..006e395
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__sched_getaffinity.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __sched_getaffinity
+ .align 4
+ .ent __sched_getaffinity
+
+__sched_getaffinity:
+ .set push
+ .set noreorder
+ li v0, __NR_sched_getaffinity
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __sched_getaffinity
+.hidden _C_LABEL(__sched_getaffinity)
diff --git a/libc/arch-mips64/syscalls/__set_thread_area.S b/libc/arch-mips64/syscalls/__set_thread_area.S
new file mode 100644
index 0000000..009d004
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__set_thread_area.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __set_thread_area
+ .align 4
+ .ent __set_thread_area
+
+__set_thread_area:
+ .set push
+ .set noreorder
+ li v0, __NR_set_thread_area
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __set_thread_area
+.hidden _C_LABEL(__set_thread_area)
diff --git a/libc/arch-mips64/syscalls/__set_tid_address.S b/libc/arch-mips64/syscalls/__set_tid_address.S
new file mode 100644
index 0000000..4c1f97d
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__set_tid_address.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __set_tid_address
+ .align 4
+ .ent __set_tid_address
+
+__set_tid_address:
+ .set push
+ .set noreorder
+ li v0, __NR_set_tid_address
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __set_tid_address
+.hidden _C_LABEL(__set_tid_address)
diff --git a/libc/arch-mips64/syscalls/__syslog.S b/libc/arch-mips64/syscalls/__syslog.S
new file mode 100644
index 0000000..2291401
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__syslog.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __syslog
+ .align 4
+ .ent __syslog
+
+__syslog:
+ .set push
+ .set noreorder
+ li v0, __NR_syslog
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __syslog
+.hidden _C_LABEL(__syslog)
diff --git a/libc/arch-mips64/syscalls/__timer_create.S b/libc/arch-mips64/syscalls/__timer_create.S
new file mode 100644
index 0000000..aa024b7
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__timer_create.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __timer_create
+ .align 4
+ .ent __timer_create
+
+__timer_create:
+ .set push
+ .set noreorder
+ li v0, __NR_timer_create
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __timer_create
+.hidden _C_LABEL(__timer_create)
diff --git a/libc/arch-mips64/syscalls/__timer_delete.S b/libc/arch-mips64/syscalls/__timer_delete.S
new file mode 100644
index 0000000..024f0c4
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__timer_delete.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __timer_delete
+ .align 4
+ .ent __timer_delete
+
+__timer_delete:
+ .set push
+ .set noreorder
+ li v0, __NR_timer_delete
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __timer_delete
+.hidden _C_LABEL(__timer_delete)
diff --git a/libc/arch-mips64/syscalls/__timer_getoverrun.S b/libc/arch-mips64/syscalls/__timer_getoverrun.S
new file mode 100644
index 0000000..0931111
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__timer_getoverrun.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __timer_getoverrun
+ .align 4
+ .ent __timer_getoverrun
+
+__timer_getoverrun:
+ .set push
+ .set noreorder
+ li v0, __NR_timer_getoverrun
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __timer_getoverrun
+.hidden _C_LABEL(__timer_getoverrun)
diff --git a/libc/arch-mips64/syscalls/__timer_gettime.S b/libc/arch-mips64/syscalls/__timer_gettime.S
new file mode 100644
index 0000000..4eb5f71
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__timer_gettime.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __timer_gettime
+ .align 4
+ .ent __timer_gettime
+
+__timer_gettime:
+ .set push
+ .set noreorder
+ li v0, __NR_timer_gettime
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __timer_gettime
+.hidden _C_LABEL(__timer_gettime)
diff --git a/libc/arch-mips64/syscalls/__timer_settime.S b/libc/arch-mips64/syscalls/__timer_settime.S
new file mode 100644
index 0000000..ecac0c5
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__timer_settime.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __timer_settime
+ .align 4
+ .ent __timer_settime
+
+__timer_settime:
+ .set push
+ .set noreorder
+ li v0, __NR_timer_settime
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __timer_settime
+.hidden _C_LABEL(__timer_settime)
diff --git a/libc/arch-mips64/syscalls/__waitid.S b/libc/arch-mips64/syscalls/__waitid.S
new file mode 100644
index 0000000..caba21e
--- /dev/null
+++ b/libc/arch-mips64/syscalls/__waitid.S
@@ -0,0 +1,32 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl __waitid
+ .align 4
+ .ent __waitid
+
+__waitid:
+ .set push
+ .set noreorder
+ li v0, __NR_waitid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end __waitid
+.hidden _C_LABEL(__waitid)
diff --git a/libc/arch-mips64/syscalls/_exit.S b/libc/arch-mips64/syscalls/_exit.S
new file mode 100644
index 0000000..87aff94
--- /dev/null
+++ b/libc/arch-mips64/syscalls/_exit.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl _exit
+ .align 4
+ .ent _exit
+
+_exit:
+ .set push
+ .set noreorder
+ li v0, __NR_exit_group
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end _exit
diff --git a/libc/arch-mips64/syscalls/_flush_cache.S b/libc/arch-mips64/syscalls/_flush_cache.S
new file mode 100644
index 0000000..c2f8cd6
--- /dev/null
+++ b/libc/arch-mips64/syscalls/_flush_cache.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl _flush_cache
+ .align 4
+ .ent _flush_cache
+
+_flush_cache:
+ .set push
+ .set noreorder
+ li v0, __NR_cacheflush
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end _flush_cache
diff --git a/libc/arch-mips64/syscalls/accept.S b/libc/arch-mips64/syscalls/accept.S
new file mode 100644
index 0000000..dc9ac59
--- /dev/null
+++ b/libc/arch-mips64/syscalls/accept.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl accept
+ .align 4
+ .ent accept
+
+accept:
+ .set push
+ .set noreorder
+ li v0, __NR_accept
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end accept
diff --git a/libc/arch-mips64/syscalls/acct.S b/libc/arch-mips64/syscalls/acct.S
new file mode 100644
index 0000000..0b23866
--- /dev/null
+++ b/libc/arch-mips64/syscalls/acct.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl acct
+ .align 4
+ .ent acct
+
+acct:
+ .set push
+ .set noreorder
+ li v0, __NR_acct
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end acct
diff --git a/libc/arch-mips64/syscalls/bind.S b/libc/arch-mips64/syscalls/bind.S
new file mode 100644
index 0000000..da81dad
--- /dev/null
+++ b/libc/arch-mips64/syscalls/bind.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl bind
+ .align 4
+ .ent bind
+
+bind:
+ .set push
+ .set noreorder
+ li v0, __NR_bind
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end bind
diff --git a/libc/arch-mips64/syscalls/capget.S b/libc/arch-mips64/syscalls/capget.S
new file mode 100644
index 0000000..26d74b1
--- /dev/null
+++ b/libc/arch-mips64/syscalls/capget.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl capget
+ .align 4
+ .ent capget
+
+capget:
+ .set push
+ .set noreorder
+ li v0, __NR_capget
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end capget
diff --git a/libc/arch-mips64/syscalls/capset.S b/libc/arch-mips64/syscalls/capset.S
new file mode 100644
index 0000000..b4b87de
--- /dev/null
+++ b/libc/arch-mips64/syscalls/capset.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl capset
+ .align 4
+ .ent capset
+
+capset:
+ .set push
+ .set noreorder
+ li v0, __NR_capset
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end capset
diff --git a/libc/arch-mips64/syscalls/chdir.S b/libc/arch-mips64/syscalls/chdir.S
new file mode 100644
index 0000000..af3546a
--- /dev/null
+++ b/libc/arch-mips64/syscalls/chdir.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl chdir
+ .align 4
+ .ent chdir
+
+chdir:
+ .set push
+ .set noreorder
+ li v0, __NR_chdir
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end chdir
diff --git a/libc/arch-mips64/syscalls/chroot.S b/libc/arch-mips64/syscalls/chroot.S
new file mode 100644
index 0000000..b992774
--- /dev/null
+++ b/libc/arch-mips64/syscalls/chroot.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl chroot
+ .align 4
+ .ent chroot
+
+chroot:
+ .set push
+ .set noreorder
+ li v0, __NR_chroot
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end chroot
diff --git a/libc/arch-mips64/syscalls/clock_getres.S b/libc/arch-mips64/syscalls/clock_getres.S
new file mode 100644
index 0000000..f277ab1
--- /dev/null
+++ b/libc/arch-mips64/syscalls/clock_getres.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl clock_getres
+ .align 4
+ .ent clock_getres
+
+clock_getres:
+ .set push
+ .set noreorder
+ li v0, __NR_clock_getres
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end clock_getres
diff --git a/libc/arch-mips64/syscalls/clock_gettime.S b/libc/arch-mips64/syscalls/clock_gettime.S
new file mode 100644
index 0000000..8200e75
--- /dev/null
+++ b/libc/arch-mips64/syscalls/clock_gettime.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl clock_gettime
+ .align 4
+ .ent clock_gettime
+
+clock_gettime:
+ .set push
+ .set noreorder
+ li v0, __NR_clock_gettime
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end clock_gettime
diff --git a/libc/arch-mips64/syscalls/clock_nanosleep.S b/libc/arch-mips64/syscalls/clock_nanosleep.S
new file mode 100644
index 0000000..9ac95fc
--- /dev/null
+++ b/libc/arch-mips64/syscalls/clock_nanosleep.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl clock_nanosleep
+ .align 4
+ .ent clock_nanosleep
+
+clock_nanosleep:
+ .set push
+ .set noreorder
+ li v0, __NR_clock_nanosleep
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end clock_nanosleep
diff --git a/libc/arch-mips64/syscalls/clock_settime.S b/libc/arch-mips64/syscalls/clock_settime.S
new file mode 100644
index 0000000..a8cd723
--- /dev/null
+++ b/libc/arch-mips64/syscalls/clock_settime.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl clock_settime
+ .align 4
+ .ent clock_settime
+
+clock_settime:
+ .set push
+ .set noreorder
+ li v0, __NR_clock_settime
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end clock_settime
diff --git a/libc/arch-mips64/syscalls/close.S b/libc/arch-mips64/syscalls/close.S
new file mode 100644
index 0000000..cfe5c51
--- /dev/null
+++ b/libc/arch-mips64/syscalls/close.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl close
+ .align 4
+ .ent close
+
+close:
+ .set push
+ .set noreorder
+ li v0, __NR_close
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end close
diff --git a/libc/arch-mips64/syscalls/connect.S b/libc/arch-mips64/syscalls/connect.S
new file mode 100644
index 0000000..80600bb
--- /dev/null
+++ b/libc/arch-mips64/syscalls/connect.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl connect
+ .align 4
+ .ent connect
+
+connect:
+ .set push
+ .set noreorder
+ li v0, __NR_connect
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end connect
diff --git a/libc/arch-mips64/syscalls/delete_module.S b/libc/arch-mips64/syscalls/delete_module.S
new file mode 100644
index 0000000..cf2579d
--- /dev/null
+++ b/libc/arch-mips64/syscalls/delete_module.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl delete_module
+ .align 4
+ .ent delete_module
+
+delete_module:
+ .set push
+ .set noreorder
+ li v0, __NR_delete_module
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end delete_module
diff --git a/libc/arch-mips64/syscalls/dup.S b/libc/arch-mips64/syscalls/dup.S
new file mode 100644
index 0000000..0a92e57
--- /dev/null
+++ b/libc/arch-mips64/syscalls/dup.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl dup
+ .align 4
+ .ent dup
+
+dup:
+ .set push
+ .set noreorder
+ li v0, __NR_dup
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end dup
diff --git a/libc/arch-mips64/syscalls/dup3.S b/libc/arch-mips64/syscalls/dup3.S
new file mode 100644
index 0000000..e9fba1e
--- /dev/null
+++ b/libc/arch-mips64/syscalls/dup3.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl dup3
+ .align 4
+ .ent dup3
+
+dup3:
+ .set push
+ .set noreorder
+ li v0, __NR_dup3
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end dup3
diff --git a/libc/arch-mips64/syscalls/epoll_create1.S b/libc/arch-mips64/syscalls/epoll_create1.S
new file mode 100644
index 0000000..9c41868
--- /dev/null
+++ b/libc/arch-mips64/syscalls/epoll_create1.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl epoll_create1
+ .align 4
+ .ent epoll_create1
+
+epoll_create1:
+ .set push
+ .set noreorder
+ li v0, __NR_epoll_create1
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end epoll_create1
diff --git a/libc/arch-mips64/syscalls/epoll_ctl.S b/libc/arch-mips64/syscalls/epoll_ctl.S
new file mode 100644
index 0000000..5f18979
--- /dev/null
+++ b/libc/arch-mips64/syscalls/epoll_ctl.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl epoll_ctl
+ .align 4
+ .ent epoll_ctl
+
+epoll_ctl:
+ .set push
+ .set noreorder
+ li v0, __NR_epoll_ctl
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end epoll_ctl
diff --git a/libc/arch-mips64/syscalls/eventfd.S b/libc/arch-mips64/syscalls/eventfd.S
new file mode 100644
index 0000000..9cb87ca
--- /dev/null
+++ b/libc/arch-mips64/syscalls/eventfd.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl eventfd
+ .align 4
+ .ent eventfd
+
+eventfd:
+ .set push
+ .set noreorder
+ li v0, __NR_eventfd2
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end eventfd
diff --git a/libc/arch-mips64/syscalls/execve.S b/libc/arch-mips64/syscalls/execve.S
new file mode 100644
index 0000000..8edfc34
--- /dev/null
+++ b/libc/arch-mips64/syscalls/execve.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl execve
+ .align 4
+ .ent execve
+
+execve:
+ .set push
+ .set noreorder
+ li v0, __NR_execve
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end execve
diff --git a/libc/arch-mips64/syscalls/faccessat.S b/libc/arch-mips64/syscalls/faccessat.S
new file mode 100644
index 0000000..14de073
--- /dev/null
+++ b/libc/arch-mips64/syscalls/faccessat.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl faccessat
+ .align 4
+ .ent faccessat
+
+faccessat:
+ .set push
+ .set noreorder
+ li v0, __NR_faccessat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end faccessat
diff --git a/libc/arch-mips64/syscalls/fallocate.S b/libc/arch-mips64/syscalls/fallocate.S
new file mode 100644
index 0000000..dea8d27
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fallocate.S
@@ -0,0 +1,34 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fallocate
+ .align 4
+ .ent fallocate
+
+fallocate:
+ .set push
+ .set noreorder
+ li v0, __NR_fallocate
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fallocate
+
+ .globl _C_LABEL(fallocate64)
+ .equ _C_LABEL(fallocate64), _C_LABEL(fallocate)
diff --git a/libc/arch-mips64/syscalls/fchdir.S b/libc/arch-mips64/syscalls/fchdir.S
new file mode 100644
index 0000000..1b5e7cb
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fchdir.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fchdir
+ .align 4
+ .ent fchdir
+
+fchdir:
+ .set push
+ .set noreorder
+ li v0, __NR_fchdir
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fchdir
diff --git a/libc/arch-mips64/syscalls/fchmod.S b/libc/arch-mips64/syscalls/fchmod.S
new file mode 100644
index 0000000..b9ce347
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fchmod.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fchmod
+ .align 4
+ .ent fchmod
+
+fchmod:
+ .set push
+ .set noreorder
+ li v0, __NR_fchmod
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fchmod
diff --git a/libc/arch-mips64/syscalls/fchmodat.S b/libc/arch-mips64/syscalls/fchmodat.S
new file mode 100644
index 0000000..f21aea7
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fchmodat.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fchmodat
+ .align 4
+ .ent fchmodat
+
+fchmodat:
+ .set push
+ .set noreorder
+ li v0, __NR_fchmodat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fchmodat
diff --git a/libc/arch-mips64/syscalls/fchown.S b/libc/arch-mips64/syscalls/fchown.S
new file mode 100644
index 0000000..2eb7fa4
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fchown.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fchown
+ .align 4
+ .ent fchown
+
+fchown:
+ .set push
+ .set noreorder
+ li v0, __NR_fchown
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fchown
diff --git a/libc/arch-mips64/syscalls/fchownat.S b/libc/arch-mips64/syscalls/fchownat.S
new file mode 100644
index 0000000..896ba43
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fchownat.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fchownat
+ .align 4
+ .ent fchownat
+
+fchownat:
+ .set push
+ .set noreorder
+ li v0, __NR_fchownat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fchownat
diff --git a/libc/arch-mips64/syscalls/fcntl.S b/libc/arch-mips64/syscalls/fcntl.S
new file mode 100644
index 0000000..755361d
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fcntl.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fcntl
+ .align 4
+ .ent fcntl
+
+fcntl:
+ .set push
+ .set noreorder
+ li v0, __NR_fcntl
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fcntl
diff --git a/libc/arch-mips64/syscalls/fdatasync.S b/libc/arch-mips64/syscalls/fdatasync.S
new file mode 100644
index 0000000..f036248
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fdatasync.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fdatasync
+ .align 4
+ .ent fdatasync
+
+fdatasync:
+ .set push
+ .set noreorder
+ li v0, __NR_fdatasync
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fdatasync
diff --git a/libc/arch-mips64/syscalls/fgetxattr.S b/libc/arch-mips64/syscalls/fgetxattr.S
new file mode 100644
index 0000000..0cd6ad7
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fgetxattr.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fgetxattr
+ .align 4
+ .ent fgetxattr
+
+fgetxattr:
+ .set push
+ .set noreorder
+ li v0, __NR_fgetxattr
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fgetxattr
diff --git a/libc/arch-mips64/syscalls/flistxattr.S b/libc/arch-mips64/syscalls/flistxattr.S
new file mode 100644
index 0000000..2e8961b
--- /dev/null
+++ b/libc/arch-mips64/syscalls/flistxattr.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl flistxattr
+ .align 4
+ .ent flistxattr
+
+flistxattr:
+ .set push
+ .set noreorder
+ li v0, __NR_flistxattr
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end flistxattr
diff --git a/libc/arch-mips64/syscalls/flock.S b/libc/arch-mips64/syscalls/flock.S
new file mode 100644
index 0000000..93051d3
--- /dev/null
+++ b/libc/arch-mips64/syscalls/flock.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl flock
+ .align 4
+ .ent flock
+
+flock:
+ .set push
+ .set noreorder
+ li v0, __NR_flock
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end flock
diff --git a/libc/arch-mips64/syscalls/fremovexattr.S b/libc/arch-mips64/syscalls/fremovexattr.S
new file mode 100644
index 0000000..6ef8c12
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fremovexattr.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fremovexattr
+ .align 4
+ .ent fremovexattr
+
+fremovexattr:
+ .set push
+ .set noreorder
+ li v0, __NR_fremovexattr
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fremovexattr
diff --git a/libc/arch-mips64/syscalls/fsetxattr.S b/libc/arch-mips64/syscalls/fsetxattr.S
new file mode 100644
index 0000000..89e0de7
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fsetxattr.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fsetxattr
+ .align 4
+ .ent fsetxattr
+
+fsetxattr:
+ .set push
+ .set noreorder
+ li v0, __NR_fsetxattr
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fsetxattr
diff --git a/libc/arch-mips64/syscalls/fstat.S b/libc/arch-mips64/syscalls/fstat.S
new file mode 100644
index 0000000..4c3e236
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fstat.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fstat
+ .align 4
+ .ent fstat
+
+fstat:
+ .set push
+ .set noreorder
+ li v0, __NR_fstat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fstat
diff --git a/libc/arch-mips64/syscalls/fstatat.S b/libc/arch-mips64/syscalls/fstatat.S
new file mode 100644
index 0000000..630debe
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fstatat.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fstatat
+ .align 4
+ .ent fstatat
+
+fstatat:
+ .set push
+ .set noreorder
+ li v0, __NR_newfstatat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fstatat
diff --git a/libc/arch-mips64/syscalls/fstatfs.S b/libc/arch-mips64/syscalls/fstatfs.S
new file mode 100644
index 0000000..3e38227
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fstatfs.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fstatfs
+ .align 4
+ .ent fstatfs
+
+fstatfs:
+ .set push
+ .set noreorder
+ li v0, __NR_fstatfs
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fstatfs
diff --git a/libc/arch-mips64/syscalls/fsync.S b/libc/arch-mips64/syscalls/fsync.S
new file mode 100644
index 0000000..08f77f0
--- /dev/null
+++ b/libc/arch-mips64/syscalls/fsync.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl fsync
+ .align 4
+ .ent fsync
+
+fsync:
+ .set push
+ .set noreorder
+ li v0, __NR_fsync
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end fsync
diff --git a/libc/arch-mips64/syscalls/ftruncate.S b/libc/arch-mips64/syscalls/ftruncate.S
new file mode 100644
index 0000000..507825d
--- /dev/null
+++ b/libc/arch-mips64/syscalls/ftruncate.S
@@ -0,0 +1,34 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl ftruncate
+ .align 4
+ .ent ftruncate
+
+ftruncate:
+ .set push
+ .set noreorder
+ li v0, __NR_ftruncate
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end ftruncate
+
+ .globl _C_LABEL(ftruncate64)
+ .equ _C_LABEL(ftruncate64), _C_LABEL(ftruncate)
diff --git a/libc/arch-mips64/syscalls/futex.S b/libc/arch-mips64/syscalls/futex.S
new file mode 100644
index 0000000..edbacba
--- /dev/null
+++ b/libc/arch-mips64/syscalls/futex.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl futex
+ .align 4
+ .ent futex
+
+futex:
+ .set push
+ .set noreorder
+ li v0, __NR_futex
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end futex
diff --git a/libc/arch-mips64/syscalls/getegid.S b/libc/arch-mips64/syscalls/getegid.S
new file mode 100644
index 0000000..d014386
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getegid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getegid
+ .align 4
+ .ent getegid
+
+getegid:
+ .set push
+ .set noreorder
+ li v0, __NR_getegid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getegid
diff --git a/libc/arch-mips64/syscalls/geteuid.S b/libc/arch-mips64/syscalls/geteuid.S
new file mode 100644
index 0000000..ec63f6c
--- /dev/null
+++ b/libc/arch-mips64/syscalls/geteuid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl geteuid
+ .align 4
+ .ent geteuid
+
+geteuid:
+ .set push
+ .set noreorder
+ li v0, __NR_geteuid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end geteuid
diff --git a/libc/arch-mips64/syscalls/getgid.S b/libc/arch-mips64/syscalls/getgid.S
new file mode 100644
index 0000000..531d364
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getgid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getgid
+ .align 4
+ .ent getgid
+
+getgid:
+ .set push
+ .set noreorder
+ li v0, __NR_getgid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getgid
diff --git a/libc/arch-mips64/syscalls/getgroups.S b/libc/arch-mips64/syscalls/getgroups.S
new file mode 100644
index 0000000..b7fcef6
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getgroups.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getgroups
+ .align 4
+ .ent getgroups
+
+getgroups:
+ .set push
+ .set noreorder
+ li v0, __NR_getgroups
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getgroups
diff --git a/libc/arch-mips64/syscalls/getitimer.S b/libc/arch-mips64/syscalls/getitimer.S
new file mode 100644
index 0000000..4f9bc63
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getitimer.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getitimer
+ .align 4
+ .ent getitimer
+
+getitimer:
+ .set push
+ .set noreorder
+ li v0, __NR_getitimer
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getitimer
diff --git a/libc/arch-mips64/syscalls/getpeername.S b/libc/arch-mips64/syscalls/getpeername.S
new file mode 100644
index 0000000..695fe6a
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getpeername.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getpeername
+ .align 4
+ .ent getpeername
+
+getpeername:
+ .set push
+ .set noreorder
+ li v0, __NR_getpeername
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getpeername
diff --git a/libc/arch-mips64/syscalls/getpgid.S b/libc/arch-mips64/syscalls/getpgid.S
new file mode 100644
index 0000000..46787d6
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getpgid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getpgid
+ .align 4
+ .ent getpgid
+
+getpgid:
+ .set push
+ .set noreorder
+ li v0, __NR_getpgid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getpgid
diff --git a/libc/arch-mips64/syscalls/getpid.S b/libc/arch-mips64/syscalls/getpid.S
new file mode 100644
index 0000000..4f3f58f
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getpid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getpid
+ .align 4
+ .ent getpid
+
+getpid:
+ .set push
+ .set noreorder
+ li v0, __NR_getpid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getpid
diff --git a/libc/arch-mips64/syscalls/getppid.S b/libc/arch-mips64/syscalls/getppid.S
new file mode 100644
index 0000000..0bcab00
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getppid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getppid
+ .align 4
+ .ent getppid
+
+getppid:
+ .set push
+ .set noreorder
+ li v0, __NR_getppid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getppid
diff --git a/libc/arch-mips64/syscalls/getresgid.S b/libc/arch-mips64/syscalls/getresgid.S
new file mode 100644
index 0000000..48e605b
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getresgid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getresgid
+ .align 4
+ .ent getresgid
+
+getresgid:
+ .set push
+ .set noreorder
+ li v0, __NR_getresgid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getresgid
diff --git a/libc/arch-mips64/syscalls/getresuid.S b/libc/arch-mips64/syscalls/getresuid.S
new file mode 100644
index 0000000..79987d6
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getresuid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getresuid
+ .align 4
+ .ent getresuid
+
+getresuid:
+ .set push
+ .set noreorder
+ li v0, __NR_getresuid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getresuid
diff --git a/libc/arch-mips64/syscalls/getrlimit.S b/libc/arch-mips64/syscalls/getrlimit.S
new file mode 100644
index 0000000..b944426
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getrlimit.S
@@ -0,0 +1,34 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getrlimit
+ .align 4
+ .ent getrlimit
+
+getrlimit:
+ .set push
+ .set noreorder
+ li v0, __NR_getrlimit
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getrlimit
+
+ .globl _C_LABEL(getrlimit64)
+ .equ _C_LABEL(getrlimit64), _C_LABEL(getrlimit)
diff --git a/libc/arch-mips64/syscalls/getrusage.S b/libc/arch-mips64/syscalls/getrusage.S
new file mode 100644
index 0000000..dd57c38
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getrusage.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getrusage
+ .align 4
+ .ent getrusage
+
+getrusage:
+ .set push
+ .set noreorder
+ li v0, __NR_getrusage
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getrusage
diff --git a/libc/arch-mips64/syscalls/getsid.S b/libc/arch-mips64/syscalls/getsid.S
new file mode 100644
index 0000000..5fb9e1b
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getsid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getsid
+ .align 4
+ .ent getsid
+
+getsid:
+ .set push
+ .set noreorder
+ li v0, __NR_getsid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getsid
diff --git a/libc/arch-mips64/syscalls/getsockname.S b/libc/arch-mips64/syscalls/getsockname.S
new file mode 100644
index 0000000..44026bf
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getsockname.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getsockname
+ .align 4
+ .ent getsockname
+
+getsockname:
+ .set push
+ .set noreorder
+ li v0, __NR_getsockname
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getsockname
diff --git a/libc/arch-mips64/syscalls/getsockopt.S b/libc/arch-mips64/syscalls/getsockopt.S
new file mode 100644
index 0000000..8493faa
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getsockopt.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getsockopt
+ .align 4
+ .ent getsockopt
+
+getsockopt:
+ .set push
+ .set noreorder
+ li v0, __NR_getsockopt
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getsockopt
diff --git a/libc/arch-mips64/syscalls/gettid.S b/libc/arch-mips64/syscalls/gettid.S
new file mode 100644
index 0000000..e03bb4e
--- /dev/null
+++ b/libc/arch-mips64/syscalls/gettid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl gettid
+ .align 4
+ .ent gettid
+
+gettid:
+ .set push
+ .set noreorder
+ li v0, __NR_gettid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end gettid
diff --git a/libc/arch-mips64/syscalls/gettimeofday.S b/libc/arch-mips64/syscalls/gettimeofday.S
new file mode 100644
index 0000000..e1e5c04
--- /dev/null
+++ b/libc/arch-mips64/syscalls/gettimeofday.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl gettimeofday
+ .align 4
+ .ent gettimeofday
+
+gettimeofday:
+ .set push
+ .set noreorder
+ li v0, __NR_gettimeofday
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end gettimeofday
diff --git a/libc/arch-mips64/syscalls/getuid.S b/libc/arch-mips64/syscalls/getuid.S
new file mode 100644
index 0000000..e48f4a6
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getuid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getuid
+ .align 4
+ .ent getuid
+
+getuid:
+ .set push
+ .set noreorder
+ li v0, __NR_getuid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getuid
diff --git a/libc/arch-mips64/syscalls/getxattr.S b/libc/arch-mips64/syscalls/getxattr.S
new file mode 100644
index 0000000..b46e4d9
--- /dev/null
+++ b/libc/arch-mips64/syscalls/getxattr.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl getxattr
+ .align 4
+ .ent getxattr
+
+getxattr:
+ .set push
+ .set noreorder
+ li v0, __NR_getxattr
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end getxattr
diff --git a/libc/arch-mips64/syscalls/init_module.S b/libc/arch-mips64/syscalls/init_module.S
new file mode 100644
index 0000000..c5b2bcf
--- /dev/null
+++ b/libc/arch-mips64/syscalls/init_module.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl init_module
+ .align 4
+ .ent init_module
+
+init_module:
+ .set push
+ .set noreorder
+ li v0, __NR_init_module
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end init_module
diff --git a/libc/arch-mips64/syscalls/inotify_add_watch.S b/libc/arch-mips64/syscalls/inotify_add_watch.S
new file mode 100644
index 0000000..c4c8dbf
--- /dev/null
+++ b/libc/arch-mips64/syscalls/inotify_add_watch.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl inotify_add_watch
+ .align 4
+ .ent inotify_add_watch
+
+inotify_add_watch:
+ .set push
+ .set noreorder
+ li v0, __NR_inotify_add_watch
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end inotify_add_watch
diff --git a/libc/arch-mips64/syscalls/inotify_init1.S b/libc/arch-mips64/syscalls/inotify_init1.S
new file mode 100644
index 0000000..b0c7dcc
--- /dev/null
+++ b/libc/arch-mips64/syscalls/inotify_init1.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl inotify_init1
+ .align 4
+ .ent inotify_init1
+
+inotify_init1:
+ .set push
+ .set noreorder
+ li v0, __NR_inotify_init1
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end inotify_init1
diff --git a/libc/arch-mips64/syscalls/inotify_rm_watch.S b/libc/arch-mips64/syscalls/inotify_rm_watch.S
new file mode 100644
index 0000000..4b6078e
--- /dev/null
+++ b/libc/arch-mips64/syscalls/inotify_rm_watch.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl inotify_rm_watch
+ .align 4
+ .ent inotify_rm_watch
+
+inotify_rm_watch:
+ .set push
+ .set noreorder
+ li v0, __NR_inotify_rm_watch
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end inotify_rm_watch
diff --git a/libc/arch-mips64/syscalls/ioprio_get.S b/libc/arch-mips64/syscalls/ioprio_get.S
new file mode 100644
index 0000000..ebb4375
--- /dev/null
+++ b/libc/arch-mips64/syscalls/ioprio_get.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl ioprio_get
+ .align 4
+ .ent ioprio_get
+
+ioprio_get:
+ .set push
+ .set noreorder
+ li v0, __NR_ioprio_get
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end ioprio_get
diff --git a/libc/arch-mips64/syscalls/ioprio_set.S b/libc/arch-mips64/syscalls/ioprio_set.S
new file mode 100644
index 0000000..44daba9
--- /dev/null
+++ b/libc/arch-mips64/syscalls/ioprio_set.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl ioprio_set
+ .align 4
+ .ent ioprio_set
+
+ioprio_set:
+ .set push
+ .set noreorder
+ li v0, __NR_ioprio_set
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end ioprio_set
diff --git a/libc/arch-mips64/syscalls/kill.S b/libc/arch-mips64/syscalls/kill.S
new file mode 100644
index 0000000..2e4aa42
--- /dev/null
+++ b/libc/arch-mips64/syscalls/kill.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl kill
+ .align 4
+ .ent kill
+
+kill:
+ .set push
+ .set noreorder
+ li v0, __NR_kill
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end kill
diff --git a/libc/arch-mips64/syscalls/klogctl.S b/libc/arch-mips64/syscalls/klogctl.S
new file mode 100644
index 0000000..1c10f95
--- /dev/null
+++ b/libc/arch-mips64/syscalls/klogctl.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl klogctl
+ .align 4
+ .ent klogctl
+
+klogctl:
+ .set push
+ .set noreorder
+ li v0, __NR_syslog
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end klogctl
diff --git a/libc/arch-mips64/syscalls/lgetxattr.S b/libc/arch-mips64/syscalls/lgetxattr.S
new file mode 100644
index 0000000..c402e81
--- /dev/null
+++ b/libc/arch-mips64/syscalls/lgetxattr.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl lgetxattr
+ .align 4
+ .ent lgetxattr
+
+lgetxattr:
+ .set push
+ .set noreorder
+ li v0, __NR_lgetxattr
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end lgetxattr
diff --git a/libc/arch-mips64/syscalls/linkat.S b/libc/arch-mips64/syscalls/linkat.S
new file mode 100644
index 0000000..e734144
--- /dev/null
+++ b/libc/arch-mips64/syscalls/linkat.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl linkat
+ .align 4
+ .ent linkat
+
+linkat:
+ .set push
+ .set noreorder
+ li v0, __NR_linkat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end linkat
diff --git a/libc/arch-mips64/syscalls/listen.S b/libc/arch-mips64/syscalls/listen.S
new file mode 100644
index 0000000..93c1d52
--- /dev/null
+++ b/libc/arch-mips64/syscalls/listen.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl listen
+ .align 4
+ .ent listen
+
+listen:
+ .set push
+ .set noreorder
+ li v0, __NR_listen
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end listen
diff --git a/libc/arch-mips64/syscalls/listxattr.S b/libc/arch-mips64/syscalls/listxattr.S
new file mode 100644
index 0000000..f00402f
--- /dev/null
+++ b/libc/arch-mips64/syscalls/listxattr.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl listxattr
+ .align 4
+ .ent listxattr
+
+listxattr:
+ .set push
+ .set noreorder
+ li v0, __NR_listxattr
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end listxattr
diff --git a/libc/arch-mips64/syscalls/llistxattr.S b/libc/arch-mips64/syscalls/llistxattr.S
new file mode 100644
index 0000000..2628185
--- /dev/null
+++ b/libc/arch-mips64/syscalls/llistxattr.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl llistxattr
+ .align 4
+ .ent llistxattr
+
+llistxattr:
+ .set push
+ .set noreorder
+ li v0, __NR_llistxattr
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end llistxattr
diff --git a/libc/arch-mips64/syscalls/lremovexattr.S b/libc/arch-mips64/syscalls/lremovexattr.S
new file mode 100644
index 0000000..ef486cb
--- /dev/null
+++ b/libc/arch-mips64/syscalls/lremovexattr.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl lremovexattr
+ .align 4
+ .ent lremovexattr
+
+lremovexattr:
+ .set push
+ .set noreorder
+ li v0, __NR_lremovexattr
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end lremovexattr
diff --git a/libc/arch-mips64/syscalls/lseek.S b/libc/arch-mips64/syscalls/lseek.S
new file mode 100644
index 0000000..79c8dec
--- /dev/null
+++ b/libc/arch-mips64/syscalls/lseek.S
@@ -0,0 +1,34 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl lseek
+ .align 4
+ .ent lseek
+
+lseek:
+ .set push
+ .set noreorder
+ li v0, __NR_lseek
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end lseek
+
+ .globl _C_LABEL(lseek64)
+ .equ _C_LABEL(lseek64), _C_LABEL(lseek)
diff --git a/libc/arch-mips64/syscalls/lsetxattr.S b/libc/arch-mips64/syscalls/lsetxattr.S
new file mode 100644
index 0000000..14a1aae
--- /dev/null
+++ b/libc/arch-mips64/syscalls/lsetxattr.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl lsetxattr
+ .align 4
+ .ent lsetxattr
+
+lsetxattr:
+ .set push
+ .set noreorder
+ li v0, __NR_lsetxattr
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end lsetxattr
diff --git a/libc/arch-mips64/syscalls/madvise.S b/libc/arch-mips64/syscalls/madvise.S
new file mode 100644
index 0000000..8ca4124
--- /dev/null
+++ b/libc/arch-mips64/syscalls/madvise.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl madvise
+ .align 4
+ .ent madvise
+
+madvise:
+ .set push
+ .set noreorder
+ li v0, __NR_madvise
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end madvise
diff --git a/libc/arch-mips64/syscalls/mincore.S b/libc/arch-mips64/syscalls/mincore.S
new file mode 100644
index 0000000..9dbd21c
--- /dev/null
+++ b/libc/arch-mips64/syscalls/mincore.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl mincore
+ .align 4
+ .ent mincore
+
+mincore:
+ .set push
+ .set noreorder
+ li v0, __NR_mincore
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end mincore
diff --git a/libc/arch-mips64/syscalls/mkdirat.S b/libc/arch-mips64/syscalls/mkdirat.S
new file mode 100644
index 0000000..e652b23
--- /dev/null
+++ b/libc/arch-mips64/syscalls/mkdirat.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl mkdirat
+ .align 4
+ .ent mkdirat
+
+mkdirat:
+ .set push
+ .set noreorder
+ li v0, __NR_mkdirat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end mkdirat
diff --git a/libc/arch-mips64/syscalls/mknodat.S b/libc/arch-mips64/syscalls/mknodat.S
new file mode 100644
index 0000000..1cedbb4
--- /dev/null
+++ b/libc/arch-mips64/syscalls/mknodat.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl mknodat
+ .align 4
+ .ent mknodat
+
+mknodat:
+ .set push
+ .set noreorder
+ li v0, __NR_mknodat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end mknodat
diff --git a/libc/arch-mips64/syscalls/mlock.S b/libc/arch-mips64/syscalls/mlock.S
new file mode 100644
index 0000000..18ab4ba
--- /dev/null
+++ b/libc/arch-mips64/syscalls/mlock.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl mlock
+ .align 4
+ .ent mlock
+
+mlock:
+ .set push
+ .set noreorder
+ li v0, __NR_mlock
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end mlock
diff --git a/libc/arch-mips64/syscalls/mlockall.S b/libc/arch-mips64/syscalls/mlockall.S
new file mode 100644
index 0000000..50fb23c
--- /dev/null
+++ b/libc/arch-mips64/syscalls/mlockall.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl mlockall
+ .align 4
+ .ent mlockall
+
+mlockall:
+ .set push
+ .set noreorder
+ li v0, __NR_mlockall
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end mlockall
diff --git a/libc/arch-mips64/syscalls/mmap.S b/libc/arch-mips64/syscalls/mmap.S
new file mode 100644
index 0000000..1cde691
--- /dev/null
+++ b/libc/arch-mips64/syscalls/mmap.S
@@ -0,0 +1,34 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl mmap
+ .align 4
+ .ent mmap
+
+mmap:
+ .set push
+ .set noreorder
+ li v0, __NR_mmap
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end mmap
+
+ .globl _C_LABEL(mmap64)
+ .equ _C_LABEL(mmap64), _C_LABEL(mmap)
diff --git a/libc/arch-mips64/syscalls/mount.S b/libc/arch-mips64/syscalls/mount.S
new file mode 100644
index 0000000..595585e
--- /dev/null
+++ b/libc/arch-mips64/syscalls/mount.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl mount
+ .align 4
+ .ent mount
+
+mount:
+ .set push
+ .set noreorder
+ li v0, __NR_mount
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end mount
diff --git a/libc/arch-mips64/syscalls/mprotect.S b/libc/arch-mips64/syscalls/mprotect.S
new file mode 100644
index 0000000..77d9207
--- /dev/null
+++ b/libc/arch-mips64/syscalls/mprotect.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl mprotect
+ .align 4
+ .ent mprotect
+
+mprotect:
+ .set push
+ .set noreorder
+ li v0, __NR_mprotect
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end mprotect
diff --git a/libc/arch-mips64/syscalls/mremap.S b/libc/arch-mips64/syscalls/mremap.S
new file mode 100644
index 0000000..33be57f
--- /dev/null
+++ b/libc/arch-mips64/syscalls/mremap.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl mremap
+ .align 4
+ .ent mremap
+
+mremap:
+ .set push
+ .set noreorder
+ li v0, __NR_mremap
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end mremap
diff --git a/libc/arch-mips64/syscalls/msync.S b/libc/arch-mips64/syscalls/msync.S
new file mode 100644
index 0000000..a5e29f6
--- /dev/null
+++ b/libc/arch-mips64/syscalls/msync.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl msync
+ .align 4
+ .ent msync
+
+msync:
+ .set push
+ .set noreorder
+ li v0, __NR_msync
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end msync
diff --git a/libc/arch-mips64/syscalls/munlock.S b/libc/arch-mips64/syscalls/munlock.S
new file mode 100644
index 0000000..4d9000a
--- /dev/null
+++ b/libc/arch-mips64/syscalls/munlock.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl munlock
+ .align 4
+ .ent munlock
+
+munlock:
+ .set push
+ .set noreorder
+ li v0, __NR_munlock
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end munlock
diff --git a/libc/arch-mips64/syscalls/munlockall.S b/libc/arch-mips64/syscalls/munlockall.S
new file mode 100644
index 0000000..f8a1ff4
--- /dev/null
+++ b/libc/arch-mips64/syscalls/munlockall.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl munlockall
+ .align 4
+ .ent munlockall
+
+munlockall:
+ .set push
+ .set noreorder
+ li v0, __NR_munlockall
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end munlockall
diff --git a/libc/arch-mips64/syscalls/munmap.S b/libc/arch-mips64/syscalls/munmap.S
new file mode 100644
index 0000000..a7e65a7
--- /dev/null
+++ b/libc/arch-mips64/syscalls/munmap.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl munmap
+ .align 4
+ .ent munmap
+
+munmap:
+ .set push
+ .set noreorder
+ li v0, __NR_munmap
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end munmap
diff --git a/libc/arch-mips64/syscalls/nanosleep.S b/libc/arch-mips64/syscalls/nanosleep.S
new file mode 100644
index 0000000..a3838de
--- /dev/null
+++ b/libc/arch-mips64/syscalls/nanosleep.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl nanosleep
+ .align 4
+ .ent nanosleep
+
+nanosleep:
+ .set push
+ .set noreorder
+ li v0, __NR_nanosleep
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end nanosleep
diff --git a/libc/arch-mips64/syscalls/perf_event_open.S b/libc/arch-mips64/syscalls/perf_event_open.S
new file mode 100644
index 0000000..14465fb
--- /dev/null
+++ b/libc/arch-mips64/syscalls/perf_event_open.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl perf_event_open
+ .align 4
+ .ent perf_event_open
+
+perf_event_open:
+ .set push
+ .set noreorder
+ li v0, __NR_perf_event_open
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end perf_event_open
diff --git a/libc/arch-mips64/syscalls/personality.S b/libc/arch-mips64/syscalls/personality.S
new file mode 100644
index 0000000..af39ee6
--- /dev/null
+++ b/libc/arch-mips64/syscalls/personality.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl personality
+ .align 4
+ .ent personality
+
+personality:
+ .set push
+ .set noreorder
+ li v0, __NR_personality
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end personality
diff --git a/libc/arch-mips64/syscalls/pipe2.S b/libc/arch-mips64/syscalls/pipe2.S
new file mode 100644
index 0000000..4e06258
--- /dev/null
+++ b/libc/arch-mips64/syscalls/pipe2.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl pipe2
+ .align 4
+ .ent pipe2
+
+pipe2:
+ .set push
+ .set noreorder
+ li v0, __NR_pipe2
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end pipe2
diff --git a/libc/arch-mips64/syscalls/prctl.S b/libc/arch-mips64/syscalls/prctl.S
new file mode 100644
index 0000000..122a28e
--- /dev/null
+++ b/libc/arch-mips64/syscalls/prctl.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl prctl
+ .align 4
+ .ent prctl
+
+prctl:
+ .set push
+ .set noreorder
+ li v0, __NR_prctl
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end prctl
diff --git a/libc/arch-mips64/syscalls/pread64.S b/libc/arch-mips64/syscalls/pread64.S
new file mode 100644
index 0000000..b752147
--- /dev/null
+++ b/libc/arch-mips64/syscalls/pread64.S
@@ -0,0 +1,34 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl pread64
+ .align 4
+ .ent pread64
+
+pread64:
+ .set push
+ .set noreorder
+ li v0, __NR_pread64
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end pread64
+
+ .globl _C_LABEL(pread)
+ .equ _C_LABEL(pread), _C_LABEL(pread64)
diff --git a/libc/arch-mips64/syscalls/prlimit64.S b/libc/arch-mips64/syscalls/prlimit64.S
new file mode 100644
index 0000000..dea308f
--- /dev/null
+++ b/libc/arch-mips64/syscalls/prlimit64.S
@@ -0,0 +1,34 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl prlimit64
+ .align 4
+ .ent prlimit64
+
+prlimit64:
+ .set push
+ .set noreorder
+ li v0, __NR_prlimit64
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end prlimit64
+
+ .globl _C_LABEL(prlimit)
+ .equ _C_LABEL(prlimit), _C_LABEL(prlimit64)
diff --git a/libc/arch-mips64/syscalls/pwrite64.S b/libc/arch-mips64/syscalls/pwrite64.S
new file mode 100644
index 0000000..b168ddf
--- /dev/null
+++ b/libc/arch-mips64/syscalls/pwrite64.S
@@ -0,0 +1,34 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl pwrite64
+ .align 4
+ .ent pwrite64
+
+pwrite64:
+ .set push
+ .set noreorder
+ li v0, __NR_pwrite64
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end pwrite64
+
+ .globl _C_LABEL(pwrite)
+ .equ _C_LABEL(pwrite), _C_LABEL(pwrite64)
diff --git a/libc/arch-mips64/syscalls/read.S b/libc/arch-mips64/syscalls/read.S
new file mode 100644
index 0000000..4d8c51d
--- /dev/null
+++ b/libc/arch-mips64/syscalls/read.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl read
+ .align 4
+ .ent read
+
+read:
+ .set push
+ .set noreorder
+ li v0, __NR_read
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end read
diff --git a/libc/arch-mips64/syscalls/readahead.S b/libc/arch-mips64/syscalls/readahead.S
new file mode 100644
index 0000000..5ab1dcb
--- /dev/null
+++ b/libc/arch-mips64/syscalls/readahead.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl readahead
+ .align 4
+ .ent readahead
+
+readahead:
+ .set push
+ .set noreorder
+ li v0, __NR_readahead
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end readahead
diff --git a/libc/arch-mips64/syscalls/readlinkat.S b/libc/arch-mips64/syscalls/readlinkat.S
new file mode 100644
index 0000000..8e91dcf
--- /dev/null
+++ b/libc/arch-mips64/syscalls/readlinkat.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl readlinkat
+ .align 4
+ .ent readlinkat
+
+readlinkat:
+ .set push
+ .set noreorder
+ li v0, __NR_readlinkat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end readlinkat
diff --git a/libc/arch-mips64/syscalls/readv.S b/libc/arch-mips64/syscalls/readv.S
new file mode 100644
index 0000000..e248942
--- /dev/null
+++ b/libc/arch-mips64/syscalls/readv.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl readv
+ .align 4
+ .ent readv
+
+readv:
+ .set push
+ .set noreorder
+ li v0, __NR_readv
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end readv
diff --git a/libc/arch-mips64/syscalls/recvfrom.S b/libc/arch-mips64/syscalls/recvfrom.S
new file mode 100644
index 0000000..818dc8e
--- /dev/null
+++ b/libc/arch-mips64/syscalls/recvfrom.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl recvfrom
+ .align 4
+ .ent recvfrom
+
+recvfrom:
+ .set push
+ .set noreorder
+ li v0, __NR_recvfrom
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end recvfrom
diff --git a/libc/arch-mips64/syscalls/recvmsg.S b/libc/arch-mips64/syscalls/recvmsg.S
new file mode 100644
index 0000000..06d8826
--- /dev/null
+++ b/libc/arch-mips64/syscalls/recvmsg.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl recvmsg
+ .align 4
+ .ent recvmsg
+
+recvmsg:
+ .set push
+ .set noreorder
+ li v0, __NR_recvmsg
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end recvmsg
diff --git a/libc/arch-mips64/syscalls/removexattr.S b/libc/arch-mips64/syscalls/removexattr.S
new file mode 100644
index 0000000..8b0d056
--- /dev/null
+++ b/libc/arch-mips64/syscalls/removexattr.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl removexattr
+ .align 4
+ .ent removexattr
+
+removexattr:
+ .set push
+ .set noreorder
+ li v0, __NR_removexattr
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end removexattr
diff --git a/libc/arch-mips64/syscalls/renameat.S b/libc/arch-mips64/syscalls/renameat.S
new file mode 100644
index 0000000..fdf24db
--- /dev/null
+++ b/libc/arch-mips64/syscalls/renameat.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl renameat
+ .align 4
+ .ent renameat
+
+renameat:
+ .set push
+ .set noreorder
+ li v0, __NR_renameat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end renameat
diff --git a/libc/arch-mips64/syscalls/sched_get_priority_max.S b/libc/arch-mips64/syscalls/sched_get_priority_max.S
new file mode 100644
index 0000000..c84ab98
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sched_get_priority_max.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sched_get_priority_max
+ .align 4
+ .ent sched_get_priority_max
+
+sched_get_priority_max:
+ .set push
+ .set noreorder
+ li v0, __NR_sched_get_priority_max
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sched_get_priority_max
diff --git a/libc/arch-mips64/syscalls/sched_get_priority_min.S b/libc/arch-mips64/syscalls/sched_get_priority_min.S
new file mode 100644
index 0000000..d9ab4ec
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sched_get_priority_min.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sched_get_priority_min
+ .align 4
+ .ent sched_get_priority_min
+
+sched_get_priority_min:
+ .set push
+ .set noreorder
+ li v0, __NR_sched_get_priority_min
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sched_get_priority_min
diff --git a/libc/arch-mips64/syscalls/sched_getparam.S b/libc/arch-mips64/syscalls/sched_getparam.S
new file mode 100644
index 0000000..9f40fe4
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sched_getparam.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sched_getparam
+ .align 4
+ .ent sched_getparam
+
+sched_getparam:
+ .set push
+ .set noreorder
+ li v0, __NR_sched_getparam
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sched_getparam
diff --git a/libc/arch-mips64/syscalls/sched_getscheduler.S b/libc/arch-mips64/syscalls/sched_getscheduler.S
new file mode 100644
index 0000000..e263f61
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sched_getscheduler.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sched_getscheduler
+ .align 4
+ .ent sched_getscheduler
+
+sched_getscheduler:
+ .set push
+ .set noreorder
+ li v0, __NR_sched_getscheduler
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sched_getscheduler
diff --git a/libc/arch-mips64/syscalls/sched_rr_get_interval.S b/libc/arch-mips64/syscalls/sched_rr_get_interval.S
new file mode 100644
index 0000000..a3bba28
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sched_rr_get_interval.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sched_rr_get_interval
+ .align 4
+ .ent sched_rr_get_interval
+
+sched_rr_get_interval:
+ .set push
+ .set noreorder
+ li v0, __NR_sched_rr_get_interval
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sched_rr_get_interval
diff --git a/libc/arch-mips64/syscalls/sched_setaffinity.S b/libc/arch-mips64/syscalls/sched_setaffinity.S
new file mode 100644
index 0000000..35bfb30
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sched_setaffinity.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sched_setaffinity
+ .align 4
+ .ent sched_setaffinity
+
+sched_setaffinity:
+ .set push
+ .set noreorder
+ li v0, __NR_sched_setaffinity
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sched_setaffinity
diff --git a/libc/arch-mips64/syscalls/sched_setparam.S b/libc/arch-mips64/syscalls/sched_setparam.S
new file mode 100644
index 0000000..714fcc9
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sched_setparam.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sched_setparam
+ .align 4
+ .ent sched_setparam
+
+sched_setparam:
+ .set push
+ .set noreorder
+ li v0, __NR_sched_setparam
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sched_setparam
diff --git a/libc/arch-mips64/syscalls/sched_setscheduler.S b/libc/arch-mips64/syscalls/sched_setscheduler.S
new file mode 100644
index 0000000..4fe5783
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sched_setscheduler.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sched_setscheduler
+ .align 4
+ .ent sched_setscheduler
+
+sched_setscheduler:
+ .set push
+ .set noreorder
+ li v0, __NR_sched_setscheduler
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sched_setscheduler
diff --git a/libc/arch-mips64/syscalls/sched_yield.S b/libc/arch-mips64/syscalls/sched_yield.S
new file mode 100644
index 0000000..b2542a3
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sched_yield.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sched_yield
+ .align 4
+ .ent sched_yield
+
+sched_yield:
+ .set push
+ .set noreorder
+ li v0, __NR_sched_yield
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sched_yield
diff --git a/libc/arch-mips64/syscalls/sendfile.S b/libc/arch-mips64/syscalls/sendfile.S
new file mode 100644
index 0000000..1876239
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sendfile.S
@@ -0,0 +1,34 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sendfile
+ .align 4
+ .ent sendfile
+
+sendfile:
+ .set push
+ .set noreorder
+ li v0, __NR_sendfile
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sendfile
+
+ .globl _C_LABEL(sendfile64)
+ .equ _C_LABEL(sendfile64), _C_LABEL(sendfile)
diff --git a/libc/arch-mips64/syscalls/sendmsg.S b/libc/arch-mips64/syscalls/sendmsg.S
new file mode 100644
index 0000000..72227f7
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sendmsg.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sendmsg
+ .align 4
+ .ent sendmsg
+
+sendmsg:
+ .set push
+ .set noreorder
+ li v0, __NR_sendmsg
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sendmsg
diff --git a/libc/arch-mips64/syscalls/sendto.S b/libc/arch-mips64/syscalls/sendto.S
new file mode 100644
index 0000000..dbb4c56
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sendto.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sendto
+ .align 4
+ .ent sendto
+
+sendto:
+ .set push
+ .set noreorder
+ li v0, __NR_sendto
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sendto
diff --git a/libc/arch-mips64/syscalls/setgid.S b/libc/arch-mips64/syscalls/setgid.S
new file mode 100644
index 0000000..3d9b5d4
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setgid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setgid
+ .align 4
+ .ent setgid
+
+setgid:
+ .set push
+ .set noreorder
+ li v0, __NR_setgid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setgid
diff --git a/libc/arch-mips64/syscalls/setgroups.S b/libc/arch-mips64/syscalls/setgroups.S
new file mode 100644
index 0000000..c4dc713
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setgroups.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setgroups
+ .align 4
+ .ent setgroups
+
+setgroups:
+ .set push
+ .set noreorder
+ li v0, __NR_setgroups
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setgroups
diff --git a/libc/arch-mips64/syscalls/setitimer.S b/libc/arch-mips64/syscalls/setitimer.S
new file mode 100644
index 0000000..b1969d0
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setitimer.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setitimer
+ .align 4
+ .ent setitimer
+
+setitimer:
+ .set push
+ .set noreorder
+ li v0, __NR_setitimer
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setitimer
diff --git a/libc/arch-mips64/syscalls/setns.S b/libc/arch-mips64/syscalls/setns.S
new file mode 100644
index 0000000..3073aad
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setns.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setns
+ .align 4
+ .ent setns
+
+setns:
+ .set push
+ .set noreorder
+ li v0, __NR_setns
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setns
diff --git a/libc/arch-mips64/syscalls/setpgid.S b/libc/arch-mips64/syscalls/setpgid.S
new file mode 100644
index 0000000..171ed17
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setpgid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setpgid
+ .align 4
+ .ent setpgid
+
+setpgid:
+ .set push
+ .set noreorder
+ li v0, __NR_setpgid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setpgid
diff --git a/libc/arch-mips64/syscalls/setpriority.S b/libc/arch-mips64/syscalls/setpriority.S
new file mode 100644
index 0000000..a73c155
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setpriority.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setpriority
+ .align 4
+ .ent setpriority
+
+setpriority:
+ .set push
+ .set noreorder
+ li v0, __NR_setpriority
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setpriority
diff --git a/libc/arch-mips64/syscalls/setregid.S b/libc/arch-mips64/syscalls/setregid.S
new file mode 100644
index 0000000..14217ba
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setregid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setregid
+ .align 4
+ .ent setregid
+
+setregid:
+ .set push
+ .set noreorder
+ li v0, __NR_setregid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setregid
diff --git a/libc/arch-mips64/syscalls/setresgid.S b/libc/arch-mips64/syscalls/setresgid.S
new file mode 100644
index 0000000..9e35dde
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setresgid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setresgid
+ .align 4
+ .ent setresgid
+
+setresgid:
+ .set push
+ .set noreorder
+ li v0, __NR_setresgid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setresgid
diff --git a/libc/arch-mips64/syscalls/setresuid.S b/libc/arch-mips64/syscalls/setresuid.S
new file mode 100644
index 0000000..fdd28a9
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setresuid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setresuid
+ .align 4
+ .ent setresuid
+
+setresuid:
+ .set push
+ .set noreorder
+ li v0, __NR_setresuid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setresuid
diff --git a/libc/arch-mips64/syscalls/setreuid.S b/libc/arch-mips64/syscalls/setreuid.S
new file mode 100644
index 0000000..db50c6c
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setreuid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setreuid
+ .align 4
+ .ent setreuid
+
+setreuid:
+ .set push
+ .set noreorder
+ li v0, __NR_setreuid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setreuid
diff --git a/libc/arch-mips64/syscalls/setrlimit.S b/libc/arch-mips64/syscalls/setrlimit.S
new file mode 100644
index 0000000..e512c1d
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setrlimit.S
@@ -0,0 +1,34 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setrlimit
+ .align 4
+ .ent setrlimit
+
+setrlimit:
+ .set push
+ .set noreorder
+ li v0, __NR_setrlimit
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setrlimit
+
+ .globl _C_LABEL(setrlimit64)
+ .equ _C_LABEL(setrlimit64), _C_LABEL(setrlimit)
diff --git a/libc/arch-mips64/syscalls/setsid.S b/libc/arch-mips64/syscalls/setsid.S
new file mode 100644
index 0000000..b1b340f
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setsid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setsid
+ .align 4
+ .ent setsid
+
+setsid:
+ .set push
+ .set noreorder
+ li v0, __NR_setsid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setsid
diff --git a/libc/arch-mips64/syscalls/setsockopt.S b/libc/arch-mips64/syscalls/setsockopt.S
new file mode 100644
index 0000000..55cce5f
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setsockopt.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setsockopt
+ .align 4
+ .ent setsockopt
+
+setsockopt:
+ .set push
+ .set noreorder
+ li v0, __NR_setsockopt
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setsockopt
diff --git a/libc/arch-mips64/syscalls/settimeofday.S b/libc/arch-mips64/syscalls/settimeofday.S
new file mode 100644
index 0000000..72802e2
--- /dev/null
+++ b/libc/arch-mips64/syscalls/settimeofday.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl settimeofday
+ .align 4
+ .ent settimeofday
+
+settimeofday:
+ .set push
+ .set noreorder
+ li v0, __NR_settimeofday
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end settimeofday
diff --git a/libc/arch-mips64/syscalls/setuid.S b/libc/arch-mips64/syscalls/setuid.S
new file mode 100644
index 0000000..d8edd22
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setuid.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setuid
+ .align 4
+ .ent setuid
+
+setuid:
+ .set push
+ .set noreorder
+ li v0, __NR_setuid
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setuid
diff --git a/libc/arch-mips64/syscalls/setxattr.S b/libc/arch-mips64/syscalls/setxattr.S
new file mode 100644
index 0000000..9ccc378
--- /dev/null
+++ b/libc/arch-mips64/syscalls/setxattr.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl setxattr
+ .align 4
+ .ent setxattr
+
+setxattr:
+ .set push
+ .set noreorder
+ li v0, __NR_setxattr
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end setxattr
diff --git a/libc/arch-mips64/syscalls/shutdown.S b/libc/arch-mips64/syscalls/shutdown.S
new file mode 100644
index 0000000..335ed41
--- /dev/null
+++ b/libc/arch-mips64/syscalls/shutdown.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl shutdown
+ .align 4
+ .ent shutdown
+
+shutdown:
+ .set push
+ .set noreorder
+ li v0, __NR_shutdown
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end shutdown
diff --git a/libc/arch-mips64/syscalls/sigaltstack.S b/libc/arch-mips64/syscalls/sigaltstack.S
new file mode 100644
index 0000000..3458b11
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sigaltstack.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sigaltstack
+ .align 4
+ .ent sigaltstack
+
+sigaltstack:
+ .set push
+ .set noreorder
+ li v0, __NR_sigaltstack
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sigaltstack
diff --git a/libc/arch-mips64/syscalls/signalfd4.S b/libc/arch-mips64/syscalls/signalfd4.S
new file mode 100644
index 0000000..ef1d1e5
--- /dev/null
+++ b/libc/arch-mips64/syscalls/signalfd4.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl signalfd4
+ .align 4
+ .ent signalfd4
+
+signalfd4:
+ .set push
+ .set noreorder
+ li v0, __NR_signalfd4
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end signalfd4
diff --git a/libc/arch-mips64/syscalls/socket.S b/libc/arch-mips64/syscalls/socket.S
new file mode 100644
index 0000000..6b042c2
--- /dev/null
+++ b/libc/arch-mips64/syscalls/socket.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl socket
+ .align 4
+ .ent socket
+
+socket:
+ .set push
+ .set noreorder
+ li v0, __NR_socket
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end socket
diff --git a/libc/arch-mips64/syscalls/socketpair.S b/libc/arch-mips64/syscalls/socketpair.S
new file mode 100644
index 0000000..b4ca8f4
--- /dev/null
+++ b/libc/arch-mips64/syscalls/socketpair.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl socketpair
+ .align 4
+ .ent socketpair
+
+socketpair:
+ .set push
+ .set noreorder
+ li v0, __NR_socketpair
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end socketpair
diff --git a/libc/arch-mips64/syscalls/statfs.S b/libc/arch-mips64/syscalls/statfs.S
new file mode 100644
index 0000000..4711b1a
--- /dev/null
+++ b/libc/arch-mips64/syscalls/statfs.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl statfs
+ .align 4
+ .ent statfs
+
+statfs:
+ .set push
+ .set noreorder
+ li v0, __NR_statfs
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end statfs
diff --git a/libc/arch-mips64/syscalls/swapoff.S b/libc/arch-mips64/syscalls/swapoff.S
new file mode 100644
index 0000000..8041188
--- /dev/null
+++ b/libc/arch-mips64/syscalls/swapoff.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl swapoff
+ .align 4
+ .ent swapoff
+
+swapoff:
+ .set push
+ .set noreorder
+ li v0, __NR_swapoff
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end swapoff
diff --git a/libc/arch-mips64/syscalls/swapon.S b/libc/arch-mips64/syscalls/swapon.S
new file mode 100644
index 0000000..5c24d7c
--- /dev/null
+++ b/libc/arch-mips64/syscalls/swapon.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl swapon
+ .align 4
+ .ent swapon
+
+swapon:
+ .set push
+ .set noreorder
+ li v0, __NR_swapon
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end swapon
diff --git a/libc/arch-mips64/syscalls/symlinkat.S b/libc/arch-mips64/syscalls/symlinkat.S
new file mode 100644
index 0000000..ce86d86
--- /dev/null
+++ b/libc/arch-mips64/syscalls/symlinkat.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl symlinkat
+ .align 4
+ .ent symlinkat
+
+symlinkat:
+ .set push
+ .set noreorder
+ li v0, __NR_symlinkat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end symlinkat
diff --git a/libc/arch-mips64/syscalls/sync.S b/libc/arch-mips64/syscalls/sync.S
new file mode 100644
index 0000000..e0787bd
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sync.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sync
+ .align 4
+ .ent sync
+
+sync:
+ .set push
+ .set noreorder
+ li v0, __NR_sync
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sync
diff --git a/libc/arch-mips64/syscalls/sysinfo.S b/libc/arch-mips64/syscalls/sysinfo.S
new file mode 100644
index 0000000..19ad141
--- /dev/null
+++ b/libc/arch-mips64/syscalls/sysinfo.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl sysinfo
+ .align 4
+ .ent sysinfo
+
+sysinfo:
+ .set push
+ .set noreorder
+ li v0, __NR_sysinfo
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end sysinfo
diff --git a/libc/arch-mips64/syscalls/tgkill.S b/libc/arch-mips64/syscalls/tgkill.S
new file mode 100644
index 0000000..1a8fe79
--- /dev/null
+++ b/libc/arch-mips64/syscalls/tgkill.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl tgkill
+ .align 4
+ .ent tgkill
+
+tgkill:
+ .set push
+ .set noreorder
+ li v0, __NR_tgkill
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end tgkill
diff --git a/libc/arch-mips64/syscalls/timerfd_create.S b/libc/arch-mips64/syscalls/timerfd_create.S
new file mode 100644
index 0000000..63e8b00
--- /dev/null
+++ b/libc/arch-mips64/syscalls/timerfd_create.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl timerfd_create
+ .align 4
+ .ent timerfd_create
+
+timerfd_create:
+ .set push
+ .set noreorder
+ li v0, __NR_timerfd_create
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end timerfd_create
diff --git a/libc/arch-mips64/syscalls/timerfd_gettime.S b/libc/arch-mips64/syscalls/timerfd_gettime.S
new file mode 100644
index 0000000..2afe6f1
--- /dev/null
+++ b/libc/arch-mips64/syscalls/timerfd_gettime.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl timerfd_gettime
+ .align 4
+ .ent timerfd_gettime
+
+timerfd_gettime:
+ .set push
+ .set noreorder
+ li v0, __NR_timerfd_gettime
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end timerfd_gettime
diff --git a/libc/arch-mips64/syscalls/timerfd_settime.S b/libc/arch-mips64/syscalls/timerfd_settime.S
new file mode 100644
index 0000000..40ce07d
--- /dev/null
+++ b/libc/arch-mips64/syscalls/timerfd_settime.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl timerfd_settime
+ .align 4
+ .ent timerfd_settime
+
+timerfd_settime:
+ .set push
+ .set noreorder
+ li v0, __NR_timerfd_settime
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end timerfd_settime
diff --git a/libc/arch-mips64/syscalls/times.S b/libc/arch-mips64/syscalls/times.S
new file mode 100644
index 0000000..ccbdbf4
--- /dev/null
+++ b/libc/arch-mips64/syscalls/times.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl times
+ .align 4
+ .ent times
+
+times:
+ .set push
+ .set noreorder
+ li v0, __NR_times
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end times
diff --git a/libc/arch-mips64/syscalls/tkill.S b/libc/arch-mips64/syscalls/tkill.S
new file mode 100644
index 0000000..8caa695
--- /dev/null
+++ b/libc/arch-mips64/syscalls/tkill.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl tkill
+ .align 4
+ .ent tkill
+
+tkill:
+ .set push
+ .set noreorder
+ li v0, __NR_tkill
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end tkill
diff --git a/libc/arch-mips64/syscalls/truncate.S b/libc/arch-mips64/syscalls/truncate.S
new file mode 100644
index 0000000..b68f35c
--- /dev/null
+++ b/libc/arch-mips64/syscalls/truncate.S
@@ -0,0 +1,34 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl truncate
+ .align 4
+ .ent truncate
+
+truncate:
+ .set push
+ .set noreorder
+ li v0, __NR_truncate
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end truncate
+
+ .globl _C_LABEL(truncate64)
+ .equ _C_LABEL(truncate64), _C_LABEL(truncate)
diff --git a/libc/arch-mips64/syscalls/umask.S b/libc/arch-mips64/syscalls/umask.S
new file mode 100644
index 0000000..168ff9c
--- /dev/null
+++ b/libc/arch-mips64/syscalls/umask.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl umask
+ .align 4
+ .ent umask
+
+umask:
+ .set push
+ .set noreorder
+ li v0, __NR_umask
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end umask
diff --git a/libc/arch-mips64/syscalls/umount2.S b/libc/arch-mips64/syscalls/umount2.S
new file mode 100644
index 0000000..db80fa8
--- /dev/null
+++ b/libc/arch-mips64/syscalls/umount2.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl umount2
+ .align 4
+ .ent umount2
+
+umount2:
+ .set push
+ .set noreorder
+ li v0, __NR_umount2
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end umount2
diff --git a/libc/arch-mips64/syscalls/uname.S b/libc/arch-mips64/syscalls/uname.S
new file mode 100644
index 0000000..417ecb0
--- /dev/null
+++ b/libc/arch-mips64/syscalls/uname.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl uname
+ .align 4
+ .ent uname
+
+uname:
+ .set push
+ .set noreorder
+ li v0, __NR_uname
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end uname
diff --git a/libc/arch-mips64/syscalls/unlinkat.S b/libc/arch-mips64/syscalls/unlinkat.S
new file mode 100644
index 0000000..e533bc3
--- /dev/null
+++ b/libc/arch-mips64/syscalls/unlinkat.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl unlinkat
+ .align 4
+ .ent unlinkat
+
+unlinkat:
+ .set push
+ .set noreorder
+ li v0, __NR_unlinkat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end unlinkat
diff --git a/libc/arch-mips64/syscalls/unshare.S b/libc/arch-mips64/syscalls/unshare.S
new file mode 100644
index 0000000..4a19745
--- /dev/null
+++ b/libc/arch-mips64/syscalls/unshare.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl unshare
+ .align 4
+ .ent unshare
+
+unshare:
+ .set push
+ .set noreorder
+ li v0, __NR_unshare
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end unshare
diff --git a/libc/arch-mips64/syscalls/utimensat.S b/libc/arch-mips64/syscalls/utimensat.S
new file mode 100644
index 0000000..1cde60d
--- /dev/null
+++ b/libc/arch-mips64/syscalls/utimensat.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl utimensat
+ .align 4
+ .ent utimensat
+
+utimensat:
+ .set push
+ .set noreorder
+ li v0, __NR_utimensat
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end utimensat
diff --git a/libc/arch-mips64/syscalls/wait4.S b/libc/arch-mips64/syscalls/wait4.S
new file mode 100644
index 0000000..14abeeb
--- /dev/null
+++ b/libc/arch-mips64/syscalls/wait4.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl wait4
+ .align 4
+ .ent wait4
+
+wait4:
+ .set push
+ .set noreorder
+ li v0, __NR_wait4
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end wait4
diff --git a/libc/arch-mips64/syscalls/write.S b/libc/arch-mips64/syscalls/write.S
new file mode 100644
index 0000000..f58f25d
--- /dev/null
+++ b/libc/arch-mips64/syscalls/write.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl write
+ .align 4
+ .ent write
+
+write:
+ .set push
+ .set noreorder
+ li v0, __NR_write
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end write
diff --git a/libc/arch-mips64/syscalls/writev.S b/libc/arch-mips64/syscalls/writev.S
new file mode 100644
index 0000000..a716c78
--- /dev/null
+++ b/libc/arch-mips64/syscalls/writev.S
@@ -0,0 +1,31 @@
+/* Generated by gensyscalls.py. Do not edit. */
+
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl writev
+ .align 4
+ .ent writev
+
+writev:
+ .set push
+ .set noreorder
+ li v0, __NR_writev
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end writev
diff --git a/libc/include/sys/stat.h b/libc/include/sys/stat.h
index 3d754c0..37b8dc2 100644
--- a/libc/include/sys/stat.h
+++ b/libc/include/sys/stat.h
@@ -62,24 +62,24 @@
};
#elif defined(__mips__)
struct stat {
- unsigned long st_dev;
- unsigned long __pad0[3];
+ unsigned int st_dev;
+ unsigned int __pad0[3];
unsigned long long st_ino;
unsigned int st_mode;
unsigned int st_nlink;
- unsigned long st_uid;
- unsigned long st_gid;
- unsigned long st_rdev;
- unsigned long __pad1[3];
+ unsigned int st_uid;
+ unsigned int st_gid;
+ unsigned int st_rdev;
+ unsigned int __pad1[3];
long long st_size;
- unsigned long st_atime;
- unsigned long st_atime_nsec;
- unsigned long st_mtime;
- unsigned long st_mtime_nsec;
- unsigned long st_ctime;
- unsigned long st_ctime_nsec;
- unsigned long st_blksize;
- unsigned long __pad2;
+ unsigned int st_atime;
+ unsigned int st_atime_nsec;
+ unsigned int st_mtime;
+ unsigned int st_mtime_nsec;
+ unsigned int st_ctime;
+ unsigned int st_ctime_nsec;
+ unsigned int st_blksize;
+ unsigned int __pad2;
unsigned long long st_blocks;
};
#elif defined(__x86_64__)
diff --git a/libc/include/sys/vfs.h b/libc/include/sys/vfs.h
index 10fe502..10afbc3 100644
--- a/libc/include/sys/vfs.h
+++ b/libc/include/sys/vfs.h
@@ -38,7 +38,7 @@
typedef struct { int __val[2]; } __fsid_t;
typedef __fsid_t fsid_t;
-#if defined(__LP64__)
+#if defined(__aarch64__) || defined(__x86_64__)
struct statfs {
uint64_t f_type;
uint64_t f_bsize;
@@ -53,6 +53,22 @@
uint64_t f_flags;
uint64_t f_spare[4];
};
+#elif defined(__mips__) && defined(__LP64__)
+/* 64-bit MIPS. */
+struct statfs {
+ uint64_t f_type;
+ uint64_t f_bsize;
+ uint64_t f_frsize; /* Fragment size - unsupported. */
+ uint64_t f_blocks;
+ uint64_t f_bfree;
+ uint64_t f_files;
+ uint64_t f_ffree;
+ uint64_t f_bavail;
+ fsid_t f_fsid;
+ uint64_t f_namelen;
+ uint64_t f_flags;
+ uint64_t f_spare[5];
+};
#elif defined(__mips__)
/* 32-bit MIPS (corresponds to the kernel's statfs64 type). */
struct statfs {
diff --git a/libc/tools/bionic_utils.py b/libc/tools/bionic_utils.py
index 88ddd55..def04a6 100644
--- a/libc/tools/bionic_utils.py
+++ b/libc/tools/bionic_utils.py
@@ -2,7 +2,7 @@
import sys, os, commands, string
-all_arches = [ "arm", "arm64", "mips", "x86", "x86_64" ]
+all_arches = [ "arm", "arm64", "mips", "mips64", "x86", "x86_64" ]
# basic debugging trace support
# call D_setlevel to set the verbosity level
diff --git a/libc/tools/gensyscalls.py b/libc/tools/gensyscalls.py
index cea3508..54b8dbc 100755
--- a/libc/tools/gensyscalls.py
+++ b/libc/tools/gensyscalls.py
@@ -145,6 +145,44 @@
#
+# MIPS64 assembler templates for each syscall stub
+#
+
+mips64_call = "/* " + warning + " */\n" + \
+"""
+#include <asm/unistd.h>
+#include <machine/asm.h>
+#include <machine/regdef.h>
+ .text
+ .globl %(func)s
+ .align 4
+ .ent %(func)s
+
+%(func)s:
+ .set push
+ .set noreorder
+ li v0, %(__NR_name)s
+ syscall
+ bnez a3, 1f
+ move a0, v0
+ j ra
+ nop
+1:
+ move t0, ra
+ bal 2f
+ nop
+2:
+ .cpsetup ra, t1, 2b
+ LA t9,__set_errno
+ .cpreturn
+ j t9
+ move ra, t0
+ .set pop
+ .end %(func)s
+"""
+
+
+#
# x86 assembler templates for each syscall stub
#
@@ -288,6 +326,10 @@
return mips_call % syscall
+def mips64_genstub(syscall):
+ return mips64_call % syscall
+
+
def x86_genstub(syscall):
result = syscall_stub_header % syscall
@@ -396,6 +438,9 @@
if syscall.has_key("mips"):
syscall["asm-mips"] = add_footer(32, mips_genstub(syscall), syscall)
+ if syscall.has_key("mips64"):
+ syscall["asm-mips64"] = add_footer(64, mips64_genstub(syscall), syscall)
+
if syscall.has_key("x86_64"):
syscall["asm-x86_64"] = add_footer(64, x86_64_genstub(syscall), syscall)
diff --git a/libm/Android.mk b/libm/Android.mk
index 64a40e4..d06088b 100644
--- a/libm/Android.mk
+++ b/libm/Android.mk
@@ -254,6 +254,10 @@
LOCAL_C_INCLUDES_mips := $(LOCAL_PATH)/mips
LOCAL_SRC_FILES_mips := mips/fenv.c
+LOCAL_CFLAGS_mips64 := -fno-builtin-rintf -fno-builtin-rint
+LOCAL_C_INCLUDES_mips64 := $(LOCAL_PATH)/mips
+LOCAL_SRC_FILES_mips64 := mips/fenv.c
+
include $(BUILD_STATIC_LIBRARY)
#
diff --git a/libm/mips/_fpmath.h b/libm/mips/_fpmath.h
index f006a58..f759639 100644
--- a/libm/mips/_fpmath.h
+++ b/libm/mips/_fpmath.h
@@ -30,23 +30,49 @@
long double e;
struct {
#ifndef __MIPSEB__
+#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32)
+ unsigned long manl :64;
+ unsigned long manh :48;
+ unsigned int exp :15;
+ unsigned int sign :1;
+#else
unsigned int manl :32;
unsigned int manh :20;
unsigned int exp :11;
unsigned int sign :1;
+#endif
#else
- unsigned int sign :1;
- unsigned int exp :11;
- unsigned int manh :20;
- unsigned int manl :32;
+#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32)
+ unsigned int sign :1;
+ unsigned int exp :15;
+ unsigned long manh :48;
+ unsigned long manl :64;
+#else
+ unsigned int sign :1;
+ unsigned int exp :11;
+ unsigned int manh :20;
+ unsigned int manl :32;
+#endif
#endif
} bits;
+
};
#define LDBL_NBIT 0
#define mask_nbit_l(u) ((void)0)
#define LDBL_IMPLICIT_NBIT
+#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32)
+#define LDBL_MANH_SIZE 48
+#define LDBL_MANL_SIZE 64
+
+#define LDBL_TO_ARRAY32(u, a) do { \
+ (a)[0] = (uint32_t)(u).bits.manl; \
+ (a)[1] = (uint32_t)((u).bits.manl >> 32); \
+ (a)[2] = (uint32_t)(u).bits.manh; \
+ (a)[3] = (uint32_t)((u).bits.manh >> 32); \
+} while(0)
+#else
#define LDBL_MANH_SIZE 20
#define LDBL_MANL_SIZE 32
@@ -54,3 +80,4 @@
(a)[0] = (uint32_t)(u).bits.manl; \
(a)[1] = (uint32_t)(u).bits.manh; \
} while(0)
+#endif
diff --git a/tests/Android.build.mk b/tests/Android.build.mk
new file mode 100644
index 0000000..33e0a0b
--- /dev/null
+++ b/tests/Android.build.mk
@@ -0,0 +1,85 @@
+#
+# Copyright (C) 2014 The Android Open Source Project
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+include $(CLEAR_VARS)
+
+LOCAL_MODULE := $(module)
+LOCAL_MODULE_TAGS := $(module_tag)
+
+LOCAL_CLANG := $($(module)_clang_$(build_type))
+
+LOCAL_FORCE_STATIC_EXECUTABLE := $($(module)_force_static_executable)
+
+LOCAL_ADDITIONAL_DEPENDENCIES := \
+ $(LOCAL_PATH)/Android.mk \
+ $(LOCAL_PATH)/Android.build.mk \
+
+LOCAL_CFLAGS := \
+ $(common_cflags) \
+ $($(module)_cflags) \
+ $($(module)_cflags_$(build_type)) \
+
+LOCAL_CONLYFLAGS += \
+ $(common_conlyflags) \
+ $($(module)_conlyflags) \
+ $($(module)_conlyflags_$(build_type)) \
+
+LOCAL_CPPFLAGS += \
+ $(common_cppflags) \
+ $($(module)_cppflags) \
+ $($(module)_cppflags_$(build_type)) \
+
+LOCAL_C_INCLUDES := \
+ $(common_c_includes) \
+ $($(module)_c_includes) \
+ $($(module)_c_includes_$(build_type)) \
+
+LOCAL_SRC_FILES := \
+ $($(module)_src_files) \
+ $($(module)_src_files_$(build_type)) \
+
+LOCAL_STATIC_LIBRARIES := \
+ $($(module)_static_libraries) \
+ $($(module)_static_libraries_$(build_type)) \
+
+LOCAL_SHARED_LIBRARIES := \
+ $($(module)_shared_libraries) \
+ $($(module)_shared_libraries_$(build_type)) \
+
+LOCAL_WHOLE_STATIC_LIBRARIES := \
+ $($(module)_whole_static_libraries) \
+ $($(module)_whole_static_libraries_$(build_type)) \
+
+LOCAL_LDFLAGS := \
+ $($(module)_ldflags) \
+ $($(module)_ldflags_$(build_type)) \
+
+LOCAL_LDLIBS := \
+ $($(module)_ldlibs) \
+ $($(module)_ldlibs_$(build_type)) \
+
+ifeq ($(build_type),target)
+ include external/stlport/libstlport.mk
+
+ include $(BUILD_$(build_target))
+endif
+
+ifeq ($(build_type),host)
+ # Only build if host builds are supported.
+ ifeq ($(build_host),true)
+ include $(BUILD_HOST_$(build_target))
+ endif
+endif
diff --git a/tests/Android.mk b/tests/Android.mk
index ee22c35..e658b4d 100644
--- a/tests/Android.mk
+++ b/tests/Android.mk
@@ -22,19 +22,23 @@
# Unit tests.
# -----------------------------------------------------------------------------
-test_c_flags = \
+ifeq ($(HOST_OS)-$(HOST_ARCH),$(filter $(HOST_OS)-$(HOST_ARCH),linux-x86 linux-x86_64))
+build_host := true
+else
+build_host := false
+endif
+
+# -----------------------------------------------------------------------------
+# All standard tests.
+# -----------------------------------------------------------------------------
+test_cflags = \
-fstack-protector-all \
-g \
-Wall -Wextra \
-Werror \
-fno-builtin \
-ifeq ($(TARGET_ARCH),arm64)
- $(info TODO: $(LOCAL_PATH)/Android.mk -fstack-protector not yet available for the AArch64 toolchain)
- test_c_flags += -fno-stack-protector
-endif # arm64
-
-test_src_files = \
+libBionicStandardTests_src_files := \
buffer_tests.cpp \
dirent_test.cpp \
eventfd_test.cpp \
@@ -54,6 +58,7 @@
signal_test.cpp \
stack_protector_test.cpp \
stack_unwinding_test.cpp \
+ stack_unwinding_test_impl.c \
statvfs_test.cpp \
stdio_test.cpp \
stdlib_test.cpp \
@@ -73,106 +78,168 @@
time_test.cpp \
unistd_test.cpp \
-test_dynamic_ldflags = -Wl,--export-dynamic -Wl,-u,DlSymTestFunction
-test_dynamic_src_files = \
- dlfcn_test.cpp \
+libBionicStandardTests_cflags := \
+ $(test_cflags) \
-test_fortify_static_libraries = \
- fortify1-tests-gcc fortify2-tests-gcc fortify1-tests-clang fortify2-tests-clang
+libBionicStandardTests_ldlibs_host := \
+ -lrt \
-include $(CLEAR_VARS)
-LOCAL_MODULE := bionic-unit-tests-unwind-test-impl
-LOCAL_CFLAGS += $(test_c_flags) -fexceptions -fnon-call-exceptions
-LOCAL_SRC_FILES := stack_unwinding_test_impl.c
-include $(BUILD_STATIC_LIBRARY)
-
-include $(CLEAR_VARS)
-LOCAL_MODULE := bionic-unit-tests-unwind-test-impl-host
-LOCAL_CFLAGS += $(test_c_flags) -fexceptions -fnon-call-exceptions
-LOCAL_SRC_FILES := stack_unwinding_test_impl.c
-include $(BUILD_HOST_STATIC_LIBRARY)
-
-# Build tests for the device (with bionic's .so). Run with:
-# adb shell /data/nativetest/bionic-unit-tests/bionic-unit-tests
-include $(CLEAR_VARS)
-LOCAL_MODULE := bionic-unit-tests
-LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
-LOCAL_CFLAGS += $(test_c_flags)
-LOCAL_LDFLAGS += $(test_dynamic_ldflags)
-LOCAL_SHARED_LIBRARIES += libdl
-LOCAL_SRC_FILES := $(test_src_files) $(test_dynamic_src_files)
-LOCAL_WHOLE_STATIC_LIBRARIES := $(test_fortify_static_libraries)
-LOCAL_STATIC_LIBRARIES += bionic-unit-tests-unwind-test-impl
-include $(BUILD_NATIVE_TEST)
-
-# Build tests for the device (with bionic's .a). Run with:
-# adb shell /data/nativetest/bionic-unit-tests-static/bionic-unit-tests-static
-include $(CLEAR_VARS)
-LOCAL_MODULE := bionic-unit-tests-static
-LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
-LOCAL_FORCE_STATIC_EXECUTABLE := true
-LOCAL_WHOLE_STATIC_LIBRARIES += libBionicTests
-LOCAL_STATIC_LIBRARIES += libstlport_static libstdc++ libm libc
-include $(BUILD_NATIVE_TEST)
+module := libBionicStandardTests
+module_tag := optional
+build_type := target
+build_target := STATIC_TEST_LIBRARY
+include $(LOCAL_PATH)/Android.build.mk
+build_type := host
+include $(LOCAL_PATH)/Android.build.mk
# -----------------------------------------------------------------------------
-# We build the static unit tests as a library so they can be used both for
-# bionic-unit-tests-static and also as part of CTS.
+# Fortify tests.
# -----------------------------------------------------------------------------
+$(foreach compiler,gcc clang, \
+ $(foreach test,1 2, \
+ $(eval fortify$(test)-tests-$(compiler)_cflags := \
+ $(test_cflags) \
+ -U_FORTIFY_SOURCE \
+ -D_FORTIFY_SOURCE=$(test) \
+ -DTEST_NAME=Fortify$(test)_$(compiler)); \
+ $(eval fortify$(test)-tests-$(compiler)_cflags_host := \
+ -Wno-error); \
+ $(eval fortify$(test)-tests-$(compiler)_src_files := \
+ fortify_test.cpp); \
+ $(eval fortify_libs += fortify$(test)-tests-$(compiler)); \
+ ) \
+)
-include $(CLEAR_VARS)
-LOCAL_MODULE := libBionicTests
-LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
-LOCAL_CFLAGS += $(test_c_flags)
-LOCAL_SRC_FILES := $(test_src_files)
-LOCAL_CFLAGS += \
- -DGTEST_OS_LINUX_ANDROID \
- -DGTEST_HAS_STD_STRING \
+module := fortify1-tests-gcc
+module_tag := optional
+build_type := target
+build_target := STATIC_TEST_LIBRARY
+include $(LOCAL_PATH)/Android.build.mk
+build_type := host
+include $(LOCAL_PATH)/Android.build.mk
-LOCAL_C_INCLUDES += \
- bionic bionic/libstdc++/include \
- external/gtest/include \
- external/stlport/stlport \
+module := fortify2-tests-gcc
+module_tag := optional
+build_type := target
+build_target := STATIC_TEST_LIBRARY
+include $(LOCAL_PATH)/Android.build.mk
+build_type := host
+include $(LOCAL_PATH)/Android.build.mk
-LOCAL_WHOLE_STATIC_LIBRARIES := \
- $(test_fortify_static_libraries) \
- bionic-unit-tests-unwind-test-impl \
+fortify1-tests-clang_clang_target := true
+fortify1-tests-clang_cflags_host := -D__clang__
-include $(BUILD_STATIC_LIBRARY)
+module := fortify1-tests-clang
+module_tag := optional
+build_type := target
+build_target := STATIC_TEST_LIBRARY
+include $(LOCAL_PATH)/Android.build.mk
+build_type := host
+include $(LOCAL_PATH)/Android.build.mk
+
+fortify2-tests-clang_clang_target := true
+
+fortify2-tests-clang_cflags_host := -D__clang__
+
+module := fortify2-tests-clang
+module_tag := optional
+build_type := target
+build_target := STATIC_TEST_LIBRARY
+include $(LOCAL_PATH)/Android.build.mk
+build_type := host
+include $(LOCAL_PATH)/Android.build.mk
# -----------------------------------------------------------------------------
-# Test library for the unit tests.
+# Library of all tests (excluding the dynamic linker tests).
# -----------------------------------------------------------------------------
+libBionicTests_whole_static_libraries := \
+ libBionicStandardTests \
+ $(fortify_libs) \
-# Build no-elf-hash-table-library.so to test dlopen(3) on a library that
-# only has a GNU-style hash table. MIPS doesn't support GNU hash style.
-ifneq ($(TARGET_ARCH),mips)
-include $(CLEAR_VARS)
-LOCAL_MODULE := no-elf-hash-table-library
-LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
-LOCAL_SRC_FILES := empty.cpp
-LOCAL_LDFLAGS := -Wl,--hash-style=gnu
-include $(BUILD_SHARED_LIBRARY)
+module := libBionicTests
+module_tag := optional
+build_type := target
+build_target := STATIC_TEST_LIBRARY
+include $(LOCAL_PATH)/Android.build.mk
+build_type := host
+include $(LOCAL_PATH)/Android.build.mk
+
+# -----------------------------------------------------------------------------
+# Library used by dlfcn tests.
+# -----------------------------------------------------------------------------
+ifneq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),mips mips64))
+no-elf-hash-table-library_src_files := \
+ empty.cpp \
+
+no-elf-hash-table-library_ldflags := \
+ -Wl,--hash-style=gnu \
+
+module := no-elf-hash-table-library
+module_tag := optional
+build_type := target
+build_target := SHARED_LIBRARY
+include $(LOCAL_PATH)/Android.build.mk
endif
# -----------------------------------------------------------------------------
-# Unit tests built against glibc.
+# Tests for the device using bionic's .so. Run with:
+# adb shell /data/nativetest/bionic-unit-tests/bionic-unit-tests
# -----------------------------------------------------------------------------
+bionic-unit-tests_whole_static_libraries := \
+ libBionicTests \
-# Build tests for the host (with glibc).
-# Note that this will build against glibc, so it's not useful for testing
-# bionic's implementation, but it does let you use glibc as a reference
-# implementation for testing the tests themselves.
-ifeq ($(HOST_OS)-$(HOST_ARCH),linux-x86)
-include $(CLEAR_VARS)
-LOCAL_MODULE := bionic-unit-tests-glibc
-LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
-LOCAL_CFLAGS += $(test_c_flags)
-LOCAL_LDFLAGS += -lpthread -ldl -lrt
-LOCAL_LDFLAGS += $(test_dynamic_ldflags)
-LOCAL_SRC_FILES := $(test_src_files) $(test_dynamic_src_files)
-LOCAL_STATIC_LIBRARIES += bionic-unit-tests-unwind-test-impl-host
-include $(BUILD_HOST_NATIVE_TEST)
+bionic-unit-tests_src_files := \
+ dlfcn_test.cpp \
+
+bionic-unit-tests_ldflags := \
+ -Wl,--export-dynamic \
+ -Wl,-u,DlSymTestFunction \
+
+bionic-unit-tests_shared_libraries_target := \
+ libdl \
+
+module := bionic-unit-tests
+module_tag := optional
+build_type := target
+build_target := NATIVE_TEST
+include $(LOCAL_PATH)/Android.build.mk
+
+# -----------------------------------------------------------------------------
+# Tests for the device linked against bionic's static library. Run with:
+# adb shell /data/nativetest/bionic-unit-tests-static/bionic-unit-tests-static
+# -----------------------------------------------------------------------------
+bionic-unit-tests-static_whole_static_libraries := \
+ libBionicTests \
+
+bionic-unit-tests-static_static_libraries := \
+ libstlport_static \
+ libm \
+ libc \
+ libstdc++ \
+
+bionic-unit-tests-static_force_static_executable := true
+
+module := bionic-unit-tests-static
+module_tag := optional
+build_type := target
+build_target := NATIVE_TEST
+include $(LOCAL_PATH)/Android.build.mk
+
+# -----------------------------------------------------------------------------
+# Tests to run on the host and linked against glibc. Run with:
+# cd bionic/tests; mm bionic-unit-tests-glibc-run
+# -----------------------------------------------------------------------------
+bionic-unit-tests-glibc_whole_static_libraries := \
+ libBionicStandardTests \
+
+bionic-unit-tests-glibc_ldlibs := \
+ -lrt \
+
+module := bionic-unit-tests-glibc
+module_tag := optional
+build_type := host
+build_target := NATIVE_TEST
+include $(LOCAL_PATH)/Android.build.mk
# gtest needs ANDROID_DATA/local/tmp for death test output.
# Make sure to create ANDROID_DATA/local/tmp if doesn't exist.
@@ -182,12 +249,10 @@
ANDROID_DATA=$(TARGET_OUT_DATA) \
ANDROID_ROOT=$(TARGET_OUT) \
$(HOST_OUT_EXECUTABLES)/bionic-unit-tests-glibc
-endif
# -----------------------------------------------------------------------------
# Run the unit tests built against x86 bionic on an x86 host.
# -----------------------------------------------------------------------------
-
ifeq ($(HOST_OS)-$(HOST_ARCH),linux-x86)
ifeq ($(TARGET_ARCH),$(filter $(TARGET_ARCH),x86 x86_64))
ifeq ($(TARGET_ARCH),x86)
@@ -213,55 +278,4 @@
endif
endif
-# -----------------------------------------------------------------------------
-# FORTIFY_SOURCE tests
-# -----------------------------------------------------------------------------
-
-fortify_c_includes = \
- bionic \
- bionic/libstdc++/include \
- external/stlport/stlport \
- external/gtest/include
-fortify_test_files = fortify_test.cpp
-
-# -Wno-error=unused-parameter needed as
-# external/stlport/stlport/stl/_threads.c (included from
-# external/gtest/include/gtest/gtest.h) does not compile cleanly under
-# clang. TODO: fix this.
-fortify_c_flags = $(test_c_flags) -Wno-error=unused-parameter
-
-include $(CLEAR_VARS)
-LOCAL_SRC_FILES := $(fortify_test_files)
-LOCAL_MODULE := fortify1-tests-gcc
-LOCAL_CFLAGS += $(fortify_c_flags) -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=1 -DTEST_NAME=Fortify1_Gcc
-LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
-LOCAL_C_INCLUDES += $(fortify_c_includes)
-include $(BUILD_STATIC_LIBRARY)
-
-include $(CLEAR_VARS)
-LOCAL_SRC_FILES := $(fortify_test_files)
-LOCAL_MODULE := fortify2-tests-gcc
-LOCAL_CFLAGS += $(fortify_c_flags) -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 -DTEST_NAME=Fortify2_Gcc
-LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
-LOCAL_C_INCLUDES += $(fortify_c_includes)
-include $(BUILD_STATIC_LIBRARY)
-
-include $(CLEAR_VARS)
-LOCAL_SRC_FILES := $(fortify_test_files)
-LOCAL_MODULE := fortify1-tests-clang
-LOCAL_CLANG := true
-LOCAL_CFLAGS += $(fortify_c_flags) -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=1 -DTEST_NAME=Fortify1_Clang
-LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
-LOCAL_C_INCLUDES += $(fortify_c_includes)
-include $(BUILD_STATIC_LIBRARY)
-
-include $(CLEAR_VARS)
-LOCAL_SRC_FILES := $(fortify_test_files)
-LOCAL_MODULE := fortify2-tests-clang
-LOCAL_CLANG := true
-LOCAL_CFLAGS += $(fortify_c_flags) -U_FORTIFY_SOURCE -D_FORTIFY_SOURCE=2 -DTEST_NAME=Fortify2_Clang
-LOCAL_ADDITIONAL_DEPENDENCIES := $(LOCAL_PATH)/Android.mk
-LOCAL_C_INCLUDES += $(fortify_c_includes)
-include $(BUILD_STATIC_LIBRARY)
-
endif # !BUILD_TINY_ANDROID
diff --git a/tests/eventfd_test.cpp b/tests/eventfd_test.cpp
index 2c2c5f0..aa88a3b 100644
--- a/tests/eventfd_test.cpp
+++ b/tests/eventfd_test.cpp
@@ -14,11 +14,25 @@
* limitations under the License.
*/
+#include <errno.h>
+#include <fcntl.h>
+
#include <gtest/gtest.h>
-#if !defined(__GLIBC__) // Android's prebuilt gcc's header files don't include <sys/eventfd.h>.
-
+#if defined(__BIONIC__) // Android's prebuilt gcc's header files don't include <sys/eventfd.h>.
#include <sys/eventfd.h>
+#else
+// Include the necessary components of sys/eventfd.h right here.
+#include <stdint.h>
+
+typedef uint64_t eventfd_t;
+
+__BEGIN_DECLS
+extern int eventfd(int, int);
+extern int eventfd_read(int, eventfd_t*);
+extern int eventfd_write(int, eventfd_t);
+__END_DECLS
+#endif
TEST(eventfd, smoke) {
unsigned int initial_value = 2;
@@ -43,5 +57,3 @@
close(fd);
}
-
-#endif
diff --git a/tests/fortify_test.cpp b/tests/fortify_test.cpp
index 408991e..67e197e 100644
--- a/tests/fortify_test.cpp
+++ b/tests/fortify_test.cpp
@@ -15,6 +15,7 @@
*/
#include <gtest/gtest.h>
+#include <signal.h>
#include <string.h>
#include <stdarg.h>
#include <sys/types.h>
@@ -139,19 +140,21 @@
}
#endif
-#if __BIONIC__
-
#ifndef __clang__
// zero sized target with "\0" source (should fail)
// This test is disabled in clang because clang doesn't properly detect
// this buffer overflow. TODO: Fix clang.
TEST(DEATHTEST, strcpy_fortified2) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
foo myfoo;
char* src = strdup("");
ASSERT_EXIT(strcpy(myfoo.empty, src),
testing::KilledBySignal(SIGABRT), "");
free(src);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
#endif
@@ -160,12 +163,16 @@
// This test is disabled in clang because clang doesn't properly detect
// this buffer overflow. TODO: Fix clang.
TEST(DEATHTEST, strcpy2_fortified2) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
foo myfoo;
char* src = strdup("1");
ASSERT_EXIT(strcpy(myfoo.empty, src),
testing::KilledBySignal(SIGABRT), "");
free(src);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
#endif
@@ -174,12 +181,16 @@
// This test is disabled in clang because clang doesn't properly detect
// this buffer overflow. TODO: Fix clang.
TEST(DEATHTEST, strcpy3_fortified2) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
foo myfoo;
char* src = strdup("12");
ASSERT_EXIT(strcpy(myfoo.one, src),
testing::KilledBySignal(SIGABRT), "");
free(src);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
#endif
@@ -187,12 +198,16 @@
// This test is disabled in clang because clang doesn't properly detect
// this buffer overflow. TODO: Fix clang.
TEST(DEATHTEST, strchr_fortified2) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
foo myfoo;
memcpy(myfoo.a, "0123456789", sizeof(myfoo.a));
myfoo.b[0] = '\0';
ASSERT_EXIT(printf("%s", strchr(myfoo.a, 'a')),
testing::KilledBySignal(SIGABRT), "");
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
#endif
@@ -200,12 +215,16 @@
// This test is disabled in clang because clang doesn't properly detect
// this buffer overflow. TODO: Fix clang.
TEST(DEATHTEST, strrchr_fortified2) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
foo myfoo;
memcpy(myfoo.a, "0123456789", 10);
memcpy(myfoo.b, "01234", 6);
ASSERT_EXIT(printf("%s", strrchr(myfoo.a, 'a')),
testing::KilledBySignal(SIGABRT), "");
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
#endif
@@ -213,12 +232,16 @@
// This test is disabled in clang because clang doesn't properly detect
// this buffer overflow. TODO: Fix clang.
TEST(DEATHTEST, strlcpy_fortified2) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
foo myfoo;
strcpy(myfoo.a, "01");
size_t n = strlen(myfoo.a);
ASSERT_EXIT(strlcpy(myfoo.one, myfoo.a, n),
testing::KilledBySignal(SIGABRT), "");
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
#endif
@@ -226,6 +249,7 @@
// This test is disabled in clang because clang doesn't properly detect
// this buffer overflow. TODO: Fix clang.
TEST(DEATHTEST, strlcat_fortified2) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
foo myfoo;
strcpy(myfoo.a, "01");
@@ -233,11 +257,12 @@
size_t n = strlen(myfoo.a);
ASSERT_EXIT(strlcat(myfoo.one, myfoo.a, n),
testing::KilledBySignal(SIGABRT), "");
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
#endif
-#endif /* __BIONIC__ */
-
#ifndef __clang__
// This test is disabled in clang because clang doesn't properly detect
// this buffer overflow. TODO: Fix clang.
@@ -310,74 +335,106 @@
#endif /* defined(_FORTIFY_SOURCE) && _FORTIFY_SOURCE=2 */
-#if __BIONIC__
// multibyte target where we over fill (should fail)
TEST(DEATHTEST, strcpy_fortified) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
char buf[10];
char *orig = strdup("0123456789");
ASSERT_EXIT(strcpy(buf, orig), testing::KilledBySignal(SIGABRT), "");
free(orig);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
// zero sized target with "\0" source (should fail)
TEST(DEATHTEST, strcpy2_fortified) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
char buf[0];
char *orig = strdup("");
ASSERT_EXIT(strcpy(buf, orig), testing::KilledBySignal(SIGABRT), "");
free(orig);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
// zero sized target with longer source (should fail)
TEST(DEATHTEST, strcpy3_fortified) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
char buf[0];
char *orig = strdup("1");
ASSERT_EXIT(strcpy(buf, orig), testing::KilledBySignal(SIGABRT), "");
free(orig);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
// one byte target with longer source (should fail)
TEST(DEATHTEST, strcpy4_fortified) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
char buf[1];
char *orig = strdup("12");
ASSERT_EXIT(strcpy(buf, orig), testing::KilledBySignal(SIGABRT), "");
free(orig);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(DEATHTEST, strlen_fortified) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
char buf[10];
memcpy(buf, "0123456789", sizeof(buf));
ASSERT_EXIT(printf("%zd", strlen(buf)), testing::KilledBySignal(SIGABRT), "");
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(DEATHTEST, strchr_fortified) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
char buf[10];
memcpy(buf, "0123456789", sizeof(buf));
ASSERT_EXIT(printf("%s", strchr(buf, 'a')), testing::KilledBySignal(SIGABRT), "");
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(DEATHTEST, strrchr_fortified) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
char buf[10];
memcpy(buf, "0123456789", sizeof(buf));
ASSERT_EXIT(printf("%s", strrchr(buf, 'a')), testing::KilledBySignal(SIGABRT), "");
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(DEATHTEST, strlcpy_fortified) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
char bufa[15];
char bufb[10];
strcpy(bufa, "01234567890123");
size_t n = strlen(bufa);
ASSERT_EXIT(strlcpy(bufb, bufa, n), testing::KilledBySignal(SIGABRT), "");
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(DEATHTEST, strlcat_fortified) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
char bufa[15];
char bufb[10];
@@ -385,10 +442,11 @@
strcpy(bufa, "01234567890123");
size_t n = strlen(bufa);
ASSERT_EXIT(strlcat(bufb, bufa, n), testing::KilledBySignal(SIGABRT), "");
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-
TEST(DEATHTEST, sprintf_fortified) {
::testing::FLAGS_gtest_death_test_style = "threadsafe";
char buf[10];
diff --git a/tests/getauxval_test.cpp b/tests/getauxval_test.cpp
index 01c11c3..51c9db8 100644
--- a/tests/getauxval_test.cpp
+++ b/tests/getauxval_test.cpp
@@ -31,10 +31,11 @@
#endif
#if defined(GETAUXVAL_CAN_COMPILE)
-
#include <sys/auxv.h>
+#endif
TEST(getauxval, expected_values) {
+#if defined(GETAUXVAL_CAN_COMPILE)
ASSERT_EQ((unsigned long int) 0, getauxval(AT_SECURE));
ASSERT_EQ(getuid(), getauxval(AT_UID));
ASSERT_EQ(geteuid(), getauxval(AT_EUID));
@@ -46,10 +47,15 @@
ASSERT_NE((unsigned long int) 0, getauxval(AT_PHNUM));
ASSERT_NE((unsigned long int) 0, getauxval(AT_ENTRY));
ASSERT_NE((unsigned long int) 0, getauxval(AT_PAGESZ));
+#else
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif
}
TEST(getauxval, unexpected_values) {
+#if defined(GETAUXVAL_CAN_COMPILE)
ASSERT_EQ((unsigned long int) 0, getauxval(0xdeadbeef));
+#else
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif
}
-
-#endif /* GETAUXVAL_CAN_COMPILE */
diff --git a/tests/inttypes_test.cpp b/tests/inttypes_test.cpp
index df02d1f..ac37e62 100644
--- a/tests/inttypes_test.cpp
+++ b/tests/inttypes_test.cpp
@@ -19,7 +19,6 @@
#include <stdio.h>
#include <inttypes.h>
-#if defined(__BIONIC__) // Doesn't work on glibc because we use -m32.
TEST(inttypes, misc) {
char buf[512];
@@ -39,4 +38,3 @@
sscanf(buf, "%08" SCNuPTR, &u);
sscanf(buf, "%08" SCNxPTR, &u);
}
-#endif
diff --git a/tests/libc_logging_test.cpp b/tests/libc_logging_test.cpp
index c44b85b..950161e 100644
--- a/tests/libc_logging_test.cpp
+++ b/tests/libc_logging_test.cpp
@@ -17,12 +17,12 @@
#include <gtest/gtest.h>
#if defined(__BIONIC__)
-
#include "../libc/bionic/libc_logging.cpp"
-
extern int __libc_format_buffer(char* buffer, size_t buffer_size, const char* format, ...);
+#endif // __BIONIC__
TEST(libc_logging, smoke) {
+#if defined(__BIONIC__)
char buf[BUFSIZ];
__libc_format_buffer(buf, sizeof(buf), "a");
@@ -104,21 +104,33 @@
__libc_format_buffer(buf, sizeof(buf), "a%lld,%d,%d,%dz", 0x1000000000LL, 6, 7, 8);
EXPECT_STREQ("a68719476736,6,7,8z", buf);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(libc_logging, d_INT_MAX) {
+#if defined(__BIONIC__)
char buf[BUFSIZ];
__libc_format_buffer(buf, sizeof(buf), "%d", INT_MAX);
EXPECT_STREQ("2147483647", buf);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(libc_logging, d_INT_MIN) {
+#if defined(__BIONIC__)
char buf[BUFSIZ];
__libc_format_buffer(buf, sizeof(buf), "%d", INT_MIN);
EXPECT_STREQ("-2147483648", buf);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(libc_logging, ld_LONG_MAX) {
+#if defined(__BIONIC__)
char buf[BUFSIZ];
__libc_format_buffer(buf, sizeof(buf), "%ld", LONG_MAX);
#if __LP64__
@@ -126,9 +138,13 @@
#else
EXPECT_STREQ("2147483647", buf);
#endif
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(libc_logging, ld_LONG_MIN) {
+#if defined(__BIONIC__)
char buf[BUFSIZ];
__libc_format_buffer(buf, sizeof(buf), "%ld", LONG_MIN);
#if __LP64__
@@ -136,18 +152,27 @@
#else
EXPECT_STREQ("-2147483648", buf);
#endif
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(libc_logging, lld_LLONG_MAX) {
+#if defined(__BIONIC__)
char buf[BUFSIZ];
__libc_format_buffer(buf, sizeof(buf), "%lld", LLONG_MAX);
EXPECT_STREQ("9223372036854775807", buf);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(libc_logging, lld_LLONG_MIN) {
+#if defined(__BIONIC__)
char buf[BUFSIZ];
__libc_format_buffer(buf, sizeof(buf), "%lld", LLONG_MIN);
EXPECT_STREQ("-9223372036854775808", buf);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-
-#endif
diff --git a/tests/libgen_test.cpp b/tests/libgen_test.cpp
index c2c01f6..cae646f 100644
--- a/tests/libgen_test.cpp
+++ b/tests/libgen_test.cpp
@@ -38,7 +38,9 @@
free(writable_in);
}
-TEST(libgen, basename) {
+// Do not use basename as the test name, it's defined to another value in glibc
+// so leads to a differently named test on host versus target architectures.
+TEST(libgen, basename_smoke) {
TestBasename(NULL, ".");
TestBasename("", ".");
TestBasename("/usr/lib", "lib");
@@ -62,8 +64,7 @@
TestDirname("/", "/");
}
-#if __BIONIC__
-
+#if defined(__BIONIC__)
static void TestBasename(const char* in, const char* expected_out, int expected_rc,
char* buf, size_t buf_size, int expected_errno) {
errno = 0;
@@ -85,8 +86,10 @@
}
ASSERT_EQ(expected_errno, errno) << in;
}
+#endif // __BIONIC__
TEST(libgen, basename_r) {
+#if defined(__BIONIC__)
char buf[256];
TestBasename("", ".", 1, NULL, 0, 0);
TestBasename("", ".", -1, buf, 0, ERANGE);
@@ -99,9 +102,13 @@
TestBasename("/", "/", 1, buf, sizeof(buf), 0);
TestBasename(".", ".", 1, buf, sizeof(buf), 0);
TestBasename("..", "..", 2, buf, sizeof(buf), 0);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(libgen, dirname_r) {
+#if defined(__BIONIC__)
char buf[256];
TestDirname("", ".", 1, NULL, 0, 0);
TestDirname("", ".", -1, buf, 0, ERANGE);
@@ -112,6 +119,7 @@
TestDirname("usr", ".", 1, buf, sizeof(buf), 0);
TestDirname(".", ".", 1, buf, sizeof(buf), 0);
TestDirname("..", ".", 1, buf, sizeof(buf), 0);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-
-#endif
diff --git a/tests/math_test.cpp b/tests/math_test.cpp
index 454646d..c8974d3 100644
--- a/tests/math_test.cpp
+++ b/tests/math_test.cpp
@@ -104,61 +104,73 @@
}
*/
-#if defined(__BIONIC__)
TEST(math, __fpclassifyd) {
+#if defined(__BIONIC__)
ASSERT_EQ(FP_INFINITE, __fpclassifyd(HUGE_VAL));
ASSERT_EQ(FP_NAN, __fpclassifyd(nan("")));
ASSERT_EQ(FP_NORMAL, __fpclassifyd(1.0));
ASSERT_EQ(FP_SUBNORMAL, __fpclassifyd(double_subnormal()));
ASSERT_EQ(FP_ZERO, __fpclassifyd(0.0));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-#if defined(__BIONIC__)
TEST(math, __fpclassifyf) {
+#if defined(__BIONIC__)
ASSERT_EQ(FP_INFINITE, __fpclassifyf(HUGE_VALF));
ASSERT_EQ(FP_NAN, __fpclassifyf(nanf("")));
ASSERT_EQ(FP_NORMAL, __fpclassifyf(1.0f));
ASSERT_EQ(FP_SUBNORMAL, __fpclassifyf(float_subnormal()));
ASSERT_EQ(FP_ZERO, __fpclassifyf(0.0f));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-#if defined(__BIONIC__)
TEST(math, __fpclassifyl) {
+#if defined(__BIONIC__)
EXPECT_EQ(FP_INFINITE, __fpclassifyl(HUGE_VALL));
EXPECT_EQ(FP_NAN, __fpclassifyl(nanl("")));
EXPECT_EQ(FP_NORMAL, __fpclassifyl(1.0));
EXPECT_EQ(FP_SUBNORMAL, __fpclassifyl(double_subnormal()));
EXPECT_EQ(FP_ZERO, __fpclassifyl(0.0));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
TEST(math, finitef) {
ASSERT_TRUE(finitef(123.0f));
ASSERT_FALSE(finitef(HUGE_VALF));
}
-#if defined(__BIONIC__)
TEST(math, __isfinite) {
+#if defined(__BIONIC__)
ASSERT_TRUE(__isfinite(123.0));
ASSERT_FALSE(__isfinite(HUGE_VAL));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-#if defined(__BIONIC__)
TEST(math, __isfinitef) {
+#if defined(__BIONIC__)
ASSERT_TRUE(__isfinitef(123.0f));
ASSERT_FALSE(__isfinitef(HUGE_VALF));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-#if defined(__BIONIC__)
TEST(math, __isfinitel) {
+#if defined(__BIONIC__)
ASSERT_TRUE(__isfinitel(123.0f));
ASSERT_FALSE(__isfinitel(HUGE_VALL));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
TEST(math, finite) {
ASSERT_TRUE(finite(123.0));
@@ -190,26 +202,32 @@
ASSERT_TRUE(isnanf(nanf("")));
}
-#if defined(__BIONIC__)
TEST(math, __isnormal) {
+#if defined(__BIONIC__)
ASSERT_TRUE(__isnormal(123.0));
ASSERT_FALSE(__isnormal(double_subnormal()));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-#if defined(__BIONIC__)
TEST(math, __isnormalf) {
+#if defined(__BIONIC__)
ASSERT_TRUE(__isnormalf(123.0f));
ASSERT_FALSE(__isnormalf(float_subnormal()));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-#if defined(__BIONIC__)
TEST(math, __isnormall) {
+#if defined(__BIONIC__)
ASSERT_TRUE(__isnormall(123.0));
ASSERT_FALSE(__isnormall(double_subnormal()));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
TEST(math, __signbit) {
ASSERT_EQ(0, __signbit(0.0));
@@ -1005,21 +1023,25 @@
ASSERT_FLOAT_EQ(logf(24.0f), gammaf(5.0f));
}
-#if defined(__BIONIC__)
TEST(math, gamma_r) {
+#if defined(__BIONIC__)
int sign;
ASSERT_FLOAT_EQ(log(24.0), gamma_r(5.0, &sign));
ASSERT_EQ(1, sign);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-#if defined(__BIONIC__)
TEST(math, gammaf_r) {
+#if defined(__BIONIC__)
int sign;
ASSERT_FLOAT_EQ(logf(24.0f), gammaf_r(5.0f, &sign));
ASSERT_EQ(1, sign);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
TEST(math, lgamma) {
ASSERT_FLOAT_EQ(log(24.0), lgamma(5.0));
diff --git a/tests/pthread_test.cpp b/tests/pthread_test.cpp
index 33317d9..d234118 100644
--- a/tests/pthread_test.cpp
+++ b/tests/pthread_test.cpp
@@ -20,6 +20,7 @@
#include <inttypes.h>
#include <limits.h>
#include <pthread.h>
+#include <signal.h>
#include <sys/mman.h>
#include <unistd.h>
@@ -31,8 +32,8 @@
ASSERT_EQ(EINVAL, pthread_key_delete(key));
}
-#if !defined(__GLIBC__) // glibc uses keys internally that its sysconf value doesn't account for.
TEST(pthread, pthread_key_create_lots) {
+#if defined(__BIONIC__) // glibc uses keys internally that its sysconf value doesn't account for.
// POSIX says PTHREAD_KEYS_MAX should be at least 128.
ASSERT_GE(PTHREAD_KEYS_MAX, 128);
@@ -59,8 +60,10 @@
for (size_t i = 0; i < keys.size(); ++i) {
ASSERT_EQ(0, pthread_key_delete(keys[i]));
}
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
static void* IdFn(void* arg) {
return arg;
@@ -249,31 +252,40 @@
ASSERT_EQ(0, pthread_sigmask(SIG_SETMASK, &original_set, NULL));
}
-#if __BIONIC__
+#if defined(__BIONIC__)
extern "C" pid_t __bionic_clone(int flags, void* child_stack, pid_t* parent_tid, void* tls, pid_t* child_tid, int (*fn)(void*), void* arg);
+#endif // __BIONIC__
+
TEST(pthread, __bionic_clone) {
+#if defined(__BIONIC__)
// Check that our hand-written clone assembler sets errno correctly on failure.
uintptr_t fake_child_stack[16];
errno = 0;
ASSERT_EQ(-1, __bionic_clone(CLONE_THREAD, &fake_child_stack[16], NULL, NULL, NULL, NULL, NULL));
ASSERT_EQ(EINVAL, errno);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-#if __BIONIC__ // Not all build servers have a new enough glibc? TODO: remove when they're on gprecise.
TEST(pthread, pthread_setname_np__too_long) {
+#if defined(__BIONIC__) // Not all build servers have a new enough glibc? TODO: remove when they're on gprecise.
ASSERT_EQ(ERANGE, pthread_setname_np(pthread_self(), "this name is far too long for linux"));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-#if __BIONIC__ // Not all build servers have a new enough glibc? TODO: remove when they're on gprecise.
TEST(pthread, pthread_setname_np__self) {
+#if defined(__BIONIC__) // Not all build servers have a new enough glibc? TODO: remove when they're on gprecise.
ASSERT_EQ(0, pthread_setname_np(pthread_self(), "short 1"));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-#if __BIONIC__ // Not all build servers have a new enough glibc? TODO: remove when they're on gprecise.
TEST(pthread, pthread_setname_np__other) {
+#if defined(__BIONIC__) // Not all build servers have a new enough glibc? TODO: remove when they're on gprecise.
// Emulator kernels don't currently support setting the name of other threads.
char* filename = NULL;
asprintf(&filename, "/proc/self/task/%d/comm", gettid());
@@ -288,18 +300,22 @@
} else {
fprintf(stderr, "skipping test: this kernel doesn't have /proc/self/task/tid/comm files!\n");
}
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-#if __BIONIC__ // Not all build servers have a new enough glibc? TODO: remove when they're on gprecise.
TEST(pthread, pthread_setname_np__no_such_thread) {
+#if defined(__BIONIC__) // Not all build servers have a new enough glibc? TODO: remove when they're on gprecise.
pthread_t dead_thread;
MakeDeadThread(dead_thread);
// Call pthread_setname_np after thread has already exited.
ASSERT_EQ(ESRCH, pthread_setname_np(dead_thread, "short 3"));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
TEST(pthread, pthread_kill__0) {
// Signal 0 just tests that the thread exists, so it's safe to call on ourselves.
@@ -511,13 +527,13 @@
ASSERT_EQ(0, pthread_attr_setstacksize(&attributes, 32*1024 + 1));
ASSERT_EQ(0, pthread_attr_getstacksize(&attributes, &stack_size));
ASSERT_EQ(32*1024U + 1, stack_size);
-#if __BIONIC__
+#if defined(__BIONIC__)
// Bionic rounds up, which is what POSIX allows.
ASSERT_EQ(GetActualStackSize(attributes), (32 + 4)*1024U);
-#else
+#else // __BIONIC__
// glibc rounds down, in violation of POSIX. They document this in their BUGS section.
ASSERT_EQ(GetActualStackSize(attributes), 32*1024U);
-#endif
+#endif // __BIONIC__
}
TEST(pthread, pthread_rwlock_smoke) {
diff --git a/tests/stack_protector_test.cpp b/tests/stack_protector_test.cpp
index 2ba8a87..fea24d8 100644
--- a/tests/stack_protector_test.cpp
+++ b/tests/stack_protector_test.cpp
@@ -27,17 +27,13 @@
#include <unistd.h>
#include <set>
-#ifdef __GLIBC__
-
+#if defined(__GLIBC__)
// glibc doesn't expose gettid(2).
pid_t gettid() { return syscall(__NR_gettid); }
-
-#endif
-
-#ifdef __i386__
+#endif // __GLIBC__
// For x86, bionic and glibc have per-thread stack guard values (all identical).
-
+#if defined(__i386__)
static uint32_t GetGuardFromTls() {
uint32_t guard;
asm ("mov %%gs:0x14, %0": "=d" (guard));
@@ -71,8 +67,10 @@
checker->Check();
return NULL;
}
+#endif // __i386__
TEST(stack_protector, same_guard_per_thread) {
+#if defined(__i386__)
stack_protector_checker checker;
size_t thread_count = 10;
for (size_t i = 0; i < thread_count; ++i) {
@@ -86,24 +84,19 @@
// bionic and glibc use the same guard for every thread.
ASSERT_EQ(1U, checker.guards.size());
+#else // __i386__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __i386__
}
-#endif
-
-#if defined(__BIONIC__) || defined(__arm__) || defined(__mips__)
-
// For ARM and MIPS, glibc has a global stack check guard value.
+#if defined(__BIONIC__) || defined(__arm__) || defined(__mips__)
+#define TEST_STACK_CHK_GUARD
// Bionic has the global for x86 too, to support binaries that can run on
// Android releases that didn't implement the TLS guard value.
-
extern "C" uintptr_t __stack_chk_guard;
-TEST(stack_protector, global_guard) {
- ASSERT_NE(0, gettid());
- ASSERT_NE(0U, __stack_chk_guard);
-}
-
/*
* When this function returns, the stack canary will be inconsistent
* with the previous value, which will generate a call to __stack_chk_fail(),
@@ -116,10 +109,22 @@
static void do_modify_stack_chk_guard() {
__stack_chk_guard = 0x12345678;
}
+#endif
-TEST(stack_protector_DeathTest, modify_stack_protector) {
- ::testing::FLAGS_gtest_death_test_style = "threadsafe";
- ASSERT_EXIT(do_modify_stack_chk_guard(), testing::KilledBySignal(SIGABRT), "");
+TEST(stack_protector, global_guard) {
+#if defined(TEST_STACK_CHK_GUARD)
+ ASSERT_NE(0, gettid());
+ ASSERT_NE(0U, __stack_chk_guard);
+#else // TEST_STACK_CHK_GUARD
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // TEST_STACK_CHK_GUARD
}
-#endif
+TEST(stack_protector_DeathTest, modify_stack_protector) {
+#if defined(TEST_STACK_CHK_GUARD)
+ ::testing::FLAGS_gtest_death_test_style = "threadsafe";
+ ASSERT_EXIT(do_modify_stack_chk_guard(), testing::KilledBySignal(SIGABRT), "");
+#else // TEST_STACK_CHK_GUARD
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // TEST_STACK_CHK_GUARD
+}
diff --git a/tests/stack_unwinding_test.cpp b/tests/stack_unwinding_test.cpp
index 3b18daa..1024f28 100644
--- a/tests/stack_unwinding_test.cpp
+++ b/tests/stack_unwinding_test.cpp
@@ -20,8 +20,6 @@
#include <gtest/gtest.h>
-#if defined(i386) // Only our x86 unwinding is good enough. Switch to libunwind?
-
extern "C" {
void do_test();
}
@@ -29,8 +27,11 @@
// We have to say "DeathTest" here so gtest knows to run this test (which exits)
// in its own process.
TEST(stack_unwinding_DeathTest, unwinding_through_signal_frame) {
+// Only our x86 unwinding is good enough. Switch to libunwind?
+#if defined(__BIONIC__) && defined(__i386__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
ASSERT_EXIT(do_test(), ::testing::ExitedWithCode(42), "");
+#else // __i386__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __i386__
}
-
-#endif
diff --git a/tests/stdio_test.cpp b/tests/stdio_test.cpp
index bd3c548..027de34 100644
--- a/tests/stdio_test.cpp
+++ b/tests/stdio_test.cpp
@@ -107,7 +107,7 @@
// glibc sometimes doesn't set errno in this particular case.
#if defined(__BIONIC__)
ASSERT_EQ(EBADF, errno);
-#endif
+#endif // __BIONIC__
}
TEST(stdio, getline) {
@@ -176,7 +176,7 @@
// glibc sometimes doesn't set errno in this particular case.
#if defined(__BIONIC__)
ASSERT_EQ(EBADF, errno);
-#endif
+#endif // __BIONIC__
}
TEST(stdio, printf_ssize_t) {
@@ -191,8 +191,8 @@
snprintf(buf, sizeof(buf), "%zd", v);
}
-#if !defined(__GLIBC__)
TEST(stdio, snprintf_n_format_specifier_not_implemented) {
+#if defined(__BIONIC__)
char buf[32];
int i = 0;
// We deliberately don't implement %n, so it's treated like
@@ -200,8 +200,10 @@
EXPECT_EQ(5, snprintf(buf, sizeof(buf), "a %n b", &i));
EXPECT_EQ(0, i);
EXPECT_STREQ("a n b", buf);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
TEST(stdio, snprintf_smoke) {
char buf[BUFSIZ];
@@ -283,9 +285,9 @@
snprintf(buf, sizeof(buf), "a%d,%pz", 5, p);
#if defined(__BIONIC__)
EXPECT_STREQ("a5,0x0z", buf);
-#else
+#else // __BIONIC__
EXPECT_STREQ("a5,(nil)z", buf);
-#endif
+#endif // __BIONIC__
snprintf(buf, sizeof(buf), "a%lld,%d,%d,%dz", 0x1000000000LL, 6, 7, 8);
EXPECT_STREQ("a68719476736,6,7,8z", buf);
diff --git a/tests/string_test.cpp b/tests/string_test.cpp
index 1a7e27d..c35976a 100644
--- a/tests/string_test.cpp
+++ b/tests/string_test.cpp
@@ -46,14 +46,16 @@
ASSERT_STREQ("Unknown error 1234", strerror(1234));
}
-#if __BIONIC__ // glibc's strerror isn't thread safe, only its strsignal.
-
+#if defined(__BIONIC__)
static void* ConcurrentStrErrorFn(void*) {
bool equal = (strcmp("Unknown error 2002", strerror(2002)) == 0);
return reinterpret_cast<void*>(equal);
}
+#endif // __BIONIC__
+// glibc's strerror isn't thread safe, only its strsignal.
TEST(string, strerror_concurrent) {
+#if defined(__BIONIC__)
const char* strerror1001 = strerror(1001);
ASSERT_STREQ("Unknown error 1001", strerror1001);
@@ -64,12 +66,13 @@
ASSERT_TRUE(static_cast<bool>(result));
ASSERT_STREQ("Unknown error 1001", strerror1001);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-
-#if __BIONIC__ // glibc's strerror_r doesn't even have the same signature as the POSIX one.
TEST(string, strerror_r) {
+#if defined(__BIONIC__) // glibc's strerror_r doesn't even have the same signature as the POSIX one.
char buf[256];
// Valid.
@@ -87,8 +90,10 @@
// Buffer too small.
ASSERT_EQ(-1, strerror_r(0, buf, 2));
ASSERT_EQ(ERANGE, errno);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
TEST(string, strsignal) {
// A regular signal.
@@ -478,8 +483,8 @@
}
-#if __BIONIC__
TEST(string, strlcat) {
+#if defined(__BIONIC__)
StringTestState<char> state(SMALL);
for (size_t i = 0; i < state.n; i++) {
for (size_t j = 0; j < POS_ITER; j++) {
@@ -504,11 +509,13 @@
ASSERT_TRUE(memcmp(state.ptr, state.ptr2, state.MAX_LEN + state.len[i]) == 0);
}
}
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
-#if __BIONIC__
TEST(string, strlcpy) {
+#if defined(__BIONIC__)
StringTestState<char> state(SMALL);
for (size_t j = 0; j < POS_ITER; j++) {
state.NewIteration();
@@ -539,8 +546,10 @@
ASSERT_FALSE((memcmp(state.ptr1, state.ptr, state.MAX_LEN) != 0) ||
(memcmp(state.ptr2, state.ptr + state.MAX_LEN, state.MAX_LEN) != 0));
}
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
TEST(string, strncat) {
StringTestState<char> state(SMALL);
@@ -732,10 +741,10 @@
}
}
-#if defined(__BIONIC__)
extern "C" int __memcmp16(const unsigned short *ptr1, const unsigned short *ptr2, size_t n);
TEST(string, __memcmp16) {
+#if defined(__BIONIC__)
StringTestState<unsigned short> state(SMALL);
for (size_t i = 0; i < state.n; i++) {
@@ -758,8 +767,10 @@
ASSERT_EQ(expected, actual);
}
}
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
TEST(string, wmemcmp) {
StringTestState<wchar_t> state(SMALL);
diff --git a/tests/stubs_test.cpp b/tests/stubs_test.cpp
index 2e1acc1..7d70aa6 100644
--- a/tests/stubs_test.cpp
+++ b/tests/stubs_test.cpp
@@ -23,8 +23,7 @@
#include <limits.h>
#include <unistd.h>
-#if __BIONIC__
-
+#if defined(__BIONIC__)
#define CHECK_GETPWNAM_FOR(username, uid, uid_type) \
SCOPED_TRACE(username); \
ASSERT_NO_FATAL_FAILURE(check_getpwnam(username, uid, uid_type));
@@ -51,6 +50,10 @@
EXPECT_STREQ("/system/bin/sh", pwd->pw_shell);
}
+#else
+#define CHECK_GETPWNAM_FOR(username, uid, uid_type) \
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif
TEST(getpwnam, system_id_root) {
CHECK_GETPWNAM_FOR("root", 0, TYPE_SYSTEM);
@@ -104,5 +107,3 @@
TEST(getpwnam, app_id_u1_i0) {
CHECK_GETPWNAM_FOR("u1_i0", 199000, TYPE_APP);
}
-
-#endif /* __BIONIC__ */
diff --git a/tests/sys_epoll_test.cpp b/tests/sys_epoll_test.cpp
index e4e047b..daa064a 100644
--- a/tests/sys_epoll_test.cpp
+++ b/tests/sys_epoll_test.cpp
@@ -17,6 +17,7 @@
#include <gtest/gtest.h>
#include <errno.h>
+#include <signal.h>
#include <sys/epoll.h>
TEST(sys_epoll, smoke) {
diff --git a/tests/sys_select_test.cpp b/tests/sys_select_test.cpp
index 57afc9b..4bb2d18 100644
--- a/tests/sys_select_test.cpp
+++ b/tests/sys_select_test.cpp
@@ -17,6 +17,7 @@
#include <gtest/gtest.h>
#include <errno.h>
+#include <signal.h>
#include <stdlib.h>
#include <sys/select.h>
diff --git a/tests/sys_sendfile_test.cpp b/tests/sys_sendfile_test.cpp
index bf23d3d..3d6b5cc 100644
--- a/tests/sys_sendfile_test.cpp
+++ b/tests/sys_sendfile_test.cpp
@@ -42,7 +42,6 @@
ASSERT_STREQ("ll", buf);
}
-#if __BIONIC__
TEST(sys_sendfile, sendfile64) {
TemporaryFile src_file;
ASSERT_EQ(5, TEMP_FAILURE_RETRY(write(src_file.fd, "hello", 5)));
@@ -61,4 +60,3 @@
ASSERT_EQ(2, TEMP_FAILURE_RETRY(read(dst_file.fd, &buf, 2)));
ASSERT_STREQ("ll", buf);
}
-#endif
diff --git a/tests/system_properties_test.cpp b/tests/system_properties_test.cpp
index 5367972..bfd5854 100644
--- a/tests/system_properties_test.cpp
+++ b/tests/system_properties_test.cpp
@@ -20,7 +20,7 @@
#include <unistd.h>
#include <string>
-#if __BIONIC__
+#if defined(__BIONIC__)
#define _REALLY_INCLUDE_SYS__SYSTEM_PROPERTIES_H_
#include <sys/_system_properties.h>
@@ -69,7 +69,54 @@
void *old_pa;
};
+static void foreach_test_callback(const prop_info *pi, void* cookie) {
+ size_t *count = static_cast<size_t *>(cookie);
+
+ ASSERT_NE((prop_info *)NULL, pi);
+ (*count)++;
+}
+
+static void hierarchical_test_callback(const prop_info *pi, void *cookie) {
+ bool (*ok)[8][8] = static_cast<bool (*)[8][8]>(cookie);
+
+ char name[PROP_NAME_MAX];
+ char value[PROP_VALUE_MAX];
+
+ __system_property_read(pi, name, value);
+
+ int name_i, name_j, name_k;
+ int value_i, value_j, value_k;
+ ASSERT_EQ(3, sscanf(name, "property_%d.%d.%d", &name_i, &name_j, &name_k));
+ ASSERT_EQ(3, sscanf(value, "value_%d.%d.%d", &value_i, &value_j, &value_k));
+ ASSERT_EQ(name_i, value_i);
+ ASSERT_GE(name_i, 0);
+ ASSERT_LT(name_i, 8);
+ ASSERT_EQ(name_j, value_j);
+ ASSERT_GE(name_j, 0);
+ ASSERT_LT(name_j, 8);
+ ASSERT_EQ(name_k, value_k);
+ ASSERT_GE(name_k, 0);
+ ASSERT_LT(name_k, 8);
+
+ ok[name_i][name_j][name_k] = true;
+}
+
+static void *PropertyWaitHelperFn(void *arg) {
+ int *flag = (int *)arg;
+ prop_info *pi;
+ pi = (prop_info *)__system_property_find("property");
+ usleep(100000);
+
+ *flag = 1;
+ __system_property_update(pi, "value3", 6);
+
+ return NULL;
+}
+
+#endif // __BIONIC__
+
TEST(properties, add) {
+#if defined(__BIONIC__)
LocalPropertyTestState pa;
ASSERT_TRUE(pa.valid);
@@ -87,9 +134,13 @@
ASSERT_EQ(6, __system_property_get("property_other", propvalue));
ASSERT_STREQ(propvalue, "value3");
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(properties, update) {
+#if defined(__BIONIC__)
LocalPropertyTestState pa;
ASSERT_TRUE(pa.valid);
@@ -120,9 +171,13 @@
ASSERT_EQ(6, __system_property_get("property_other", propvalue));
ASSERT_STREQ(propvalue, "value6");
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(properties, fill) {
+#if defined(__BIONIC__)
LocalPropertyTestState pa;
ASSERT_TRUE(pa.valid);
char prop_name[PROP_NAME_MAX];
@@ -161,16 +216,13 @@
ASSERT_EQ(PROP_VALUE_MAX - 1, __system_property_get(prop_name, prop_value_ret));
ASSERT_EQ(0, memcmp(prop_value, prop_value_ret, PROP_VALUE_MAX));
}
-}
-
-static void foreach_test_callback(const prop_info *pi, void* cookie) {
- size_t *count = static_cast<size_t *>(cookie);
-
- ASSERT_NE((prop_info *)NULL, pi);
- (*count)++;
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(properties, foreach) {
+#if defined(__BIONIC__)
LocalPropertyTestState pa;
ASSERT_TRUE(pa.valid);
size_t count = 0;
@@ -181,9 +233,13 @@
ASSERT_EQ(0, __system_property_foreach(foreach_test_callback, &count));
ASSERT_EQ(3U, count);
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(properties, find_nth) {
+#if defined(__BIONIC__)
LocalPropertyTestState pa;
ASSERT_TRUE(pa.valid);
@@ -201,34 +257,13 @@
ASSERT_EQ((const prop_info *)NULL, __system_property_find_nth(100));
ASSERT_EQ((const prop_info *)NULL, __system_property_find_nth(200));
ASSERT_EQ((const prop_info *)NULL, __system_property_find_nth(247));
-}
-
-static void hierarchical_test_callback(const prop_info *pi, void *cookie) {
- bool (*ok)[8][8] = static_cast<bool (*)[8][8]>(cookie);
-
- char name[PROP_NAME_MAX];
- char value[PROP_VALUE_MAX];
-
- __system_property_read(pi, name, value);
-
- int name_i, name_j, name_k;
- int value_i, value_j, value_k;
- ASSERT_EQ(3, sscanf(name, "property_%d.%d.%d", &name_i, &name_j, &name_k));
- ASSERT_EQ(3, sscanf(value, "value_%d.%d.%d", &value_i, &value_j, &value_k));
- ASSERT_EQ(name_i, value_i);
- ASSERT_GE(name_i, 0);
- ASSERT_LT(name_i, 8);
- ASSERT_EQ(name_j, value_j);
- ASSERT_GE(name_j, 0);
- ASSERT_LT(name_j, 8);
- ASSERT_EQ(name_k, value_k);
- ASSERT_GE(name_k, 0);
- ASSERT_LT(name_k, 8);
-
- ok[name_i][name_j][name_k] = true;
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(properties, fill_hierarchical) {
+#if defined(__BIONIC__)
LocalPropertyTestState pa;
ASSERT_TRUE(pa.valid);
char prop_name[PROP_NAME_MAX];
@@ -279,9 +314,13 @@
}
}
}
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(properties, errors) {
+#if defined(__BIONIC__)
LocalPropertyTestState pa;
ASSERT_TRUE(pa.valid);
char prop_value[PROP_NAME_MAX];
@@ -296,9 +335,13 @@
ASSERT_EQ(-1, __system_property_add("name", PROP_NAME_MAX, "value", 5));
ASSERT_EQ(-1, __system_property_add("name", 4, "value", PROP_VALUE_MAX));
ASSERT_EQ(-1, __system_property_update(NULL, "value", PROP_VALUE_MAX));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(properties, serial) {
+#if defined(__BIONIC__)
LocalPropertyTestState pa;
ASSERT_TRUE(pa.valid);
const prop_info *pi;
@@ -309,22 +352,13 @@
serial = __system_property_serial(pi);
ASSERT_EQ(0, __system_property_update((prop_info *)pi, "value2", 6));
ASSERT_NE(serial, __system_property_serial(pi));
-}
-
-static void *PropertyWaitHelperFn(void *arg)
-{
- int *flag = (int *)arg;
- prop_info *pi;
- pi = (prop_info *)__system_property_find("property");
- usleep(100000);
-
- *flag = 1;
- __system_property_update(pi, "value3", 6);
-
- return NULL;
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
TEST(properties, wait) {
+#if defined(__BIONIC__)
LocalPropertyTestState pa;
ASSERT_TRUE(pa.valid);
unsigned int serial;
@@ -346,6 +380,9 @@
void* result;
ASSERT_EQ(0, pthread_join(t, &result));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
class KilledByFault {
@@ -362,6 +399,7 @@
}
TEST(properties_DeathTest, read_only) {
+#if defined(__BIONIC__)
::testing::FLAGS_gtest_death_test_style = "threadsafe";
// This test only makes sense if we're talking to the real system property service.
@@ -371,6 +409,7 @@
}
ASSERT_EXIT(__system_property_add("property", 8, "value", 5), KilledByFault(), "");
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-
-#endif
diff --git a/tests/time_test.cpp b/tests/time_test.cpp
index fb5a4a7..869ee4b 100644
--- a/tests/time_test.cpp
+++ b/tests/time_test.cpp
@@ -20,9 +20,12 @@
#include <time.h>
-#ifdef __BIONIC__ // mktime_tz is a bionic extension.
+#if defined(__BIONIC__) // mktime_tz is a bionic extension.
#include <libc/private/bionic_time.h>
+#endif // __BIONIC__
+
TEST(time, mktime_tz) {
+#if defined(__BIONIC__)
struct tm epoch;
memset(&epoch, 0, sizeof(tm));
epoch.tm_year = 1970 - 1900;
@@ -40,8 +43,10 @@
// Missing. Falls back to UTC.
ASSERT_EQ(2678400, mktime_tz(&epoch, "PST"));
+#else // __BIONIC__
+ GTEST_LOG_(INFO) << "This test does nothing.\n";
+#endif // __BIONIC__
}
-#endif
TEST(time, gmtime) {
time_t t = 0;
@@ -55,7 +60,6 @@
ASSERT_EQ(1970, broken_down->tm_year + 1900);
}
-#if __BIONIC__
TEST(time, mktime_10310929) {
struct tm t;
memset(&t, 0, sizeof(tm));
@@ -66,7 +70,9 @@
#if !defined(__LP64__)
// 32-bit bionic stupidly had a signed 32-bit time_t.
ASSERT_EQ(-1, mktime(&t));
+#if defined(__BIONIC__)
ASSERT_EQ(-1, mktime_tz(&t, "UTC"));
+#endif
#else
// Everyone else should be using a signed 64-bit time_t.
ASSERT_GE(sizeof(time_t) * 8, 64U);
@@ -74,12 +80,15 @@
setenv("TZ", "America/Los_Angeles", 1);
tzset();
ASSERT_EQ(static_cast<time_t>(4108348800U), mktime(&t));
+#if defined(__BIONIC__)
ASSERT_EQ(static_cast<time_t>(4108320000U), mktime_tz(&t, "UTC"));
+#endif
setenv("TZ", "UTC", 1);
tzset();
ASSERT_EQ(static_cast<time_t>(4108320000U), mktime(&t));
+#if defined(__BIONIC__)
ASSERT_EQ(static_cast<time_t>(4108348800U), mktime_tz(&t, "America/Los_Angeles"));
#endif
-}
#endif
+}