Update to kernel headers v5.3.2.
Test: Builds and run unit tests on taimen/cuttlefish.
Change-Id: I6ebd8f179d159ac974555e8edca588083e8081b3
diff --git a/libc/kernel/uapi/drm/amdgpu_drm.h b/libc/kernel/uapi/drm/amdgpu_drm.h
index 193881d..dda9ced 100644
--- a/libc/kernel/uapi/drm/amdgpu_drm.h
+++ b/libc/kernel/uapi/drm/amdgpu_drm.h
@@ -546,6 +546,7 @@
#define AMDGPU_VRAM_TYPE_HBM 6
#define AMDGPU_VRAM_TYPE_DDR3 7
#define AMDGPU_VRAM_TYPE_DDR4 8
+#define AMDGPU_VRAM_TYPE_GDDR6 9
struct drm_amdgpu_info_device {
__u32 device_id;
__u32 chip_rev;
@@ -594,6 +595,7 @@
__u32 cu_ao_bitmap[4][4];
__u64 high_va_offset;
__u64 high_va_max;
+ __u32 pa_sc_tile_steering_override;
};
struct drm_amdgpu_info_hw_ip {
__u32 hw_ip_version_major;
@@ -628,6 +630,7 @@
#define AMDGPU_FAMILY_CZ 135
#define AMDGPU_FAMILY_AI 141
#define AMDGPU_FAMILY_RV 142
+#define AMDGPU_FAMILY_NV 143
#ifdef __cplusplus
}
#endif
diff --git a/libc/kernel/uapi/drm/drm.h b/libc/kernel/uapi/drm/drm.h
index 66adf99..7c5ffbb 100644
--- a/libc/kernel/uapi/drm/drm.h
+++ b/libc/kernel/uapi/drm/drm.h
@@ -23,6 +23,7 @@
#include <asm/ioctl.h>
typedef unsigned int drm_handle_t;
#else
+#include <stdint.h>
#include <sys/ioccom.h>
#include <sys/types.h>
typedef int8_t __s8;
diff --git a/libc/kernel/uapi/drm/drm_mode.h b/libc/kernel/uapi/drm/drm_mode.h
index 3f321d0..403c787 100644
--- a/libc/kernel/uapi/drm/drm_mode.h
+++ b/libc/kernel/uapi/drm/drm_mode.h
@@ -368,6 +368,26 @@
__u16 blue;
__u16 reserved;
};
+struct hdr_metadata_infoframe {
+ __u8 eotf;
+ __u8 metadata_type;
+ struct {
+ __u16 x, y;
+ } display_primaries[3];
+ struct {
+ __u16 x, y;
+ } white_point;
+ __u16 max_display_mastering_luminance;
+ __u16 min_display_mastering_luminance;
+ __u16 max_cll;
+ __u16 max_fall;
+};
+struct hdr_output_metadata {
+ __u32 metadata_type;
+ union {
+ struct hdr_metadata_infoframe hdmi_metadata_type1;
+ };
+};
#define DRM_MODE_PAGE_FLIP_EVENT 0x01
#define DRM_MODE_PAGE_FLIP_ASYNC 0x02
#define DRM_MODE_PAGE_FLIP_TARGET_ABSOLUTE 0x4
diff --git a/libc/kernel/uapi/drm/i915_drm.h b/libc/kernel/uapi/drm/i915_drm.h
index d83a4c0..8965f01 100644
--- a/libc/kernel/uapi/drm/i915_drm.h
+++ b/libc/kernel/uapi/drm/i915_drm.h
@@ -46,6 +46,8 @@
struct i915_engine_class_instance {
__u16 engine_class;
__u16 engine_instance;
+#define I915_ENGINE_CLASS_INVALID_NONE - 1
+#define I915_ENGINE_CLASS_INVALID_VIRTUAL - 2
};
enum drm_i915_pmu_engine_sample {
I915_SAMPLE_BUSY = 0,
@@ -212,6 +214,8 @@
#define DRM_I915_PERF_ADD_CONFIG 0x37
#define DRM_I915_PERF_REMOVE_CONFIG 0x38
#define DRM_I915_QUERY 0x39
+#define DRM_I915_GEM_VM_CREATE 0x3a
+#define DRM_I915_GEM_VM_DESTROY 0x3b
#define DRM_IOCTL_I915_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
#define DRM_IOCTL_I915_FLUSH DRM_IO(DRM_COMMAND_BASE + DRM_I915_FLUSH)
#define DRM_IOCTL_I915_FLIP DRM_IO(DRM_COMMAND_BASE + DRM_I915_FLIP)
@@ -270,6 +274,8 @@
#define DRM_IOCTL_I915_PERF_ADD_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_ADD_CONFIG, struct drm_i915_perf_oa_config)
#define DRM_IOCTL_I915_PERF_REMOVE_CONFIG DRM_IOW(DRM_COMMAND_BASE + DRM_I915_PERF_REMOVE_CONFIG, __u64)
#define DRM_IOCTL_I915_QUERY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_QUERY, struct drm_i915_query)
+#define DRM_IOCTL_I915_GEM_VM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_VM_CREATE, struct drm_i915_gem_vm_control)
+#define DRM_IOCTL_I915_GEM_VM_DESTROY DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_VM_DESTROY, struct drm_i915_gem_vm_control)
typedef struct drm_i915_batchbuffer {
int start;
int used;
@@ -351,6 +357,7 @@
#define I915_PARAM_HAS_CONTEXT_ISOLATION 50
#define I915_PARAM_CS_TIMESTAMP_FREQUENCY 51
#define I915_PARAM_MMAP_GTT_COHERENT 52
+#define I915_PARAM_HAS_EXEC_SUBMIT_FENCE 53
typedef struct drm_i915_getparam {
__s32 param;
int __user * value;
@@ -540,7 +547,8 @@
#define I915_EXEC_FENCE_OUT (1 << 17)
#define I915_EXEC_BATCH_FIRST (1 << 18)
#define I915_EXEC_FENCE_ARRAY (1 << 19)
-#define __I915_EXEC_UNKNOWN_FLAGS (- (I915_EXEC_FENCE_ARRAY << 1))
+#define I915_EXEC_FENCE_SUBMIT (1 << 20)
+#define __I915_EXEC_UNKNOWN_FLAGS (- (I915_EXEC_FENCE_SUBMIT << 1))
#define I915_EXEC_CONTEXT_ID_MASK (0xffffffff)
#define i915_execbuffer2_set_context_id(eb2,context) (eb2).rsvd1 = context & I915_EXEC_CONTEXT_ID_MASK
#define i915_execbuffer2_get_context_id(eb2) ((eb2).rsvd1 & I915_EXEC_CONTEXT_ID_MASK)
@@ -681,7 +689,8 @@
__u32 ctx_id;
__u32 flags;
#define I915_CONTEXT_CREATE_FLAGS_USE_EXTENSIONS (1u << 0)
-#define I915_CONTEXT_CREATE_FLAGS_UNKNOWN (- (I915_CONTEXT_CREATE_FLAGS_USE_EXTENSIONS << 1))
+#define I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE (1u << 1)
+#define I915_CONTEXT_CREATE_FLAGS_UNKNOWN (- (I915_CONTEXT_CREATE_FLAGS_SINGLE_TIMELINE << 1))
__u64 extensions;
};
struct drm_i915_gem_context_param {
@@ -699,22 +708,68 @@
#define I915_CONTEXT_MIN_USER_PRIORITY - 1023
#define I915_CONTEXT_PARAM_SSEU 0x7
#define I915_CONTEXT_PARAM_RECOVERABLE 0x8
+#define I915_CONTEXT_PARAM_VM 0x9
+#define I915_CONTEXT_PARAM_ENGINES 0xa
__u64 value;
};
struct drm_i915_gem_context_param_sseu {
struct i915_engine_class_instance engine;
__u32 flags;
+#define I915_CONTEXT_SSEU_FLAG_ENGINE_INDEX (1u << 0)
__u64 slice_mask;
__u64 subslice_mask;
__u16 min_eus_per_subslice;
__u16 max_eus_per_subslice;
__u32 rsvd;
};
+struct i915_context_engines_load_balance {
+ struct i915_user_extension base;
+ __u16 engine_index;
+ __u16 num_siblings;
+ __u32 flags;
+ __u64 mbz64;
+ struct i915_engine_class_instance engines[0];
+} __attribute__((packed));
+#define I915_DEFINE_CONTEXT_ENGINES_LOAD_BALANCE(name__,N__) struct { struct i915_user_extension base; __u16 engine_index; __u16 num_siblings; __u32 flags; __u64 mbz64; struct i915_engine_class_instance engines[N__]; \
+} __attribute__((packed)) name__
+struct i915_context_engines_bond {
+ struct i915_user_extension base;
+ struct i915_engine_class_instance master;
+ __u16 virtual_index;
+ __u16 num_bonds;
+ __u64 flags;
+ __u64 mbz64[4];
+ struct i915_engine_class_instance engines[0];
+} __attribute__((packed));
+#define I915_DEFINE_CONTEXT_ENGINES_BOND(name__,N__) struct { struct i915_user_extension base; struct i915_engine_class_instance master; __u16 virtual_index; __u16 num_bonds; __u64 flags; __u64 mbz64[4]; struct i915_engine_class_instance engines[N__]; \
+} __attribute__((packed)) name__
+struct i915_context_param_engines {
+ __u64 extensions;
+#define I915_CONTEXT_ENGINES_EXT_LOAD_BALANCE 0
+#define I915_CONTEXT_ENGINES_EXT_BOND 1
+ struct i915_engine_class_instance engines[0];
+} __attribute__((packed));
+#define I915_DEFINE_CONTEXT_PARAM_ENGINES(name__,N__) struct { __u64 extensions; struct i915_engine_class_instance engines[N__]; \
+} __attribute__((packed)) name__
struct drm_i915_gem_context_create_ext_setparam {
#define I915_CONTEXT_CREATE_EXT_SETPARAM 0
struct i915_user_extension base;
struct drm_i915_gem_context_param param;
};
+struct drm_i915_gem_context_create_ext_clone {
+#define I915_CONTEXT_CREATE_EXT_CLONE 1
+ struct i915_user_extension base;
+ __u32 clone_id;
+ __u32 flags;
+#define I915_CONTEXT_CLONE_ENGINES (1u << 0)
+#define I915_CONTEXT_CLONE_FLAGS (1u << 1)
+#define I915_CONTEXT_CLONE_SCHEDATTR (1u << 2)
+#define I915_CONTEXT_CLONE_SSEU (1u << 3)
+#define I915_CONTEXT_CLONE_TIMELINE (1u << 4)
+#define I915_CONTEXT_CLONE_VM (1u << 5)
+#define I915_CONTEXT_CLONE_UNKNOWN - (I915_CONTEXT_CLONE_VM << 1)
+ __u64 rsvd;
+};
struct drm_i915_gem_context_destroy {
__u32 ctx_id;
__u32 pad;
@@ -799,6 +854,7 @@
struct drm_i915_query_item {
__u64 query_id;
#define DRM_I915_QUERY_TOPOLOGY_INFO 1
+#define DRM_I915_QUERY_ENGINE_INFO 2
__s32 length;
__u32 flags;
__u64 data_ptr;
@@ -819,6 +875,20 @@
__u16 eu_stride;
__u8 data[];
};
+struct drm_i915_engine_info {
+ struct i915_engine_class_instance engine;
+ __u32 rsvd0;
+ __u64 flags;
+ __u64 capabilities;
+#define I915_VIDEO_CLASS_CAPABILITY_HEVC (1 << 0)
+#define I915_VIDEO_AND_ENHANCE_CLASS_CAPABILITY_SFC (1 << 1)
+ __u64 rsvd1[4];
+};
+struct drm_i915_query_engine_info {
+ __u32 num_engines;
+ __u32 rsvd[3];
+ struct drm_i915_engine_info engines[];
+};
#ifdef __cplusplus
}
#endif
diff --git a/libc/kernel/uapi/drm/panfrost_drm.h b/libc/kernel/uapi/drm/panfrost_drm.h
index 17f093b..4da1447 100644
--- a/libc/kernel/uapi/drm/panfrost_drm.h
+++ b/libc/kernel/uapi/drm/panfrost_drm.h
@@ -28,12 +28,16 @@
#define DRM_PANFROST_MMAP_BO 0x03
#define DRM_PANFROST_GET_PARAM 0x04
#define DRM_PANFROST_GET_BO_OFFSET 0x05
+#define DRM_PANFROST_PERFCNT_ENABLE 0x06
+#define DRM_PANFROST_PERFCNT_DUMP 0x07
#define DRM_IOCTL_PANFROST_SUBMIT DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_SUBMIT, struct drm_panfrost_submit)
#define DRM_IOCTL_PANFROST_WAIT_BO DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_WAIT_BO, struct drm_panfrost_wait_bo)
#define DRM_IOCTL_PANFROST_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_CREATE_BO, struct drm_panfrost_create_bo)
#define DRM_IOCTL_PANFROST_MMAP_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_MMAP_BO, struct drm_panfrost_mmap_bo)
#define DRM_IOCTL_PANFROST_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_GET_PARAM, struct drm_panfrost_get_param)
#define DRM_IOCTL_PANFROST_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_PANFROST_GET_BO_OFFSET, struct drm_panfrost_get_bo_offset)
+#define DRM_IOCTL_PANFROST_PERFCNT_ENABLE DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_PERFCNT_ENABLE, struct drm_panfrost_perfcnt_enable)
+#define DRM_IOCTL_PANFROST_PERFCNT_DUMP DRM_IOW(DRM_COMMAND_BASE + DRM_PANFROST_PERFCNT_DUMP, struct drm_panfrost_perfcnt_dump)
#define PANFROST_JD_REQ_FS (1 << 0)
struct drm_panfrost_submit {
__u64 jc;
@@ -74,6 +78,13 @@
__u32 pad;
__u64 offset;
};
+struct drm_panfrost_perfcnt_enable {
+ __u32 enable;
+ __u32 counterset;
+};
+struct drm_panfrost_perfcnt_dump {
+ __u64 buf_ptr;
+};
#ifdef __cplusplus
}
#endif
diff --git a/libc/kernel/uapi/drm/v3d_drm.h b/libc/kernel/uapi/drm/v3d_drm.h
index 985f327..0b6b94f 100644
--- a/libc/kernel/uapi/drm/v3d_drm.h
+++ b/libc/kernel/uapi/drm/v3d_drm.h
@@ -29,6 +29,7 @@
#define DRM_V3D_GET_PARAM 0x04
#define DRM_V3D_GET_BO_OFFSET 0x05
#define DRM_V3D_SUBMIT_TFU 0x06
+#define DRM_V3D_SUBMIT_CSD 0x07
#define DRM_IOCTL_V3D_SUBMIT_CL DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CL, struct drm_v3d_submit_cl)
#define DRM_IOCTL_V3D_WAIT_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_WAIT_BO, struct drm_v3d_wait_bo)
#define DRM_IOCTL_V3D_CREATE_BO DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_CREATE_BO, struct drm_v3d_create_bo)
@@ -36,6 +37,7 @@
#define DRM_IOCTL_V3D_GET_PARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_PARAM, struct drm_v3d_get_param)
#define DRM_IOCTL_V3D_GET_BO_OFFSET DRM_IOWR(DRM_COMMAND_BASE + DRM_V3D_GET_BO_OFFSET, struct drm_v3d_get_bo_offset)
#define DRM_IOCTL_V3D_SUBMIT_TFU DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_TFU, struct drm_v3d_submit_tfu)
+#define DRM_IOCTL_V3D_SUBMIT_CSD DRM_IOW(DRM_COMMAND_BASE + DRM_V3D_SUBMIT_CSD, struct drm_v3d_submit_csd)
struct drm_v3d_submit_cl {
__u32 bcl_start;
__u32 bcl_end;
@@ -76,6 +78,7 @@
DRM_V3D_PARAM_V3D_CORE0_IDENT1,
DRM_V3D_PARAM_V3D_CORE0_IDENT2,
DRM_V3D_PARAM_SUPPORTS_TFU,
+ DRM_V3D_PARAM_SUPPORTS_CSD,
};
struct drm_v3d_get_param {
__u32 param;
@@ -99,6 +102,14 @@
__u32 in_sync;
__u32 out_sync;
};
+struct drm_v3d_submit_csd {
+ __u32 cfg[7];
+ __u32 coef[4];
+ __u64 bo_handles;
+ __u32 bo_handle_count;
+ __u32 in_sync;
+ __u32 out_sync;
+};
#ifdef __cplusplus
}
#endif