commit b24dab5893fe22c6f412b51a938420e9fad33c3c
author George Burgess IV <gbiv@google.com> Wed Dec 11 14:29:27 2024 -0700
committer George Burgess IV <gbiv@google.com> Wed Dec 11 16:30:48 2024 -0700
tree 0812279bedac99ab857b24f8c971659f151e75cc
parent 6f4c51d7c9a66c62fa8b893d34103c5cae9739b9

libc: remove riscv64 mem*/str* ifuncs and fallbacks

Only riscv64 chips with vector support are supported, so the fallbacks &
ifuncs here aren't needed.

Bug: 378117947
Test: lunch aosp_cf_riscv64_phone-trunk_staging-userdebug; m
Change-Id: Idf4aed1acc4f0ceea2c17fc6771052563aec94c1

libc/arch-riscv64/string/strcmp_v.S

diff --git a/libc/arch-riscv64/string/strcmp_v.S b/libc/arch-riscv64/string/strcmp_v.S
index 01e72b1..3332c83 100644
--- a/libc/arch-riscv64/string/strcmp_v.S
+++ b/libc/arch-riscv64/string/strcmp_v.S
@@ -74,7 +74,7 @@
 #define vMask1 v16
 #define vMask2 v17
 
-ENTRY(strcmp_v)
+ENTRY(strcmp)
 
     # increase the lmul using the following sequences:
     # 1/2, 1/2, 1, 2, 4, 4, 4, ...
@@ -166,4 +166,4 @@
     sub iResult, iTemp1, iTemp2
     ret
 
-END(strcmp_v)
+END(strcmp)