Merge "Change _POSIX_CPUTIME macro to make it compitable with glibc."
diff --git a/libc/arch-arm/bionic/setjmp.S b/libc/arch-arm/bionic/setjmp.S
index 7a99fc0..8d7786c 100644
--- a/libc/arch-arm/bionic/setjmp.S
+++ b/libc/arch-arm/bionic/setjmp.S
@@ -64,15 +64,12 @@
// FP registers will be loaded/stored with instructions
// that expect 8-byte alignment.
-#define _JB_MAGIC 0
-#define _JB_SIGMASK (_JB_MAGIC+1)
+#define _JB_SIGFLAG 0
+#define _JB_SIGMASK (_JB_SIGFLAG+1)
#define _JB_FLOAT_BASE (_JB_SIGMASK+1)
#define _JB_FLOAT_STATE (_JB_FLOAT_BASE + (15-8+1)*2)
#define _JB_CORE_BASE (_JB_FLOAT_STATE+1)
-.L_setjmp_magic_signal_mask_n: .word 0x4278f500
-.L_setjmp_magic_signal_mask_y: .word 0x4278f501
-
ENTRY(setjmp)
mov r1, #1
b sigsetjmp
@@ -85,9 +82,11 @@
// int sigsetjmp(sigjmp_buf env, int save_signal_mask);
ENTRY(sigsetjmp)
+ // Record whether or not we're saving the signal mask.
+ str r1, [r0, #(_JB_SIGFLAG * 4)]
+
// Do we need to save the signal mask?
teq r1, #0
- ldreq r1, .L_setjmp_magic_signal_mask_n
beq 1f
// Get current signal mask.
@@ -101,15 +100,10 @@
ldmfd sp!, {r0, r14}
.cfi_def_cfa_offset 0
- // Save signal mask.
+ // Save the signal mask.
str r1, [r0, #(_JB_SIGMASK * 4)]
- ldr r1, .L_setjmp_magic_signal_mask_y
-
1:
- // Save magic number.
- str r1, [r0, #(_JB_MAGIC * 4)]
-
// Save core registers.
add r1, r0, #(_JB_CORE_BASE * 4)
stmia r1, {r4-r14}
@@ -128,16 +122,12 @@
// void siglongjmp(sigjmp_buf env, int value);
ENTRY(siglongjmp)
- // Check magic.
- ldr r3, [r0, #(_JB_MAGIC * 4)]
- ldr r2, .L_setjmp_magic_signal_mask_n
- teq r2, r3
+ // Do we need to restore the signal mask?
+ ldr r2, [r0, #(_JB_SIGFLAG * 4)]
+ teq r2, #0
beq 1f
- ldr r2, .L_setjmp_magic_signal_mask_y
- teq r2, r3
- bne longjmperror
- // Restore signal mask.
+ // Restore the signal mask.
stmfd sp!, {r0, r1, r14}
.cfi_def_cfa_offset 12
.cfi_rel_offset r0, 0
diff --git a/libc/arch-arm/include/machine/endian.h b/libc/arch-arm/include/machine/endian.h
deleted file mode 100644
index 04bba20..0000000
--- a/libc/arch-arm/include/machine/endian.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/* $OpenBSD: endian.h,v 1.3 2005/12/13 00:35:23 millert Exp $ */
-
-/*
- * Copyright (C) 2010 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#ifndef _ARM_ENDIAN_H_
-#define _ARM_ENDIAN_H_
-
-#ifdef __GNUC__
-
-/* According to RealView Assembler User's Guide, REV and REV16 are available
- * in Thumb code and 16-bit instructions when used in Thumb-2 code.
- *
- * REV Rd, Rm
- * Rd and Rm must both be Lo registers.
- *
- * REV16 Rd, Rm
- * Rd and Rm must both be Lo registers.
- *
- * The +l constraint takes care of this without constraining us in ARM mode.
- */
-#define __swap16md(x) ({ \
- register u_int16_t _x = (x); \
- __asm__ __volatile__("rev16 %0, %0" : "+l" (_x)); \
- _x; \
-})
-
-#define __swap32md(x) ({ \
- register u_int32_t _x = (x); \
- __asm__ __volatile__("rev %0, %0" : "+l" (_x)); \
- _x; \
-})
-
-#define __swap64md(x) ({ \
- u_int64_t _swap64md_x = (x); \
- (u_int64_t) __swap32md(_swap64md_x >> 32) | \
- (u_int64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \
-})
-
-/* Tell sys/endian.h we have MD variants of the swap macros. */
-#define MD_SWAP
-
-#endif /* __GNUC__ */
-
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#define __STRICT_ALIGNMENT
-#include <sys/types.h>
-#include <sys/endian.h>
-
-#endif /* !_ARM_ENDIAN_H_ */
diff --git a/libc/arch-arm64/bionic/setjmp.S b/libc/arch-arm64/bionic/setjmp.S
index d8b98a3..5c956ff 100644
--- a/libc/arch-arm64/bionic/setjmp.S
+++ b/libc/arch-arm64/bionic/setjmp.S
@@ -34,36 +34,23 @@
// Core x19 - x30, sp (see section 5.1.1)
// VFP d8 - d15 (see section 5.1.2)
//
-// NOTE: All the registers saved here will have 64bit vales (except FPSR).
+// NOTE: All the registers saved here will have 64 bit vales.
// AAPCS mandates that the higher part of q registers do not need to
// be saved by the callee.
-// The structure of jmp_buf for AArch64:
-//
-// NOTE: _JBLEN is the size of jmp_buf in longs(64bit on AArch64)! The table
-// below computes the offsets in words(32bit).
-//
-// word name description
-// -------------------------------------------------------------------------
-// 0-1 sigmask signal mask (not used with _setjmp / _longjmp)
-// 2 core_base base of core registers (x19-x30, sp)
-// 28 float_base base of float registers (d8-d15)
-// 44 magic magic number
-// 45- reserved reserved entries (room to grow)
-// 64
-//
-// NOTE: The instructions that load/store core/vfp registers expect 8-byte
-// alignment. Contrary to the previous setjmp header for ARM we do not
-// need to save status/control registers for VFP (it is not a
-// requirement for setjmp).
-
-#define _JB_SIGMASK 0
-#define _JB_CORE_BASE (_JB_SIGMASK + 2)
-#define _JB_FLOAT_BASE (_JB_CORE_BASE + (31-19+1)*2)
-#define _JB_MAGIC (_JB_FLOAT_BASE + 16*2)
-
-.L_setjmp_magic_signal_mask_n: .word 0x53657200
-.L_setjmp_magic_signal_mask_y: .word 0x53657201
+#define _JB_SIGFLAG 0
+#define _JB_SIGMASK (_JB_SIGFLAG + 1)
+#define _JB_X30_SP (_JB_SIGMASK + 1)
+#define _JB_X28_X29 (_JB_X30_SP + 2)
+#define _JB_X26_X27 (_JB_X28_X29 + 2)
+#define _JB_X24_X25 (_JB_X26_X27 + 2)
+#define _JB_X22_X23 (_JB_X24_X25 + 2)
+#define _JB_X20_X21 (_JB_X22_X23 + 2)
+#define _JB_X19 (_JB_X20_X21 + 2)
+#define _JB_D14_D15 (_JB_X19 + 1)
+#define _JB_D12_D13 (_JB_D14_D15 + 2)
+#define _JB_D10_D11 (_JB_D12_D13 + 1)
+#define _JB_D8_D9 (_JB_D10_D11 + 1)
ENTRY(setjmp)
mov w1, #1
@@ -77,61 +64,53 @@
// int sigsetjmp(sigjmp_buf env, int save_signal_mask);
ENTRY(sigsetjmp)
+ // Record whether or not we're saving the signal mask.
+ str w1, [x0, #(_JB_SIGFLAG * 8)]
+
// Do we need to save the signal mask?
- ldr w9, .L_setjmp_magic_signal_mask_n
cbz w1, 1f
// Save current signal mask.
stp x0, x30, [sp, #-16]!
// The 'how' argument is ignored if new_mask is NULL.
mov x1, #0 // NULL.
- add x2, x0, #(_JB_SIGMASK * 4) // old_mask.
+ add x2, x0, #(_JB_SIGMASK * 8) // old_mask.
bl sigprocmask
ldp x0, x30, [sp], #16
- ldr w9, .L_setjmp_magic_signal_mask_y
-
1:
- // Save magic number.
- str w9, [x0, #(_JB_MAGIC * 4)]
-
// Save core registers.
mov x10, sp
- stp x30, x10, [x0, #(_JB_CORE_BASE * 4 + 16 * 0)]
- stp x28, x29, [x0, #(_JB_CORE_BASE * 4 + 16 * 1)]
- stp x26, x27, [x0, #(_JB_CORE_BASE * 4 + 16 * 2)]
- stp x24, x25, [x0, #(_JB_CORE_BASE * 4 + 16 * 3)]
- stp x22, x23, [x0, #(_JB_CORE_BASE * 4 + 16 * 4)]
- stp x20, x21, [x0, #(_JB_CORE_BASE * 4 + 16 * 5)]
- str x19, [x0, #(_JB_CORE_BASE * 4 + 16 * 6)]
+ stp x30, x10, [x0, #(_JB_X30_SP * 8)]
+ stp x28, x29, [x0, #(_JB_X28_X29 * 8)]
+ stp x26, x27, [x0, #(_JB_X26_X27 * 8)]
+ stp x24, x25, [x0, #(_JB_X24_X25 * 8)]
+ stp x22, x23, [x0, #(_JB_X22_X23 * 8)]
+ stp x20, x21, [x0, #(_JB_X20_X21 * 8)]
+ str x19, [x0, #(_JB_X19 * 8)]
// Save floating point registers.
- stp d14, d15, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 0)]
- stp d12, d13, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 1)]
- stp d10, d11, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 2)]
- stp d8, d9, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 3)]
+ stp d14, d15, [x0, #(_JB_D14_D15 * 8)]
+ stp d12, d13, [x0, #(_JB_D12_D13 * 8)]
+ stp d10, d11, [x0, #(_JB_D10_D11 * 8)]
+ stp d8, d9, [x0, #(_JB_D8_D9 * 8)]
- mov w0, wzr
+ mov w0, #0
ret
END(sigsetjmp)
// void siglongjmp(sigjmp_buf env, int value);
ENTRY(siglongjmp)
- // Check magic.
- ldr w10, [x0, #(_JB_MAGIC * 4)]
- ldr w9, .L_setjmp_magic_signal_mask_n
- cmp w9, w10
- b.eq 1f
- ldr w9, .L_setjmp_magic_signal_mask_y
- cmp w9, w10
- b.ne longjmperror
+ // Do we need to restore the signal mask?
+ ldr w9, [x0, #(_JB_SIGFLAG * 8)]
+ cbz w9, 1f
// Restore signal mask.
stp x0, x30, [sp, #-16]!
mov x19, x1 // Save 'value'.
mov x2, x0
mov x0, #2 // SIG_SETMASK
- add x1, x2, #(_JB_SIGMASK * 4) // new_mask.
+ add x1, x2, #(_JB_SIGMASK * 8) // new_mask.
mov x2, #0 // NULL.
bl sigprocmask
mov x1, x19 // Restore 'value'.
@@ -139,20 +118,20 @@
1:
// Restore core registers.
- ldp x30, x10, [x0, #(_JB_CORE_BASE * 4 + 16 * 0)]
+ ldp x30, x10, [x0, #(_JB_X30_SP * 8)]
mov sp, x10
- ldp x28, x29, [x0, #(_JB_CORE_BASE * 4 + 16 * 1)]
- ldp x26, x27, [x0, #(_JB_CORE_BASE * 4 + 16 * 2)]
- ldp x24, x25, [x0, #(_JB_CORE_BASE * 4 + 16 * 3)]
- ldp x22, x23, [x0, #(_JB_CORE_BASE * 4 + 16 * 4)]
- ldp x20, x21, [x0, #(_JB_CORE_BASE * 4 + 16 * 5)]
- ldr x19, [x0, #(_JB_CORE_BASE * 4 + 16 * 6)]
+ ldp x28, x29, [x0, #(_JB_X28_X29 * 8)]
+ ldp x26, x27, [x0, #(_JB_X26_X27 * 8)]
+ ldp x24, x25, [x0, #(_JB_X24_X25 * 8)]
+ ldp x22, x23, [x0, #(_JB_X22_X23 * 8)]
+ ldp x20, x21, [x0, #(_JB_X20_X21 * 8)]
+ ldr x19, [x0, #(_JB_X19 * 8)]
// Restore floating point registers.
- ldp d14, d15, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 0)]
- ldp d12, d13, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 1)]
- ldp d10, d11, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 2)]
- ldp d8, d9, [x0, #(_JB_FLOAT_BASE * 4 + 16 * 3)]
+ ldp d14, d15, [x0, #(_JB_D14_D15 * 8)]
+ ldp d12, d13, [x0, #(_JB_D12_D13 * 8)]
+ ldp d10, d11, [x0, #(_JB_D10_D11 * 8)]
+ ldp d8, d9, [x0, #(_JB_D8_D9 * 8)]
// Validate sp (sp mod 16 = 0) and lr (lr mod 4 = 0).
tst x30, #3
diff --git a/libc/arch-mips/bionic/_setjmp.S b/libc/arch-mips/bionic/_setjmp.S
deleted file mode 100644
index 052dacb..0000000
--- a/libc/arch-mips/bionic/_setjmp.S
+++ /dev/null
@@ -1,172 +0,0 @@
-/* $OpenBSD: _setjmp.S,v 1.4 2005/08/07 16:40:15 espie Exp $ */
-
-/*
- * Copyright (c) 2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of Opsycon AB nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <private/bionic_asm.h>
-#include <machine/signal.h>
-
-/*
- * _setjmp, _longjmp (not restoring signal state)
- *
- * GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
- *
- */
-
-FRAMESZ= MKFSIZ(0,4)
-GPOFF= FRAMESZ-2*REGSZ
-
-LEAF(_setjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, _setjmp)
- SAVE_GP(GPOFF)
- .set reorder
-
-#ifndef __LP64__
- addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
- li t0, ~7
- and a0, t0
-#endif
-
- # SC_MASK is unused here
-
- li v0, 0xACEDBADE # sigcontext magic number
- sw v0, SC_MAGIC(a0)
- # callee-saved long-sized regs:
- REG_S ra, SC_REGS+0*REGSZ(a0)
- REG_S s0, SC_REGS+1*REGSZ(a0)
- REG_S s1, SC_REGS+2*REGSZ(a0)
- REG_S s2, SC_REGS+3*REGSZ(a0)
- REG_S s3, SC_REGS+4*REGSZ(a0)
- REG_S s4, SC_REGS+5*REGSZ(a0)
- REG_S s5, SC_REGS+6*REGSZ(a0)
- REG_S s6, SC_REGS+7*REGSZ(a0)
- REG_S s7, SC_REGS+8*REGSZ(a0)
- REG_S s8, SC_REGS+9*REGSZ(a0)
- REG_L v0, GPOFF(sp)
- REG_S v0, SC_REGS+10*REGSZ(a0)
- PTR_ADDU v0, sp, FRAMESZ
- REG_S v0, SC_REGS+11*REGSZ(a0)
-
- cfc1 v0, $31
-
-#ifdef __LP64__
- # callee-saved fp regs on mips n64 ABI are $f24..$f31
- s.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
- s.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
- s.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
- s.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
- s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
- s.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
- s.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
- s.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
-#else
- # callee-saved fp regs on mips o32 ABI are
- # the even-numbered fp regs $f20,$f22,...$f30
- s.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
- s.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
- s.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
- s.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
- s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
- s.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
-#endif
- sw v0, SC_FPSR(a0)
- move v0, zero
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- j ra
-END(_setjmp)
-
-
-LEAF(_longjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, _longjmp)
- SAVE_GP(GPOFF)
- .set reorder
-
-#ifndef __LP64__
- addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
- li t0, ~7
- and a0, t0
-#endif
-
- # SC_MASK is unused here
-
- lw v0, SC_MAGIC(a0)
- li t0, 0xACEDBADE
- bne v0, t0, botch # jump if error
-
- # callee-saved long-sized regs:
- REG_L ra, SC_REGS+0*REGSZ(a0)
- REG_L s0, SC_REGS+1*REGSZ(a0)
- REG_L s1, SC_REGS+2*REGSZ(a0)
- REG_L s2, SC_REGS+3*REGSZ(a0)
- REG_L s3, SC_REGS+4*REGSZ(a0)
- REG_L s4, SC_REGS+5*REGSZ(a0)
- REG_L s5, SC_REGS+6*REGSZ(a0)
- REG_L s6, SC_REGS+7*REGSZ(a0)
- REG_L s7, SC_REGS+8*REGSZ(a0)
- REG_L s8, SC_REGS+9*REGSZ(a0)
- REG_L gp, SC_REGS+10*REGSZ(a0)
- REG_L sp, SC_REGS+11*REGSZ(a0)
-
- lw v0, SC_FPSR(a0)
- ctc1 v0, $31
-#ifdef __LP64__
- # callee-saved fp regs on mips n64 ABI are $f24..$f31
- l.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
- l.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
- l.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
- l.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
- l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
- l.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
- l.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
- l.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
-#else
- # callee-saved fp regs on mips o32 ABI are
- # the even-numbered fp regs $f20,$f22,...$f30
- l.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
- l.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
- l.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
- l.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
- l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
- l.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
-#endif
- bne a1, zero, 1f
- li a1, 1 # never return 0!
-1:
- move v0, a1
- j ra
-
-botch:
- jal longjmperror
- jal abort
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
-END(_longjmp)
diff --git a/libc/arch-mips/bionic/setjmp.S b/libc/arch-mips/bionic/setjmp.S
index a1d4695..05d0e25 100644
--- a/libc/arch-mips/bionic/setjmp.S
+++ b/libc/arch-mips/bionic/setjmp.S
@@ -1,5 +1,3 @@
-/* $OpenBSD: setjmp.S,v 1.5 2005/08/07 16:40:15 espie Exp $ */
-
/*
* Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
*
@@ -28,9 +26,111 @@
* SUCH DAMAGE.
*
*/
+/*-
+ * Copyright (c) 1991, 1993, 1995,
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Havard Eidnes.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+/*
+ * Copyright (c) 1992, 1993
+ * The Regents of the University of California. All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Ralph Campbell.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ * 3. Neither the name of the University nor the names of its contributors
+ * may be used to endorse or promote products derived from this software
+ * without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * @(#)signal.h 8.1 (Berkeley) 6/10/93
+ */
#include <private/bionic_asm.h>
-#include <machine/signal.h>
+#include <machine/setjmp.h>
+
+/* On Mips32, jmpbuf begins with optional 4-byte filler so that
+ * all saved FP regs are aligned on 8-byte boundary, despite this whole
+ * struct being mis-declared to users as an array of (4-byte) longs.
+ * All the following offsets are then from the rounded-up base addr
+ */
+
+/* Fields of same size on all MIPS abis: */
+#define SC_MAGIC (0*4) /* 4 bytes, identify jmpbuf */
+#define SC_MASK (1*4) /* 4 bytes, saved signal mask */
+#define SC_FPSR (2*4) /* 4 bytes, floating point control/status reg */
+/* filler2 (3*4) 4 bytes, pad to 8-byte boundary */
+
+/* Registers that are 4-byte on mips32 o32, and 8-byte on mips64 n64 abi */
+#define SC_REGS_SAVED 12 /* ra,gp,sp,s0-s8 */
+#define SC_REGS (4*4) /* SC_REGS_SAVED*REGSZ bytes */
+
+/* Floating pt registers are 8-bytes on all abis,
+ * but the number of saved fp regs varies for o32/n32 versus n64 abis:
+ */
+
+#ifdef __LP64__
+#define SC_FPREGS_SAVED 8 /* all fp regs f24,f25,f26,f27,f28,f29,f30,f31 */
+#else
+#define SC_FPREGS_SAVED 6 /* even fp regs f20,f22,f24,f26,f28,f30 */
+#endif
+
+#define SC_FPREGS (SC_REGS + SC_REGS_SAVED*REGSZ) /* SC_FPREGS_SAVED*REGSZ_FP bytes */
+
+#define SC_BYTES (SC_FPREGS + SC_FPREGS_SAVED*REGSZ_FP)
+#define SC_LONGS (SC_BYTES/REGSZ)
+
+#ifdef __LP64__
+/* SC_LONGS is 22, so _JBLEN should be 22 or larger */
+#else
+/* SC_LONGS is 28, but must also allocate dynamic-roundup filler.
+ so _JBLEN should be 29 or larger */
+#endif
/*
* _setjmp, _longjmp (restoring signal state)
@@ -114,7 +214,6 @@
j ra
END(setjmp)
-
NON_LEAF(longjmp, FRAMESZ, ra)
.mask 0x80000000, RAOFF
PTR_SUBU sp, FRAMESZ
@@ -137,7 +236,7 @@
lw v0, SC_MAGIC(a0)
li t0, 0xACEDBADE
- bne v0, t0, botch # jump if error
+ bne v0, t0, longjmp_botch # jump if error
# callee-saved long-sized regs:
REG_L ra, SC_REGS+0*REGSZ(a0)
@@ -181,9 +280,190 @@
move v0, a1
j ra
-botch:
+longjmp_botch:
jal longjmperror
jal abort
RESTORE_GP64
PTR_ADDU sp, FRAMESZ
END(longjmp)
+
+
+/*
+ * _setjmp, _longjmp (not restoring signal state)
+ *
+ * GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
+ *
+ */
+
+FRAMESZ= MKFSIZ(0,4)
+GPOFF= FRAMESZ-2*REGSZ
+
+LEAF(_setjmp, FRAMESZ)
+ PTR_SUBU sp, FRAMESZ
+ SETUP_GP64(GPOFF, _setjmp)
+ SAVE_GP(GPOFF)
+ .set reorder
+
+#ifndef __LP64__
+ addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
+ li t0, ~7
+ and a0, t0
+#endif
+
+ # SC_MASK is unused here
+
+ li v0, 0xACEDBADE # sigcontext magic number
+ sw v0, SC_MAGIC(a0)
+ # callee-saved long-sized regs:
+ REG_S ra, SC_REGS+0*REGSZ(a0)
+ REG_S s0, SC_REGS+1*REGSZ(a0)
+ REG_S s1, SC_REGS+2*REGSZ(a0)
+ REG_S s2, SC_REGS+3*REGSZ(a0)
+ REG_S s3, SC_REGS+4*REGSZ(a0)
+ REG_S s4, SC_REGS+5*REGSZ(a0)
+ REG_S s5, SC_REGS+6*REGSZ(a0)
+ REG_S s6, SC_REGS+7*REGSZ(a0)
+ REG_S s7, SC_REGS+8*REGSZ(a0)
+ REG_S s8, SC_REGS+9*REGSZ(a0)
+ REG_L v0, GPOFF(sp)
+ REG_S v0, SC_REGS+10*REGSZ(a0)
+ PTR_ADDU v0, sp, FRAMESZ
+ REG_S v0, SC_REGS+11*REGSZ(a0)
+
+ cfc1 v0, $31
+
+#ifdef __LP64__
+ # callee-saved fp regs on mips n64 ABI are $f24..$f31
+ s.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
+ s.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
+ s.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
+ s.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
+ s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ s.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
+ s.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
+ s.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+ # callee-saved fp regs on mips o32 ABI are
+ # the even-numbered fp regs $f20,$f22,...$f30
+ s.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
+ s.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
+ s.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
+ s.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
+ s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ s.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
+#endif
+ sw v0, SC_FPSR(a0)
+ move v0, zero
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+ j ra
+END(_setjmp)
+
+
+LEAF(_longjmp, FRAMESZ)
+ PTR_SUBU sp, FRAMESZ
+ SETUP_GP64(GPOFF, _longjmp)
+ SAVE_GP(GPOFF)
+ .set reorder
+
+#ifndef __LP64__
+ addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
+ li t0, ~7
+ and a0, t0
+#endif
+
+ # SC_MASK is unused here
+
+ lw v0, SC_MAGIC(a0)
+ li t0, 0xACEDBADE
+ bne v0, t0, _longjmp_botch # jump if error
+
+ # callee-saved long-sized regs:
+ REG_L ra, SC_REGS+0*REGSZ(a0)
+ REG_L s0, SC_REGS+1*REGSZ(a0)
+ REG_L s1, SC_REGS+2*REGSZ(a0)
+ REG_L s2, SC_REGS+3*REGSZ(a0)
+ REG_L s3, SC_REGS+4*REGSZ(a0)
+ REG_L s4, SC_REGS+5*REGSZ(a0)
+ REG_L s5, SC_REGS+6*REGSZ(a0)
+ REG_L s6, SC_REGS+7*REGSZ(a0)
+ REG_L s7, SC_REGS+8*REGSZ(a0)
+ REG_L s8, SC_REGS+9*REGSZ(a0)
+ REG_L gp, SC_REGS+10*REGSZ(a0)
+ REG_L sp, SC_REGS+11*REGSZ(a0)
+
+ lw v0, SC_FPSR(a0)
+ ctc1 v0, $31
+#ifdef __LP64__
+ # callee-saved fp regs on mips n64 ABI are $f24..$f31
+ l.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
+ l.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
+ l.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
+ l.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
+ l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ l.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
+ l.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
+ l.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
+#else
+ # callee-saved fp regs on mips o32 ABI are
+ # the even-numbered fp regs $f20,$f22,...$f30
+ l.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
+ l.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
+ l.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
+ l.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
+ l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
+ l.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
+#endif
+ bne a1, zero, 1f
+ li a1, 1 # never return 0!
+1:
+ move v0, a1
+ j ra
+
+_longjmp_botch:
+ jal longjmperror
+ jal abort
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+END(_longjmp)
+
+/*
+ * trampolines for sigsetjmp and siglongjmp save and restore mask.
+ *
+ */
+FRAMESZ= MKFSIZ(1,1)
+GPOFF= FRAMESZ-2*REGSZ
+
+LEAF(sigsetjmp, FRAMESZ)
+ PTR_SUBU sp, FRAMESZ
+ SETUP_GP64(GPOFF, sigsetjmp)
+ .set reorder
+ sw a1, _JBLEN*REGSZ(a0) # save "savemask"
+ bne a1, 0x0, 1f # do saving of signal mask?
+ LA t9, _setjmp
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+ jr t9
+
+1: LA t9, setjmp
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+ jr t9
+END(sigsetjmp)
+
+LEAF(siglongjmp, FRAMESZ)
+ PTR_SUBU sp, FRAMESZ
+ SETUP_GP64(GPOFF, siglongjmp)
+ .set reorder
+ lw t0, _JBLEN*REGSZ(a0) # get "savemask"
+ bne t0, 0x0, 1f # restore signal mask?
+ LA t9, _longjmp
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+ jr t9
+1:
+ LA t9, longjmp
+ RESTORE_GP64
+ PTR_ADDU sp, FRAMESZ
+ jr t9
+END(siglongjmp)
diff --git a/libc/arch-mips/bionic/sigsetjmp.S b/libc/arch-mips/bionic/sigsetjmp.S
deleted file mode 100644
index 3ef0a6f..0000000
--- a/libc/arch-mips/bionic/sigsetjmp.S
+++ /dev/null
@@ -1,76 +0,0 @@
-/* $OpenBSD: sigsetjmp.S,v 1.5 2005/08/07 16:40:15 espie Exp $ */
-/*-
- * Copyright (c) 1991, 1993, 1995,
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Havard Eidnes.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <machine/setjmp.h>
-
-/*
- * trampolines for sigsetjmp and siglongjmp save and restore mask.
- *
- */
-FRAMESZ= MKFSIZ(1,1)
-GPOFF= FRAMESZ-2*REGSZ
-
-LEAF(sigsetjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, sigsetjmp)
- .set reorder
- sw a1, _JBLEN*REGSZ(a0) # save "savemask"
- bne a1, 0x0, 1f # do saving of signal mask?
- LA t9, _setjmp
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- jr t9
-
-1: LA t9, setjmp
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- jr t9
-END(sigsetjmp)
-
-LEAF(siglongjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, siglongjmp)
- .set reorder
- lw t0, _JBLEN*REGSZ(a0) # get "savemask"
- bne t0, 0x0, 1f # restore signal mask?
- LA t9, _longjmp
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- jr t9
-1:
- LA t9, longjmp
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- jr t9
-END(siglongjmp)
diff --git a/libc/arch-mips/include/machine/endian.h b/libc/arch-mips/include/machine/endian.h
deleted file mode 100644
index 9270e9d..0000000
--- a/libc/arch-mips/include/machine/endian.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/* $OpenBSD: endian.h,v 1.5 2006/02/27 23:35:59 miod Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_ENDIAN_H_
-#define _MIPS64_ENDIAN_H_
-
-#ifdef __GNUC__
-
-#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
-#define __swap16md(x) ({ \
- register uint16_t _x = (x); \
- register uint16_t _r; \
- __asm volatile ("wsbh %0, %1" : "=r" (_r) : "r" (_x)); \
- _r; \
-})
-
-#define __swap32md(x) ({ \
- register uint32_t _x = (x); \
- register uint32_t _r; \
- __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
- _r; \
-})
-
-#define __swap64md(x) ({ \
- uint64_t _swap64md_x = (x); \
- (uint64_t) __swap32md(_swap64md_x >> 32) | \
- (uint64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \
-})
-
-/* Tell sys/endian.h we have MD variants of the swap macros. */
-#define MD_SWAP
-
-#endif /* __mips32r2__ */
-#endif /* __GNUC__ */
-
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#define __STRICT_ALIGNMENT
-#include <sys/types.h>
-#include <sys/endian.h>
-
-#endif /* _MIPS64_ENDIAN_H_ */
diff --git a/libc/arch-mips/include/machine/signal.h b/libc/arch-mips/include/machine/signal.h
deleted file mode 100644
index b9c1367..0000000
--- a/libc/arch-mips/include/machine/signal.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/* $OpenBSD: signal.h,v 1.8 2006/01/09 18:18:37 millert Exp $ */
-
-/*
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)signal.h 8.1 (Berkeley) 6/10/93
- */
-
-#ifndef _MIPS_SIGNAL_H_
-#define _MIPS_SIGNAL_H_
-
-/* On Mips32, jmpbuf begins with optional 4-byte filler so that
- * all saved FP regs are aligned on 8-byte boundary, despite this whole
- * struct being mis-declared to users as an array of (4-byte) longs.
- * All the following offsets are then from the rounded-up base addr
- */
-
-/* Fields of same size on all MIPS abis: */
-#define SC_MAGIC (0*4) /* 4 bytes, identify jmpbuf */
-#define SC_MASK (1*4) /* 4 bytes, saved signal mask */
-#define SC_FPSR (2*4) /* 4 bytes, floating point control/status reg */
-/* filler2 (3*4) 4 bytes, pad to 8-byte boundary */
-
-/* Registers that are 4-byte on mips32 o32, and 8-byte on mips64 n64 abi */
-#define SC_REGS_SAVED 12 /* ra,gp,sp,s0-s8 */
-#define SC_REGS (4*4) /* SC_REGS_SAVED*REGSZ bytes */
-
-/* Floating pt registers are 8-bytes on all abis,
- * but the number of saved fp regs varies for o32/n32 versus n64 abis:
- */
-
-#ifdef __LP64__
-#define SC_FPREGS_SAVED 8 /* all fp regs f24,f25,f26,f27,f28,f29,f30,f31 */
-#else
-#define SC_FPREGS_SAVED 6 /* even fp regs f20,f22,f24,f26,f28,f30 */
-#endif
-
-#define SC_FPREGS (SC_REGS + SC_REGS_SAVED*REGSZ) /* SC_FPREGS_SAVED*REGSZ_FP bytes */
-
-#define SC_BYTES (SC_FPREGS + SC_FPREGS_SAVED*REGSZ_FP)
-#define SC_LONGS (SC_BYTES/REGSZ)
-
-#ifdef __LP64__
-/* SC_LONGS is 22, so _JBLEN should be 22 or larger */
-#else
-/* SC_LONGS is 28, but must also allocate dynamic-roundup filler.
- so _JBLEN should be 29 or larger */
-#endif
-
-#endif /* !_MIPS_SIGNAL_H_ */
diff --git a/libc/arch-mips/mips.mk b/libc/arch-mips/mips.mk
index ac75a4b..d558baa 100644
--- a/libc/arch-mips/mips.mk
+++ b/libc/arch-mips/mips.mk
@@ -67,9 +67,7 @@
arch-mips/bionic/bzero.S \
arch-mips/bionic/cacheflush.cpp \
arch-mips/bionic/_exit_with_stack_teardown.S \
- arch-mips/bionic/_setjmp.S \
arch-mips/bionic/setjmp.S \
- arch-mips/bionic/sigsetjmp.S \
arch-mips/bionic/syscall.S \
arch-mips/bionic/vfork.S \
diff --git a/libc/arch-mips64/bionic/_setjmp.S b/libc/arch-mips64/bionic/_setjmp.S
deleted file mode 100644
index 052dacb..0000000
--- a/libc/arch-mips64/bionic/_setjmp.S
+++ /dev/null
@@ -1,172 +0,0 @@
-/* $OpenBSD: _setjmp.S,v 1.4 2005/08/07 16:40:15 espie Exp $ */
-
-/*
- * Copyright (c) 2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of Opsycon AB nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <private/bionic_asm.h>
-#include <machine/signal.h>
-
-/*
- * _setjmp, _longjmp (not restoring signal state)
- *
- * GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
- *
- */
-
-FRAMESZ= MKFSIZ(0,4)
-GPOFF= FRAMESZ-2*REGSZ
-
-LEAF(_setjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, _setjmp)
- SAVE_GP(GPOFF)
- .set reorder
-
-#ifndef __LP64__
- addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
- li t0, ~7
- and a0, t0
-#endif
-
- # SC_MASK is unused here
-
- li v0, 0xACEDBADE # sigcontext magic number
- sw v0, SC_MAGIC(a0)
- # callee-saved long-sized regs:
- REG_S ra, SC_REGS+0*REGSZ(a0)
- REG_S s0, SC_REGS+1*REGSZ(a0)
- REG_S s1, SC_REGS+2*REGSZ(a0)
- REG_S s2, SC_REGS+3*REGSZ(a0)
- REG_S s3, SC_REGS+4*REGSZ(a0)
- REG_S s4, SC_REGS+5*REGSZ(a0)
- REG_S s5, SC_REGS+6*REGSZ(a0)
- REG_S s6, SC_REGS+7*REGSZ(a0)
- REG_S s7, SC_REGS+8*REGSZ(a0)
- REG_S s8, SC_REGS+9*REGSZ(a0)
- REG_L v0, GPOFF(sp)
- REG_S v0, SC_REGS+10*REGSZ(a0)
- PTR_ADDU v0, sp, FRAMESZ
- REG_S v0, SC_REGS+11*REGSZ(a0)
-
- cfc1 v0, $31
-
-#ifdef __LP64__
- # callee-saved fp regs on mips n64 ABI are $f24..$f31
- s.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
- s.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
- s.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
- s.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
- s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
- s.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
- s.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
- s.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
-#else
- # callee-saved fp regs on mips o32 ABI are
- # the even-numbered fp regs $f20,$f22,...$f30
- s.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
- s.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
- s.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
- s.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
- s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
- s.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
-#endif
- sw v0, SC_FPSR(a0)
- move v0, zero
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- j ra
-END(_setjmp)
-
-
-LEAF(_longjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, _longjmp)
- SAVE_GP(GPOFF)
- .set reorder
-
-#ifndef __LP64__
- addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
- li t0, ~7
- and a0, t0
-#endif
-
- # SC_MASK is unused here
-
- lw v0, SC_MAGIC(a0)
- li t0, 0xACEDBADE
- bne v0, t0, botch # jump if error
-
- # callee-saved long-sized regs:
- REG_L ra, SC_REGS+0*REGSZ(a0)
- REG_L s0, SC_REGS+1*REGSZ(a0)
- REG_L s1, SC_REGS+2*REGSZ(a0)
- REG_L s2, SC_REGS+3*REGSZ(a0)
- REG_L s3, SC_REGS+4*REGSZ(a0)
- REG_L s4, SC_REGS+5*REGSZ(a0)
- REG_L s5, SC_REGS+6*REGSZ(a0)
- REG_L s6, SC_REGS+7*REGSZ(a0)
- REG_L s7, SC_REGS+8*REGSZ(a0)
- REG_L s8, SC_REGS+9*REGSZ(a0)
- REG_L gp, SC_REGS+10*REGSZ(a0)
- REG_L sp, SC_REGS+11*REGSZ(a0)
-
- lw v0, SC_FPSR(a0)
- ctc1 v0, $31
-#ifdef __LP64__
- # callee-saved fp regs on mips n64 ABI are $f24..$f31
- l.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
- l.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
- l.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
- l.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
- l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
- l.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
- l.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
- l.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
-#else
- # callee-saved fp regs on mips o32 ABI are
- # the even-numbered fp regs $f20,$f22,...$f30
- l.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
- l.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
- l.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
- l.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
- l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
- l.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
-#endif
- bne a1, zero, 1f
- li a1, 1 # never return 0!
-1:
- move v0, a1
- j ra
-
-botch:
- jal longjmperror
- jal abort
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
-END(_longjmp)
diff --git a/libc/arch-mips64/bionic/setjmp.S b/libc/arch-mips64/bionic/setjmp.S
deleted file mode 100644
index a1d4695..0000000
--- a/libc/arch-mips64/bionic/setjmp.S
+++ /dev/null
@@ -1,189 +0,0 @@
-/* $OpenBSD: setjmp.S,v 1.5 2005/08/07 16:40:15 espie Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of Opsycon AB nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#include <private/bionic_asm.h>
-#include <machine/signal.h>
-
-/*
- * _setjmp, _longjmp (restoring signal state)
- *
- * GPOFF and FRAMESIZE must be the same for both _setjmp and _longjmp!
- *
- */
-
-FRAMESZ= MKFSIZ(2,6)
-A1OFF= FRAMESZ-4*REGSZ
-A0OFF= FRAMESZ-3*REGSZ
-GPOFF= FRAMESZ-2*REGSZ
-RAOFF= FRAMESZ-1*REGSZ
-
-NON_LEAF(setjmp, FRAMESZ, ra)
- .mask 0x80000000, RAOFF
- PTR_SUBU sp, FRAMESZ # allocate stack frame
- SETUP_GP64(GPOFF, setjmp)
- SAVE_GP(GPOFF)
- .set reorder
-
-#ifndef __LP64__
- addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
- li t0, ~7
- and a0, t0
-#endif
-
- REG_S ra, RAOFF(sp) # save state
- REG_S a0, A0OFF(sp)
- move a0, zero # get current signal mask
- jal sigblock
- REG_L a0, A0OFF(sp)
- REG_L ra, RAOFF(sp)
-
- REG_S v0, SC_MASK(a0) # save sc_mask = sigblock(0)
-
- li v0, 0xACEDBADE # sigcontext magic number
- sw v0, SC_MAGIC(a0)
- # callee-saved long-sized regs:
- REG_S ra, SC_REGS+0*REGSZ(a0)
- REG_S s0, SC_REGS+1*REGSZ(a0)
- REG_S s1, SC_REGS+2*REGSZ(a0)
- REG_S s2, SC_REGS+3*REGSZ(a0)
- REG_S s3, SC_REGS+4*REGSZ(a0)
- REG_S s4, SC_REGS+5*REGSZ(a0)
- REG_S s5, SC_REGS+6*REGSZ(a0)
- REG_S s6, SC_REGS+7*REGSZ(a0)
- REG_S s7, SC_REGS+8*REGSZ(a0)
- REG_S s8, SC_REGS+9*REGSZ(a0)
- REG_L v0, GPOFF(sp)
- REG_S v0, SC_REGS+10*REGSZ(a0)
- PTR_ADDU v0, sp, FRAMESZ
- REG_S v0, SC_REGS+11*REGSZ(a0)
-
- cfc1 v0, $31
-
-#ifdef __LP64__
- # callee-saved fp regs on mips n64 ABI are $f24..$f31
- s.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
- s.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
- s.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
- s.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
- s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
- s.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
- s.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
- s.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
-#else
- # callee-saved fp regs on mips o32 ABI are
- # the even-numbered fp regs $f20,$f22,...$f30
- s.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
- s.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
- s.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
- s.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
- s.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
- s.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
-#endif
- sw v0, SC_FPSR(a0)
- move v0, zero
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- j ra
-END(setjmp)
-
-
-NON_LEAF(longjmp, FRAMESZ, ra)
- .mask 0x80000000, RAOFF
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, longjmp)
- SAVE_GP(GPOFF)
- .set reorder
-
-#ifndef __LP64__
- addiu a0, 7 # roundup jmpbuf addr to 8-byte boundary
- li t0, ~7
- and a0, t0
-#endif
-
- REG_S a1, A1OFF(sp)
- REG_S a0, A0OFF(sp)
- lw a0, SC_MASK(a0)
- jal sigsetmask
- REG_L a0, A0OFF(sp)
- REG_L a1, A1OFF(sp)
-
- lw v0, SC_MAGIC(a0)
- li t0, 0xACEDBADE
- bne v0, t0, botch # jump if error
-
- # callee-saved long-sized regs:
- REG_L ra, SC_REGS+0*REGSZ(a0)
- REG_L s0, SC_REGS+1*REGSZ(a0)
- REG_L s1, SC_REGS+2*REGSZ(a0)
- REG_L s2, SC_REGS+3*REGSZ(a0)
- REG_L s3, SC_REGS+4*REGSZ(a0)
- REG_L s4, SC_REGS+5*REGSZ(a0)
- REG_L s5, SC_REGS+6*REGSZ(a0)
- REG_L s6, SC_REGS+7*REGSZ(a0)
- REG_L s7, SC_REGS+8*REGSZ(a0)
- REG_L s8, SC_REGS+9*REGSZ(a0)
- REG_L gp, SC_REGS+10*REGSZ(a0)
- REG_L sp, SC_REGS+11*REGSZ(a0)
-
- lw v0, SC_FPSR(a0)
- ctc1 v0, $31
-#ifdef __LP64__
- # callee-saved fp regs on mips n64 ABI are $f24..$f31
- l.d $f24, SC_FPREGS+0*REGSZ_FP(a0)
- l.d $f25, SC_FPREGS+1*REGSZ_FP(a0)
- l.d $f26, SC_FPREGS+2*REGSZ_FP(a0)
- l.d $f27, SC_FPREGS+3*REGSZ_FP(a0)
- l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
- l.d $f29, SC_FPREGS+5*REGSZ_FP(a0)
- l.d $f30, SC_FPREGS+6*REGSZ_FP(a0)
- l.d $f31, SC_FPREGS+7*REGSZ_FP(a0)
-#else
- # callee-saved fp regs on mips o32 ABI are
- # the even-numbered fp regs $f20,$f22,...$f30
- l.d $f20, SC_FPREGS+0*REGSZ_FP(a0)
- l.d $f22, SC_FPREGS+1*REGSZ_FP(a0)
- l.d $f24, SC_FPREGS+2*REGSZ_FP(a0)
- l.d $f26, SC_FPREGS+3*REGSZ_FP(a0)
- l.d $f28, SC_FPREGS+4*REGSZ_FP(a0)
- l.d $f30, SC_FPREGS+5*REGSZ_FP(a0)
-#endif
- bne a1, zero, 1f
- li a1, 1 # never return 0!
-1:
- move v0, a1
- j ra
-
-botch:
- jal longjmperror
- jal abort
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
-END(longjmp)
diff --git a/libc/arch-mips64/bionic/setjmp.S b/libc/arch-mips64/bionic/setjmp.S
new file mode 120000
index 0000000..b117bb6
--- /dev/null
+++ b/libc/arch-mips64/bionic/setjmp.S
@@ -0,0 +1 @@
+../../arch-mips/bionic/setjmp.S
\ No newline at end of file
diff --git a/libc/arch-mips64/bionic/sigsetjmp.S b/libc/arch-mips64/bionic/sigsetjmp.S
deleted file mode 100644
index 3ef0a6f..0000000
--- a/libc/arch-mips64/bionic/sigsetjmp.S
+++ /dev/null
@@ -1,76 +0,0 @@
-/* $OpenBSD: sigsetjmp.S,v 1.5 2005/08/07 16:40:15 espie Exp $ */
-/*-
- * Copyright (c) 1991, 1993, 1995,
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Havard Eidnes.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <machine/setjmp.h>
-
-/*
- * trampolines for sigsetjmp and siglongjmp save and restore mask.
- *
- */
-FRAMESZ= MKFSIZ(1,1)
-GPOFF= FRAMESZ-2*REGSZ
-
-LEAF(sigsetjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, sigsetjmp)
- .set reorder
- sw a1, _JBLEN*REGSZ(a0) # save "savemask"
- bne a1, 0x0, 1f # do saving of signal mask?
- LA t9, _setjmp
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- jr t9
-
-1: LA t9, setjmp
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- jr t9
-END(sigsetjmp)
-
-LEAF(siglongjmp, FRAMESZ)
- PTR_SUBU sp, FRAMESZ
- SETUP_GP64(GPOFF, siglongjmp)
- .set reorder
- lw t0, _JBLEN*REGSZ(a0) # get "savemask"
- bne t0, 0x0, 1f # restore signal mask?
- LA t9, _longjmp
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- jr t9
-1:
- LA t9, longjmp
- RESTORE_GP64
- PTR_ADDU sp, FRAMESZ
- jr t9
-END(siglongjmp)
diff --git a/libc/arch-mips64/include/machine b/libc/arch-mips64/include/machine
new file mode 120000
index 0000000..36466ee
--- /dev/null
+++ b/libc/arch-mips64/include/machine
@@ -0,0 +1 @@
+../../arch-mips/include/machine
\ No newline at end of file
diff --git a/libc/arch-mips64/include/machine/asm.h b/libc/arch-mips64/include/machine/asm.h
deleted file mode 100644
index cdc7914..0000000
--- a/libc/arch-mips64/include/machine/asm.h
+++ /dev/null
@@ -1,206 +0,0 @@
-/* $OpenBSD: asm.h,v 1.7 2004/10/20 12:49:15 pefo Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-#ifndef _MIPS64_ASM_H
-#define _MIPS64_ASM_H
-
-#define __bionic_asm_align 4
-
-#undef __bionic_asm_custom_entry
-#undef __bionic_asm_custom_end
-#define __bionic_asm_custom_entry(f) .ent f
-#define __bionic_asm_custom_end(f) .end f
-
-#include <machine/regdef.h>
-
-#define _MIPS_ISA_MIPS1 1 /* R2000/R3000 */
-#define _MIPS_ISA_MIPS2 2 /* R4000/R6000 */
-#define _MIPS_ISA_MIPS3 3 /* R4000 */
-#define _MIPS_ISA_MIPS4 4 /* TFP (R1x000) */
-#define _MIPS_ISA_MIPS5 5
-#define _MIPS_ISA_MIPS32 6
-#define _MIPS_ISA_MIPS64 7
-
-#if !defined(ABICALLS) && !defined(_NO_ABICALLS)
-#define ABICALLS .abicalls
-#endif
-
-#if defined(ABICALLS) && !defined(_KERNEL)
- ABICALLS
-#endif
-
-#if !defined(__MIPSEL__) && !defined(__MIPSEB__)
-#error "__MIPSEL__ or __MIPSEB__ must be defined"
-#endif
-/*
- * Define how to access unaligned data word
- */
-#if defined(__MIPSEL__)
-#define LWLO lwl
-#define LWHI lwr
-#define SWLO swl
-#define SWHI swr
-#define LDLO ldl
-#define LDHI ldr
-#define SDLO sdl
-#define SDHI sdr
-#endif
-#if defined(__MIPSEB__)
-#define LWLO lwr
-#define LWHI lwl
-#define SWLO swr
-#define SWHI swl
-#define LDLO ldr
-#define LDHI ldl
-#define SDLO sdr
-#define SDHI sdl
-#endif
-
-/*
- * Define programming environment for ABI.
- */
-#if defined(ABICALLS) && !defined(_KERNEL) && !defined(_STANDALONE)
-
-#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
-#define NARGSAVE 4
-
-#define SETUP_GP \
- .set noreorder; \
- .cpload t9; \
- .set reorder;
-
-#define SAVE_GP(x) \
- .cprestore x
-
-#define SETUP_GP64(gpoff, name)
-#define RESTORE_GP64
-#endif
-
-#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32)
-#define NARGSAVE 0
-
-#define SETUP_GP
-#define SAVE_GP(x)
-#define SETUP_GP64(gpoff, name) \
- .cpsetup t9, gpoff, name
-#define RESTORE_GP64 \
- .cpreturn
-#endif
-
-#define MKFSIZ(narg,locals) (((narg+locals)*REGSZ+31)&(~31))
-
-#else /* defined(ABICALLS) && !defined(_KERNEL) */
-
-#define NARGSAVE 4
-#define SETUP_GP
-#define SAVE_GP(x)
-
-#define ALIGNSZ 16 /* Stack layout alignment */
-#define FRAMESZ(sz) (((sz) + (ALIGNSZ-1)) & ~(ALIGNSZ-1))
-
-#endif
-
-/*
- * Basic register operations based on selected ISA
- */
-#if (_MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || _MIPS_ISA == _MIPS_ISA_MIPS32)
-#define REGSZ 4 /* 32 bit mode register size */
-#define LOGREGSZ 2 /* log rsize */
-#define REG_S sw
-#define REG_L lw
-#define CF_SZ 24 /* Call frame size */
-#define CF_ARGSZ 16 /* Call frame arg size */
-#define CF_RA_OFFS 20 /* Call ra save offset */
-#endif
-
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS64)
-#define REGSZ 8 /* 64 bit mode register size */
-#define LOGREGSZ 3 /* log rsize */
-#define REG_S sd
-#define REG_L ld
-#define CF_SZ 48 /* Call frame size (multiple of ALIGNSZ) */
-#define CF_ARGSZ 32 /* Call frame arg size */
-#define CF_RA_OFFS 40 /* Call ra save offset */
-#endif
-
-#define REGSZ_FP 8 /* 64 bit FP register size */
-
-#ifndef __LP64__
-#define PTR_L lw
-#define PTR_S sw
-#define PTR_SUB sub
-#define PTR_ADD add
-#define PTR_SUBU subu
-#define PTR_ADDU addu
-#define LI li
-#define LA la
-#define PTR_SLL sll
-#define PTR_SRL srl
-#define PTR_VAL .word
-#else
-#define PTR_L ld
-#define PTR_S sd
-#define PTR_ADD dadd
-#define PTR_SUB dsub
-#define PTR_SUBU dsubu
-#define PTR_ADDU daddu
-#define LI dli
-#define LA dla
-#define PTR_SLL dsll
-#define PTR_SRL dsrl
-#define PTR_VAL .dword
-#endif
-
-/*
- * LEAF(x, fsize)
- *
- * Declare a leaf routine.
- */
-#define LEAF(x, fsize) \
- .align 3; \
- .globl x; \
- .ent x, 0; \
-x: ; \
- .cfi_startproc; \
- .frame sp, fsize, ra; \
- SETUP_GP \
-
-/*
- * NON_LEAF(x)
- *
- * Declare a non-leaf routine (a routine that makes other C calls).
- */
-#define NON_LEAF(x, fsize, retpc) \
- .align 3; \
- .globl x; \
- .ent x, 0; \
-x: ; \
- .cfi_startproc; \
- .frame sp, fsize, retpc; \
- SETUP_GP \
-
-#endif /* !_MIPS_ASM_H */
diff --git a/libc/arch-mips64/include/machine/elf_machdep.h b/libc/arch-mips64/include/machine/elf_machdep.h
deleted file mode 100644
index d27d431..0000000
--- a/libc/arch-mips64/include/machine/elf_machdep.h
+++ /dev/null
@@ -1,196 +0,0 @@
-/* $NetBSD: elf_machdep.h,v 1.15 2011/03/15 07:39:22 matt Exp $ */
-
-#ifndef _MIPS_ELF_MACHDEP_H_
-#define _MIPS_ELF_MACHDEP_H_
-
-#ifdef _LP64
-#define ARCH_ELFSIZE 64 /* MD native binary size */
-#else
-#define ARCH_ELFSIZE 32 /* MD native binary size */
-#endif
-
-#if ELFSIZE == 32
-#define ELF32_MACHDEP_ID_CASES \
- case EM_MIPS: \
- break;
-
-#define ELF32_MACHDEP_ID EM_MIPS
-#elif ELFSIZE == 64
-#define ELF64_MACHDEP_ID_CASES \
- case EM_MIPS: \
- break;
-
-#define ELF64_MACHDEP_ID EM_MIPS
-#endif
-
-/* mips relocs. */
-
-#define R_MIPS_NONE 0
-#define R_MIPS_16 1
-#define R_MIPS_32 2
-#define R_MIPS_REL32 3
-#define R_MIPS_REL R_MIPS_REL32
-#define R_MIPS_26 4
-#define R_MIPS_HI16 5 /* high 16 bits of symbol value */
-#define R_MIPS_LO16 6 /* low 16 bits of symbol value */
-#define R_MIPS_GPREL16 7 /* GP-relative reference */
-#define R_MIPS_LITERAL 8 /* Reference to literal section */
-#define R_MIPS_GOT16 9 /* Reference to global offset table */
-#define R_MIPS_GOT R_MIPS_GOT16
-#define R_MIPS_PC16 10 /* 16 bit PC relative reference */
-#define R_MIPS_CALL16 11 /* 16 bit call thru glbl offset tbl */
-#define R_MIPS_CALL R_MIPS_CALL16
-#define R_MIPS_GPREL32 12
-
-/* 13, 14, 15 are not defined at this point. */
-#define R_MIPS_UNUSED1 13
-#define R_MIPS_UNUSED2 14
-#define R_MIPS_UNUSED3 15
-
-/*
- * The remaining relocs are apparently part of the 64-bit Irix ELF ABI.
- */
-#define R_MIPS_SHIFT5 16
-#define R_MIPS_SHIFT6 17
-
-#define R_MIPS_64 18
-#define R_MIPS_GOT_DISP 19
-#define R_MIPS_GOT_PAGE 20
-#define R_MIPS_GOT_OFST 21
-#define R_MIPS_GOT_HI16 22
-#define R_MIPS_GOT_LO16 23
-#define R_MIPS_SUB 24
-#define R_MIPS_INSERT_A 25
-#define R_MIPS_INSERT_B 26
-#define R_MIPS_DELETE 27
-#define R_MIPS_HIGHER 28
-#define R_MIPS_HIGHEST 29
-#define R_MIPS_CALL_HI16 30
-#define R_MIPS_CALL_LO16 31
-#define R_MIPS_SCN_DISP 32
-#define R_MIPS_REL16 33
-#define R_MIPS_ADD_IMMEDIATE 34
-#define R_MIPS_PJUMP 35
-#define R_MIPS_RELGOT 36
-#define R_MIPS_JALR 37
-/* TLS relocations */
-
-#define R_MIPS_TLS_DTPMOD32 38 /* Module number 32 bit */
-#define R_MIPS_TLS_DTPREL32 39 /* Module-relative offset 32 bit */
-#define R_MIPS_TLS_DTPMOD64 40 /* Module number 64 bit */
-#define R_MIPS_TLS_DTPREL64 41 /* Module-relative offset 64 bit */
-#define R_MIPS_TLS_GD 42 /* 16 bit GOT offset for GD */
-#define R_MIPS_TLS_LDM 43 /* 16 bit GOT offset for LDM */
-#define R_MIPS_TLS_DTPREL_HI16 44 /* Module-relative offset, high 16 bits */
-#define R_MIPS_TLS_DTPREL_LO16 45 /* Module-relative offset, low 16 bits */
-#define R_MIPS_TLS_GOTTPREL 46 /* 16 bit GOT offset for IE */
-#define R_MIPS_TLS_TPREL32 47 /* TP-relative offset, 32 bit */
-#define R_MIPS_TLS_TPREL64 48 /* TP-relative offset, 64 bit */
-#define R_MIPS_TLS_TPREL_HI16 49 /* TP-relative offset, high 16 bits */
-#define R_MIPS_TLS_TPREL_LO16 50 /* TP-relative offset, low 16 bits */
-
-#define R_MIPS_max 51
-
-#define R_TYPE(name) __CONCAT(R_MIPS_,name)
-
-#define R_MIPS16_min 100
-#define R_MIPS16_26 100
-#define R_MIPS16_GPREL 101
-#define R_MIPS16_GOT16 102
-#define R_MIPS16_CALL16 103
-#define R_MIPS16_HI16 104
-#define R_MIPS16_LO16 105
-#define R_MIPS16_max 106
-
-
-/* mips dynamic tags */
-
-#define DT_MIPS_RLD_VERSION 0x70000001
-#define DT_MIPS_TIME_STAMP 0x70000002
-#define DT_MIPS_ICHECKSUM 0x70000003
-#define DT_MIPS_IVERSION 0x70000004
-#define DT_MIPS_FLAGS 0x70000005
-#define DT_MIPS_BASE_ADDRESS 0x70000006
-#define DT_MIPS_CONFLICT 0x70000008
-#define DT_MIPS_LIBLIST 0x70000009
-#define DT_MIPS_CONFLICTNO 0x7000000b
-#define DT_MIPS_LOCAL_GOTNO 0x7000000a /* number of local got ents */
-#define DT_MIPS_LIBLISTNO 0x70000010
-#define DT_MIPS_SYMTABNO 0x70000011 /* number of .dynsym entries */
-#define DT_MIPS_UNREFEXTNO 0x70000012
-#define DT_MIPS_GOTSYM 0x70000013 /* first dynamic sym in got */
-#define DT_MIPS_HIPAGENO 0x70000014
-#define DT_MIPS_RLD_MAP 0x70000016 /* address of loader map */
-
-/*
- * ELF Flags
- */
-#define EF_MIPS_PIC 0x00000002 /* Contains PIC code */
-#define EF_MIPS_CPIC 0x00000004 /* STD PIC calling sequence */
-#define EF_MIPS_ABI2 0x00000020 /* N32 */
-
-#define EF_MIPS_ARCH_ASE 0x0f000000 /* Architectural extensions */
-#define EF_MIPS_ARCH_MDMX 0x08000000 /* MDMX multimedia extension */
-#define EF_MIPS_ARCH_M16 0x04000000 /* MIPS-16 ISA extensions */
-
-#define EF_MIPS_ARCH 0xf0000000 /* Architecture field */
-#define EF_MIPS_ARCH_1 0x00000000 /* -mips1 code */
-#define EF_MIPS_ARCH_2 0x10000000 /* -mips2 code */
-#define EF_MIPS_ARCH_3 0x20000000 /* -mips3 code */
-#define EF_MIPS_ARCH_4 0x30000000 /* -mips4 code */
-#define EF_MIPS_ARCH_5 0x40000000 /* -mips5 code */
-#define EF_MIPS_ARCH_32 0x50000000 /* -mips32 code */
-#define EF_MIPS_ARCH_64 0x60000000 /* -mips64 code */
-#define EF_MIPS_ARCH_32R2 0x70000000 /* -mips32r2 code */
-#define EF_MIPS_ARCH_64R2 0x80000000 /* -mips64r2 code */
-
-#define EF_MIPS_ABI 0x0000f000
-#define EF_MIPS_ABI_O32 0x00001000
-#define EF_MIPS_ABI_O64 0x00002000
-#define EF_MIPS_ABI_EABI32 0x00003000
-#define EF_MIPS_ABI_EABI64 0x00004000
-
-#if defined(__MIPSEB__)
-#define ELF32_MACHDEP_ENDIANNESS ELFDATA2MSB
-#define ELF64_MACHDEP_ENDIANNESS ELFDATA2MSB
-#elif defined(__MIPSEL__)
-#define ELF32_MACHDEP_ENDIANNESS ELFDATA2LSB
-#define ELF64_MACHDEP_ENDIANNESS ELFDATA2LSB
-#elif !defined(HAVE_NBTOOL_CONFIG_H)
-#error neither __MIPSEL__ nor __MIPSEB__ are defined.
-#endif
-
-#ifdef _KERNEL
-#ifdef _KERNEL_OPT
-#include "opt_compat_netbsd.h"
-#endif
-#ifdef COMPAT_16
-/*
- * Up to 1.6, the ELF dynamic loader (ld.elf_so) was not relocatable.
- * Tell the kernel ELF exec code not to try relocating the interpreter
- * for dynamically-linked ELF binaries.
- */
-#define ELF_INTERP_NON_RELOCATABLE
-#endif /* COMPAT_16 */
-
-/*
- * We need to be able to include the ELF header so we can pick out the
- * ABI being used.
- */
-#ifdef ELFSIZE
-#define ELF_MD_PROBE_FUNC ELFNAME2(mips_netbsd,probe)
-#define ELF_MD_COREDUMP_SETUP ELFNAME2(coredump,setup)
-#endif
-
-struct exec_package;
-
-int mips_netbsd_elf32_probe(struct lwp *, struct exec_package *, void *, char *,
- vaddr_t *);
-void coredump_elf32_setup(struct lwp *, void *);
-
-int mips_netbsd_elf64_probe(struct lwp *, struct exec_package *, void *, char *,
- vaddr_t *);
-void coredump_elf64_setup(struct lwp *, void *);
-#endif /* _KERNEL */
-
-#endif /* _MIPS_ELF_MACHDEP_H_ */
diff --git a/libc/arch-mips64/include/machine/endian.h b/libc/arch-mips64/include/machine/endian.h
deleted file mode 100644
index 9270e9d..0000000
--- a/libc/arch-mips64/include/machine/endian.h
+++ /dev/null
@@ -1,66 +0,0 @@
-/* $OpenBSD: endian.h,v 1.5 2006/02/27 23:35:59 miod Exp $ */
-
-/*
- * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-
-#ifndef _MIPS64_ENDIAN_H_
-#define _MIPS64_ENDIAN_H_
-
-#ifdef __GNUC__
-
-#if defined(__mips_isa_rev) && (__mips_isa_rev >= 2)
-#define __swap16md(x) ({ \
- register uint16_t _x = (x); \
- register uint16_t _r; \
- __asm volatile ("wsbh %0, %1" : "=r" (_r) : "r" (_x)); \
- _r; \
-})
-
-#define __swap32md(x) ({ \
- register uint32_t _x = (x); \
- register uint32_t _r; \
- __asm volatile ("wsbh %0, %1; rotr %0, %0, 16" : "=r" (_r) : "r" (_x)); \
- _r; \
-})
-
-#define __swap64md(x) ({ \
- uint64_t _swap64md_x = (x); \
- (uint64_t) __swap32md(_swap64md_x >> 32) | \
- (uint64_t) __swap32md(_swap64md_x & 0xffffffff) << 32; \
-})
-
-/* Tell sys/endian.h we have MD variants of the swap macros. */
-#define MD_SWAP
-
-#endif /* __mips32r2__ */
-#endif /* __GNUC__ */
-
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#define __STRICT_ALIGNMENT
-#include <sys/types.h>
-#include <sys/endian.h>
-
-#endif /* _MIPS64_ENDIAN_H_ */
diff --git a/libc/arch-mips64/include/machine/regdef.h b/libc/arch-mips64/include/machine/regdef.h
deleted file mode 100644
index 3a7cd68..0000000
--- a/libc/arch-mips64/include/machine/regdef.h
+++ /dev/null
@@ -1,99 +0,0 @@
-/* $OpenBSD: regdef.h,v 1.3 2005/08/07 07:29:44 miod Exp $ */
-
-/*
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell. This file is derived from the MIPS RISC
- * Architecture book by Gerry Kane.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)regdef.h 8.1 (Berkeley) 6/10/93
- */
-#ifndef _MIPS_REGDEF_H_
-#define _MIPS_REGDEF_H_
-
-#if (_MIPS_SIM == _ABI64) && !defined(__mips_n64)
-#define __mips_n64 1
-#endif
-#if (_MIPS_SIM == _ABIN32) && !defined(__mips_n32)
-#define __mips_n32 1
-#endif
-
-#define zero $0 /* always zero */
-#define AT $at /* assembler temp */
-#define v0 $2 /* return value */
-#define v1 $3
-#define a0 $4 /* argument registers */
-#define a1 $5
-#define a2 $6
-#define a3 $7
-#if defined(__mips_n32) || defined(__mips_n64)
-#define a4 $8 /* expanded register arguments */
-#define a5 $9
-#define a6 $10
-#define a7 $11
-#define ta0 $8 /* alias */
-#define ta1 $9
-#define ta2 $10
-#define ta3 $11
-#define t0 $12 /* temp registers (not saved across subroutine calls) */
-#define t1 $13
-#define t2 $14
-#define t3 $15
-#else
-#define t0 $8 /* temp registers (not saved across subroutine calls) */
-#define t1 $9
-#define t2 $10
-#define t3 $11
-#define t4 $12
-#define t5 $13
-#define t6 $14
-#define t7 $15
-#define ta0 $12 /* alias */
-#define ta1 $13
-#define ta2 $14
-#define ta3 $15
-#endif
-#define s0 $16 /* saved across subroutine calls (callee saved) */
-#define s1 $17
-#define s2 $18
-#define s3 $19
-#define s4 $20
-#define s5 $21
-#define s6 $22
-#define s7 $23
-#define t8 $24 /* two more temp registers */
-#define t9 $25
-#define k0 $26 /* kernel temporary */
-#define k1 $27
-#define gp $28 /* global pointer */
-#define sp $29 /* stack pointer */
-#define s8 $30 /* one more callee saved */
-#define ra $31 /* return address */
-
-#endif /* !_MIPS_REGDEF_H_ */
diff --git a/libc/arch-mips64/include/machine/setjmp.h b/libc/arch-mips64/include/machine/setjmp.h
deleted file mode 100644
index a9707dc..0000000
--- a/libc/arch-mips64/include/machine/setjmp.h
+++ /dev/null
@@ -1,14 +0,0 @@
-/* $OpenBSD: setjmp.h,v 1.2 2004/08/10 21:10:56 pefo Exp $ */
-
-/* Public domain */
-
-#ifndef _MIPS_SETJMP_H_
-#define _MIPS_SETJMP_H_
-
-#ifdef __LP64__
-#define _JBLEN 22 /* size, in 8-byte longs, of a mips64 jmp_buf */
-#else
-#define _JBLEN 29 /* size, in 4-byte longs, of a mips32 jmp_buf */
-#endif
-
-#endif /* !_MIPS_SETJMP_H_ */
diff --git a/libc/arch-mips64/include/machine/signal.h b/libc/arch-mips64/include/machine/signal.h
deleted file mode 100644
index b9c1367..0000000
--- a/libc/arch-mips64/include/machine/signal.h
+++ /dev/null
@@ -1,78 +0,0 @@
-/* $OpenBSD: signal.h,v 1.8 2006/01/09 18:18:37 millert Exp $ */
-
-/*
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)signal.h 8.1 (Berkeley) 6/10/93
- */
-
-#ifndef _MIPS_SIGNAL_H_
-#define _MIPS_SIGNAL_H_
-
-/* On Mips32, jmpbuf begins with optional 4-byte filler so that
- * all saved FP regs are aligned on 8-byte boundary, despite this whole
- * struct being mis-declared to users as an array of (4-byte) longs.
- * All the following offsets are then from the rounded-up base addr
- */
-
-/* Fields of same size on all MIPS abis: */
-#define SC_MAGIC (0*4) /* 4 bytes, identify jmpbuf */
-#define SC_MASK (1*4) /* 4 bytes, saved signal mask */
-#define SC_FPSR (2*4) /* 4 bytes, floating point control/status reg */
-/* filler2 (3*4) 4 bytes, pad to 8-byte boundary */
-
-/* Registers that are 4-byte on mips32 o32, and 8-byte on mips64 n64 abi */
-#define SC_REGS_SAVED 12 /* ra,gp,sp,s0-s8 */
-#define SC_REGS (4*4) /* SC_REGS_SAVED*REGSZ bytes */
-
-/* Floating pt registers are 8-bytes on all abis,
- * but the number of saved fp regs varies for o32/n32 versus n64 abis:
- */
-
-#ifdef __LP64__
-#define SC_FPREGS_SAVED 8 /* all fp regs f24,f25,f26,f27,f28,f29,f30,f31 */
-#else
-#define SC_FPREGS_SAVED 6 /* even fp regs f20,f22,f24,f26,f28,f30 */
-#endif
-
-#define SC_FPREGS (SC_REGS + SC_REGS_SAVED*REGSZ) /* SC_FPREGS_SAVED*REGSZ_FP bytes */
-
-#define SC_BYTES (SC_FPREGS + SC_FPREGS_SAVED*REGSZ_FP)
-#define SC_LONGS (SC_BYTES/REGSZ)
-
-#ifdef __LP64__
-/* SC_LONGS is 22, so _JBLEN should be 22 or larger */
-#else
-/* SC_LONGS is 28, but must also allocate dynamic-roundup filler.
- so _JBLEN should be 29 or larger */
-#endif
-
-#endif /* !_MIPS_SIGNAL_H_ */
diff --git a/libc/arch-mips64/mips64.mk b/libc/arch-mips64/mips64.mk
index b962283..6fa7d33 100644
--- a/libc/arch-mips64/mips64.mk
+++ b/libc/arch-mips64/mips64.mk
@@ -49,9 +49,7 @@
libc_bionic_src_files_mips64 += \
arch-mips64/bionic/__bionic_clone.S \
arch-mips64/bionic/_exit_with_stack_teardown.S \
- arch-mips64/bionic/_setjmp.S \
arch-mips64/bionic/setjmp.S \
- arch-mips64/bionic/sigsetjmp.S \
arch-mips64/bionic/syscall.S \
arch-mips64/bionic/vfork.S \
diff --git a/libc/arch-x86/include/machine/endian.h b/libc/arch-x86/include/machine/endian.h
deleted file mode 100644
index 5feebd8..0000000
--- a/libc/arch-x86/include/machine/endian.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* $OpenBSD: endian.h,v 1.17 2011/03/12 04:03:04 guenther Exp $ */
-
-/*-
- * Copyright (c) 1997 Niklas Hallqvist. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _MACHINE_ENDIAN_H_
-#define _MACHINE_ENDIAN_H_
-
-/* Use GCC builtins */
-#define __swap16md(x) __builtin_bswap16(x)
-#define __swap32md(x) __builtin_bswap32(x)
-#define __swap64md(x) __builtin_bswap64(x)
-
-/* Tell sys/endian.h we have MD variants of the swap macros. */
-#define MD_SWAP
-
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#include <sys/types.h>
-#include <sys/endian.h>
-
-#endif /* _MACHINE_ENDIAN_H_ */
diff --git a/libc/arch-x86_64/bionic/setjmp.S b/libc/arch-x86_64/bionic/setjmp.S
index a8f614f..28981fa 100644
--- a/libc/arch-x86_64/bionic/setjmp.S
+++ b/libc/arch-x86_64/bionic/setjmp.S
@@ -48,6 +48,7 @@
#define _JB_PC 7
#define _JB_SIGFLAG 8
#define _JB_SIGMASK 9
+#define _JB_SIGMASK_RT 10 // sigprocmask will write here too.
ENTRY(setjmp)
movl $1,%esi
@@ -62,18 +63,19 @@
// int sigsetjmp(sigjmp_buf env, int save_signal_mask);
ENTRY(sigsetjmp)
// Record whether or not we're saving the signal mask.
- movl %esi,(_JB_SIGFLAG * 8)(%rdi)
+ movl %esi,(_JB_SIGFLAG * 8)(%rdi)
// Do we need to save the signal mask?
testl %esi,%esi
jz 2f
- // Save the signal mask.
- pushq %rdi
- xorq %rdi,%rdi
- call PIC_PLT(sigblock)
- popq %rdi
- movq %rax,(_JB_SIGMASK * 8)(%rdi)
+ // Save current signal mask.
+ pushq %rdi // Push 'env'.
+ // The 'how' argument is ignored if new_mask is NULL.
+ xorq %rsi,%rsi // NULL.
+ leaq (_JB_SIGMASK * 8)(%rdi),%rdx // old_mask.
+ call PIC_PLT(sigprocmask)
+ popq %rdi // Pop 'env'.
2:
// Save the callee-save registers.
@@ -97,12 +99,14 @@
pushq %rsi // Push 'value'.
// Do we need to restore the signal mask?
- cmpl $0, (_JB_SIGFLAG * 8)(%rdi)
+ cmpl $0,(_JB_SIGFLAG * 8)(%rdi)
jz 2f
// Restore the signal mask.
- movq (_JB_SIGMASK * 8)(%rdi),%rdi
- call PIC_PLT(sigsetmask)
+ movq $2,%rdi // SIG_SETMASK.
+ leaq (_JB_SIGMASK * 8)(%r12),%rsi // new_mask.
+ xorq %rdx,%rdx // NULL.
+ call PIC_PLT(sigprocmask)
2:
popq %rax // Pop 'value'.
diff --git a/libc/arch-x86_64/include/machine/endian.h b/libc/arch-x86_64/include/machine/endian.h
deleted file mode 100644
index 2c493b2..0000000
--- a/libc/arch-x86_64/include/machine/endian.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/* $OpenBSD: endian.h,v 1.5 2011/03/12 22:27:48 guenther Exp $ */
-
-/*-
- * Copyright (c) 1997 Niklas Hallqvist. All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
- * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
- * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
- * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
- * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
- * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifndef _MACHINE_ENDIAN_H_
-#define _MACHINE_ENDIAN_H_
-
-/* Use GCC builtins */
-#define __swap16md(x) __builtin_bswap16(x)
-#define __swap32md(x) __builtin_bswap32(x)
-#define __swap64md(x) __builtin_bswap64(x)
-
-/* Tell sys/endian.h we have MD variants of the swap macros. */
-#define MD_SWAP
-
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#include <sys/types.h>
-#include <sys/endian.h>
-
-#endif /* _MACHINE_ENDIAN_H_ */
diff --git a/libc/include/arpa/nameser_compat.h b/libc/include/arpa/nameser_compat.h
index e060f60..539864e 100644
--- a/libc/include/arpa/nameser_compat.h
+++ b/libc/include/arpa/nameser_compat.h
@@ -44,53 +44,6 @@
#include <endian.h>
-#ifndef BYTE_ORDER
-#if (BSD >= 199103)
-# include <machine/endian.h>
-#else
-#ifdef __linux__
-# include <endian.h>
-#else
-#define LITTLE_ENDIAN 1234 /* least-significant byte first (vax, pc) */
-#define BIG_ENDIAN 4321 /* most-significant byte first (IBM, net) */
-#define PDP_ENDIAN 3412 /* LSB first in word, MSW first in long (pdp)*/
-
-#if defined(vax) || defined(ns32000) || defined(sun386) || defined(i386) || \
- defined(MIPSEL) || defined(_MIPSEL) || defined(BIT_ZERO_ON_RIGHT) || \
- defined(__i386__) || defined(__i386) || defined(__amd64__) || \
- defined(__x86_64__) || defined(MIPSEL) || defined(_MIPSEL) || \
- defined(BIT_ZERO_ON_RIGHT) || defined(__alpha__) || defined(__alpha) || \
- (defined(__Lynx__) && defined(__x86__))
-#define BYTE_ORDER LITTLE_ENDIAN
-#endif
-
-#if defined(sel) || defined(pyr) || defined(mc68000) || defined(sparc) || \
- defined(is68k) || defined(tahoe) || defined(ibm032) || defined(ibm370) || \
- defined(MIPSEB) || defined(_MIPSEB) || defined(_IBMR2) || defined(DGUX) ||\
- defined(apollo) || defined(__convex__) || defined(_CRAY) || \
- defined(__hppa) || defined(__hp9000) || \
- defined(__hp9000s300) || defined(__hp9000s700) || \
- defined(__hp3000s900) || defined(__hpux) || defined(MPE) || \
- defined (BIT_ZERO_ON_LEFT) || defined(m68k) || defined(__sparc) || \
- (defined(__Lynx__) && \
- (defined(__68k__) || defined(__sparc__) || defined(__powerpc__)))
-#define BYTE_ORDER BIG_ENDIAN
-#endif
-#endif /* __linux */
-#endif /* BSD */
-#endif /* BYTE_ORDER */
-
-#if !defined(BYTE_ORDER) || \
- (BYTE_ORDER != BIG_ENDIAN && BYTE_ORDER != LITTLE_ENDIAN && \
- BYTE_ORDER != PDP_ENDIAN)
- /* you must determine what the correct bit order is for
- * your compiler - the next line is an intentional error
- * which will force your compiles to bomb until you fix
- * the above macros.
- */
- #error "Undefined or invalid BYTE_ORDER";
-#endif
-
/*
* Structure for query header. The order of the fields is machine- and
* compiler-dependent, depending on the byte/bit order and the layout
diff --git a/libc/arch-arm64/include/machine/endian.h b/libc/include/machine/endian.h
similarity index 74%
rename from libc/arch-arm64/include/machine/endian.h
rename to libc/include/machine/endian.h
index b9544af..ac89519 100644
--- a/libc/arch-arm64/include/machine/endian.h
+++ b/libc/include/machine/endian.h
@@ -1,5 +1,5 @@
/*
- * Copyright (C) 2013 The Android Open Source Project
+ * Copyright (C) 2014 The Android Open Source Project
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -26,23 +26,10 @@
* SUCH DAMAGE.
*/
-#ifndef _AARCH64_ENDIAN_H_
-#define _AARCH64_ENDIAN_H_
+#ifndef _MACHINE_ENDIAN_H_
+#define _MACHINE_ENDIAN_H_
-#ifdef __GNUC__
-
-/* Use GCC builtins */
-#define __swap16md(x) __builtin_bswap16(x)
-#define __swap32md(x) __builtin_bswap32(x)
-#define __swap64md(x) __builtin_bswap64(x)
-
-/* Tell sys/endian.h we have MD variants of the swap macros. */
-#define MD_SWAP
-
-#endif /* __GNUC__ */
-
-#define _BYTE_ORDER _LITTLE_ENDIAN
-#include <sys/types.h>
+/* This file is for BSD source compatibility only. Use <endian.h> or <sys/endian.h> instead. */
#include <sys/endian.h>
-#endif /* _AARCH64_ENDIAN_H_ */
+#endif /* _MACHINE_ENDIAN_H_ */
diff --git a/libc/include/sys/endian.h b/libc/include/sys/endian.h
index be4c905..c62ba7f 100644
--- a/libc/include/sys/endian.h
+++ b/libc/include/sys/endian.h
@@ -1,5 +1,3 @@
-/* $OpenBSD: endian.h,v 1.17 2006/01/06 18:53:05 millert Exp $ */
-
/*-
* Copyright (c) 1997 Niklas Hallqvist. All rights reserved.
*
@@ -24,155 +22,44 @@
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
-/*
- * Generic definitions for little- and big-endian systems. Other endianesses
- * has to be dealt with in the specific machine/endian.h file for that port.
- *
- * This file is meant to be included from a little- or big-endian port's
- * machine/endian.h after setting _BYTE_ORDER to either 1234 for little endian
- * or 4321 for big..
- */
-
#ifndef _SYS_ENDIAN_H_
#define _SYS_ENDIAN_H_
#include <sys/cdefs.h>
-#include <machine/endian.h>
#include <stdint.h>
#define _LITTLE_ENDIAN 1234
#define _BIG_ENDIAN 4321
#define _PDP_ENDIAN 3412
+#define _BYTE_ORDER _LITTLE_ENDIAN
+#define __LITTLE_ENDIAN_BITFIELD
#if __BSD_VISIBLE
-#define LITTLE_ENDIAN _LITTLE_ENDIAN
-#define BIG_ENDIAN _BIG_ENDIAN
-#define PDP_ENDIAN _PDP_ENDIAN
-#define BYTE_ORDER _BYTE_ORDER
+#define LITTLE_ENDIAN _LITTLE_ENDIAN
+#define BIG_ENDIAN _BIG_ENDIAN
+#define PDP_ENDIAN _PDP_ENDIAN
+#define BYTE_ORDER _BYTE_ORDER
#endif
-#ifdef __GNUC__
+#ifndef __LITTLE_ENDIAN
+#define __LITTLE_ENDIAN _LITTLE_ENDIAN
+#endif
+#ifndef __BIG_ENDIAN
+#define __BIG_ENDIAN _BIG_ENDIAN
+#endif
+#define __BYTE_ORDER _BYTE_ORDER
-#define __swap16gen(x) __statement({ \
- __uint16_t __swap16gen_x = (x); \
- \
- (__uint16_t)((__swap16gen_x & 0xff) << 8 | \
- (__swap16gen_x & 0xff00) >> 8); \
-})
-
-#define __swap32gen(x) __statement({ \
- __uint32_t __swap32gen_x = (x); \
- \
- (__uint32_t)((__swap32gen_x & 0xff) << 24 | \
- (__swap32gen_x & 0xff00) << 8 | \
- (__swap32gen_x & 0xff0000) >> 8 | \
- (__swap32gen_x & 0xff000000) >> 24); \
-})
-
-#define __swap64gen(x) __statement({ \
- __uint64_t __swap64gen_x = (x); \
- \
- (__uint64_t)((__swap64gen_x & 0xff) << 56 | \
- (__swap64gen_x & 0xff00ULL) << 40 | \
- (__swap64gen_x & 0xff0000ULL) << 24 | \
- (__swap64gen_x & 0xff000000ULL) << 8 | \
- (__swap64gen_x & 0xff00000000ULL) >> 8 | \
- (__swap64gen_x & 0xff0000000000ULL) >> 24 | \
- (__swap64gen_x & 0xff000000000000ULL) >> 40 | \
- (__swap64gen_x & 0xff00000000000000ULL) >> 56); \
-})
-
-#else /* __GNUC__ */
-
-/* Note that these macros evaluate their arguments several times. */
-#define __swap16gen(x) \
- (__uint16_t)(((__uint16_t)(x) & 0xff) << 8 | ((__uint16_t)(x) & 0xff00) >> 8)
-
-#define __swap32gen(x) \
- (__uint32_t)(((__uint32_t)(x) & 0xff) << 24 | \
- ((__uint32_t)(x) & 0xff00) << 8 | ((__uint32_t)(x) & 0xff0000) >> 8 |\
- ((__uint32_t)(x) & 0xff000000) >> 24)
-
-#define __swap64gen(x) \
- (__uint64_t)((((__uint64_t)(x) & 0xff) << 56) | \
- ((__uint64_t)(x) & 0xff00ULL) << 40 | \
- ((__uint64_t)(x) & 0xff0000ULL) << 24 | \
- ((__uint64_t)(x) & 0xff000000ULL) << 8 | \
- ((__uint64_t)(x) & 0xff00000000ULL) >> 8 | \
- ((__uint64_t)(x) & 0xff0000000000ULL) >> 24 | \
- ((__uint64_t)(x) & 0xff000000000000ULL) >> 40 | \
- ((__uint64_t)(x) & 0xff00000000000000ULL) >> 56)
-
-#endif /* __GNUC__ */
-
-/*
- * Define MD_SWAP if you provide swap{16,32}md functions/macros that are
- * optimized for your architecture, These will be used for swap{16,32}
- * unless the argument is a constant and we are using GCC, where we can
- * take advantage of the CSE phase much better by using the generic version.
- */
-#ifdef MD_SWAP
-#if __GNUC__
-
-#define __swap16(x) __statement({ \
- __uint16_t __swap16_x = (x); \
- \
- __builtin_constant_p(x) ? __swap16gen(__swap16_x) : \
- __swap16md(__swap16_x); \
-})
-
-#define __swap32(x) __statement({ \
- __uint32_t __swap32_x = (x); \
- \
- __builtin_constant_p(x) ? __swap32gen(__swap32_x) : \
- __swap32md(__swap32_x); \
-})
-
-#define __swap64(x) __statement({ \
- __uint64_t __swap64_x = (x); \
- \
- __builtin_constant_p(x) ? __swap64gen(__swap64_x) : \
- __swap64md(__swap64_x); \
-})
-
-#endif /* __GNUC__ */
-
-#else /* MD_SWAP */
-#define __swap16 __swap16gen
-#define __swap32 __swap32gen
-#define __swap64 __swap64gen
-#endif /* MD_SWAP */
-
-#define __swap16_multi(v, n) do { \
- __size_t __swap16_multi_n = (n); \
- __uint16_t *__swap16_multi_v = (v); \
- \
- while (__swap16_multi_n) { \
- *__swap16_multi_v = swap16(*__swap16_multi_v); \
- __swap16_multi_v++; \
- __swap16_multi_n--; \
- } \
-} while (0)
+#define __swap16 __builtin_bswap16
+#define __swap32 __builtin_bswap32
+#define __swap64 __builtin_bswap64
#if __BSD_VISIBLE
#define swap16 __swap16
#define swap32 __swap32
#define swap64 __swap64
#define swap16_multi __swap16_multi
-#endif /* __BSD_VISIBLE */
-#if _BYTE_ORDER == _LITTLE_ENDIAN
-
-/* Can be overridden by machine/endian.h before inclusion of this file. */
-#ifndef _QUAD_HIGHWORD
-#define _QUAD_HIGHWORD 1
-#endif
-#ifndef _QUAD_LOWWORD
-#define _QUAD_LOWWORD 0
-#endif
-
-#if __BSD_VISIBLE
#define htobe16 __swap16
#define htobe32 __swap32
#define htobe64 __swap64
@@ -205,49 +92,6 @@
#define htonq(x) __swap64(x)
#define ntohq(x) __swap64(x)
-#define __LITTLE_ENDIAN_BITFIELD
-
-#endif /* _BYTE_ORDER */
-
-#if _BYTE_ORDER == _BIG_ENDIAN
-
-/* Can be overridden by machine/endian.h before inclusion of this file. */
-#ifndef _QUAD_HIGHWORD
-#define _QUAD_HIGHWORD 0
-#endif
-#ifndef _QUAD_LOWWORD
-#define _QUAD_LOWWORD 1
-#endif
-
-#if __BSD_VISIBLE
-#define htole16 __swap16
-#define htole32 __swap32
-#define htole64 __swap64
-#define letoh16 __swap16
-#define letoh32 __swap32
-#define letoh64 __swap64
-
-#define htobe16(x) (x)
-#define htobe32(x) (x)
-#define htobe64(x) (x)
-#define betoh16(x) (x)
-#define betoh32(x) (x)
-#define betoh64(x) (x)
-#endif /* __BSD_VISIBLE */
-
-#define htons(x) (x)
-#define htonl(x) (x)
-#define ntohs(x) (x)
-#define ntohl(x) (x)
-
-/* Bionic additions */
-#define ntohq(x) (x)
-#define htonq(x) (x)
-
-#define __BIG_ENDIAN_BITFIELD
-
-#endif /* _BYTE_ORDER */
-
#if __BSD_VISIBLE
#define NTOHL(x) (x) = ntohl((u_int32_t)(x))
#define NTOHS(x) (x) = ntohs((u_int16_t)(x))
@@ -255,16 +99,6 @@
#define HTONS(x) (x) = htons((u_int16_t)(x))
#endif
-
-#define __BYTE_ORDER _BYTE_ORDER
-#ifndef __LITTLE_ENDIAN
-#define __LITTLE_ENDIAN _LITTLE_ENDIAN
-#endif
-#ifndef __BIG_ENDIAN
-#define __BIG_ENDIAN _BIG_ENDIAN
-#endif
-
-
#ifdef __BSD_VISIBLE
/*
* glibc-compatible beXXtoh/leXXtoh synonyms for htobeXX/htoleXX.
diff --git a/tests/setjmp_test.cpp b/tests/setjmp_test.cpp
index 2df0135..2ea01b3 100644
--- a/tests/setjmp_test.cpp
+++ b/tests/setjmp_test.cpp
@@ -63,17 +63,29 @@
}
}
-static sigset_t SigSetOf(int signal) {
+static sigset_t SigSetOf(int signal, int rt_signal = 0) {
sigset_t ss;
sigemptyset(&ss);
sigaddset(&ss, signal);
+ if (rt_signal != 0) {
+ sigaddset(&ss, rt_signal);
+ }
return ss;
}
+void AssertSigmaskEquals(const sigset_t& expected) {
+ sigset_t actual;
+ sigprocmask(0 /* ignored */, NULL, &actual);
+ size_t end = sizeof(sigset_t) * 8;
+ for (size_t i = 1; i <= end; ++i) {
+ EXPECT_EQ(sigismember(&expected, i), sigismember(&actual, i)) << i;
+ }
+}
+
TEST(setjmp, _setjmp_signal_mask) {
// _setjmp/_longjmp do not save/restore the signal mask.
- sigset_t ss1(SigSetOf(SIGUSR1));
- sigset_t ss2(SigSetOf(SIGUSR2));
+ sigset_t ss1(SigSetOf(SIGUSR1, SIGRTMIN + 8));
+ sigset_t ss2(SigSetOf(SIGUSR2, SIGRTMIN + 9));
sigset_t original_set;
sigprocmask(SIG_SETMASK, &ss1, &original_set);
jmp_buf jb;
@@ -82,9 +94,7 @@
_longjmp(jb, 1);
FAIL(); // Unreachable.
} else {
- sigset_t ss;
- sigprocmask(SIG_SETMASK, NULL, &ss);
- EXPECT_TRUE(sigismember(&ss, SIGUSR2));
+ AssertSigmaskEquals(ss2);
}
sigprocmask(SIG_SETMASK, &original_set, NULL);
}
@@ -93,8 +103,8 @@
// setjmp/longjmp do save/restore the signal mask on bionic, but not on glibc.
// This is a BSD versus System V historical accident. POSIX leaves the
// behavior unspecified, so any code that cares needs to use sigsetjmp.
- sigset_t ss1(SigSetOf(SIGUSR1));
- sigset_t ss2(SigSetOf(SIGUSR2));
+ sigset_t ss1(SigSetOf(SIGUSR1, SIGRTMIN + 8));
+ sigset_t ss2(SigSetOf(SIGUSR2, SIGRTMIN + 9));
sigset_t original_set;
sigprocmask(SIG_SETMASK, &ss1, &original_set);
jmp_buf jb;
@@ -103,14 +113,12 @@
longjmp(jb, 1);
FAIL(); // Unreachable.
} else {
- sigset_t ss;
- sigprocmask(SIG_SETMASK, NULL, &ss);
#if defined(__BIONIC__)
// bionic behaves like BSD and does save/restore the signal mask.
- EXPECT_TRUE(sigismember(&ss, SIGUSR1));
+ AssertSigmaskEquals(ss1);
#else
// glibc behaves like System V and doesn't save/restore the signal mask.
- EXPECT_TRUE(sigismember(&ss, SIGUSR2));
+ AssertSigmaskEquals(ss2);
#endif
}
sigprocmask(SIG_SETMASK, &original_set, NULL);
@@ -118,8 +126,8 @@
TEST(setjmp, sigsetjmp_0_signal_mask) {
// sigsetjmp(0)/siglongjmp do not save/restore the signal mask.
- sigset_t ss1(SigSetOf(SIGUSR1));
- sigset_t ss2(SigSetOf(SIGUSR2));
+ sigset_t ss1(SigSetOf(SIGUSR1, SIGRTMIN + 8));
+ sigset_t ss2(SigSetOf(SIGUSR2, SIGRTMIN + 9));
sigset_t original_set;
sigprocmask(SIG_SETMASK, &ss1, &original_set);
sigjmp_buf sjb;
@@ -128,17 +136,15 @@
siglongjmp(sjb, 1);
FAIL(); // Unreachable.
} else {
- sigset_t ss;
- sigprocmask(SIG_SETMASK, NULL, &ss);
- EXPECT_TRUE(sigismember(&ss, SIGUSR2));
+ AssertSigmaskEquals(ss2);
}
sigprocmask(SIG_SETMASK, &original_set, NULL);
}
TEST(setjmp, sigsetjmp_1_signal_mask) {
// sigsetjmp(1)/siglongjmp does save/restore the signal mask.
- sigset_t ss1(SigSetOf(SIGUSR1));
- sigset_t ss2(SigSetOf(SIGUSR2));
+ sigset_t ss1(SigSetOf(SIGUSR1, SIGRTMIN + 8));
+ sigset_t ss2(SigSetOf(SIGUSR2, SIGRTMIN + 9));
sigset_t original_set;
sigprocmask(SIG_SETMASK, &ss1, &original_set);
sigjmp_buf sjb;
@@ -147,9 +153,7 @@
siglongjmp(sjb, 1);
FAIL(); // Unreachable.
} else {
- sigset_t ss;
- sigprocmask(SIG_SETMASK, NULL, &ss);
- EXPECT_TRUE(sigismember(&ss, SIGUSR1));
+ AssertSigmaskEquals(ss1);
}
sigprocmask(SIG_SETMASK, &original_set, NULL);
}