diff --git a/libm/include/arm/machine/fenv.h b/libc/arch-arm/include/machine/fenv.h
similarity index 100%
rename from libm/include/arm/machine/fenv.h
rename to libc/arch-arm/include/machine/fenv.h
diff --git a/libm/include/arm64/machine/fenv.h b/libc/arch-arm64/include/machine/fenv.h
similarity index 100%
rename from libm/include/arm64/machine/fenv.h
rename to libc/arch-arm64/include/machine/fenv.h
diff --git a/libm/include/mips/machine/fenv.h b/libc/arch-mips/include/machine/fenv.h
similarity index 100%
rename from libm/include/mips/machine/fenv.h
rename to libc/arch-mips/include/machine/fenv.h
diff --git a/libm/include/i387/machine/fenv.h b/libc/arch-x86/include/machine/fenv.h
similarity index 100%
rename from libm/include/i387/machine/fenv.h
rename to libc/arch-x86/include/machine/fenv.h
diff --git a/libm/include/amd64/machine/fenv.h b/libc/arch-x86_64/include/machine/fenv.h
similarity index 100%
rename from libm/include/amd64/machine/fenv.h
rename to libc/arch-x86_64/include/machine/fenv.h
diff --git a/libm/include/complex.h b/libc/include/complex.h
similarity index 100%
rename from libm/include/complex.h
rename to libc/include/complex.h
diff --git a/libm/include/fenv.h b/libc/include/fenv.h
similarity index 100%
rename from libm/include/fenv.h
rename to libc/include/fenv.h
diff --git a/libm/include/math.h b/libc/include/math.h
similarity index 100%
rename from libm/include/math.h
rename to libc/include/math.h
diff --git a/libm/amd64/fenv.c b/libm/amd64/fenv.c
index 4b24ff9..9edaf88 100755
--- a/libm/amd64/fenv.c
+++ b/libm/amd64/fenv.c
@@ -28,7 +28,14 @@
  */
 
 #include <fenv.h>
-#include <machine/fpu.h>
+
+/*
+ * The i387 defaults to Intel extended precision mode and round to nearest,
+ * with all exceptions masked.
+ */
+#define	__INITIAL_NPXCW__	0x037f
+#define __INITIAL_MXCSR__ 	0x1f80
+#define __INITIAL_MXCSR_MASK__	0xffbf
 
 #define SSE_MASK_SHIFT 7
 
diff --git a/libm/i387/fenv.c b/libm/i387/fenv.c
index f64f8dc..64c2b7a 100644
--- a/libm/i387/fenv.c
+++ b/libm/i387/fenv.c
@@ -28,12 +28,31 @@
 
 #include <sys/cdefs.h>
 #include <sys/types.h>
-#include "npx.h"
 #include "fenv.h"
 
 #define ROUND_MASK   (FE_TONEAREST | FE_DOWNWARD | FE_UPWARD | FE_TOWARDZERO)
 
 /*
+ * The hardware default control word for i387's and later coprocessors is
+ * 0x37F, giving:
+ *
+ *	round to nearest
+ *	64-bit precision
+ *	all exceptions masked.
+ *
+ * We modify the affine mode bit and precision bits in this to give:
+ *
+ *	affine mode for 287's (if they work at all) (1 in bitfield 1<<12)
+ *	53-bit precision (2 in bitfield 3<<8)
+ *
+ * 64-bit precision often gives bad results with high level languages
+ * because it makes the results of calculations depend on whether
+ * intermediate values are stored in memory or in FPU registers.
+ */
+#define	__INITIAL_NPXCW__	0x127F
+#define	__INITIAL_MXCSR__	0x1F80
+
+/*
  * As compared to the x87 control word, the SSE unit's control word
  * has the rounding control bits offset by 3 and the exception mask
  * bits offset by 7.
diff --git a/libm/i387/npx.h b/libm/i387/npx.h
deleted file mode 100644
index 38c2add..0000000
--- a/libm/i387/npx.h
+++ /dev/null
@@ -1,160 +0,0 @@
-/*-
- * Copyright (c) 1990 The Regents of the University of California.
- * All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * William Jolitz.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- * 4. Neither the name of the University nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- *	from: @(#)npx.h	5.3 (Berkeley) 1/18/91
- * $FreeBSD: src/sys/i386/include/npx.h,v 1.29.2.1 2006/07/01 00:57:55 davidxu Exp $
- */
-
-/*
- * 287/387 NPX Coprocessor Data Structures and Constants
- * W. Jolitz 1/90
- */
-
-#ifndef _MACHINE_NPX_H_
-#define	_MACHINE_NPX_H_
-
-/* Environment information of floating point unit */
-struct env87 {
-	long	en_cw;		/* control word (16bits) */
-	long	en_sw;		/* status word (16bits) */
-	long	en_tw;		/* tag word (16bits) */
-	long	en_fip;		/* floating point instruction pointer */
-	u_short	en_fcs;		/* floating code segment selector */
-	u_short	en_opcode;	/* opcode last executed (11 bits ) */
-	long	en_foo;		/* floating operand offset */
-	long	en_fos;		/* floating operand segment selector */
-};
-
-/* Contents of each floating point accumulator */
-struct fpacc87 {
-#ifdef dontdef /* too unportable */
-	u_long	fp_mantlo;	/* mantissa low (31:0) */
-	u_long	fp_manthi;	/* mantissa high (63:32) */
-	int	fp_exp:15;	/* exponent */
-	int	fp_sgn:1;	/* mantissa sign */
-#else
-	u_char	fp_bytes[10];
-#endif
-};
-
-/* Floating point context */
-struct save87 {
-	struct	env87 sv_env;	/* floating point control/status */
-	struct	fpacc87	sv_ac[8];	/* accumulator contents, 0-7 */
-	u_char	sv_pad0[4];	/* padding for (now unused) saved status word */
-	/*
-	 * Bogus padding for emulators.  Emulators should use their own
-	 * struct and arrange to store into this struct (ending here)
-	 * before it is inspected for ptracing or for core dumps.  Some
-	 * emulators overwrite the whole struct.  We have no good way of
-	 * knowing how much padding to leave.  Leave just enough for the
-	 * GPL emulator's i387_union (176 bytes total).
-	 */
-	u_char	sv_pad[64];	/* padding; used by emulators */
-};
-
-struct  envxmm {
-	u_int16_t	en_cw;		/* control word (16bits) */
-	u_int16_t	en_sw;		/* status word (16bits) */
-	u_int16_t	en_tw;		/* tag word (16bits) */
-	u_int16_t	en_opcode;	/* opcode last executed (11 bits ) */
-	u_int32_t	en_fip;		/* floating point instruction pointer */
-	u_int16_t	en_fcs;		/* floating code segment selector */
-	u_int16_t	en_pad0;	/* padding */
-	u_int32_t	en_foo;		/* floating operand offset */
-	u_int16_t	en_fos;		/* floating operand segment selector */
-	u_int16_t	en_pad1;	/* padding */
-	u_int32_t	en_mxcsr;	/* SSE sontorol/status register */
-	u_int32_t	en_mxcsr_mask;	/* valid bits in mxcsr */
-};
-
-/* Contents of each SSE extended accumulator */
-struct  xmmacc {
-	u_char	xmm_bytes[16];
-};
-
-struct  savexmm {
-	struct	envxmm	sv_env;
-	struct {
-		struct fpacc87	fp_acc;
-		u_char		fp_pad[6];      /* padding */
-	} sv_fp[8];
-	struct xmmacc	sv_xmm[8];
-	u_char sv_pad[224];
-} __aligned(16);
-
-union	savefpu {
-	struct	save87	sv_87;
-	struct	savexmm	sv_xmm;
-};
-
-/*
- * The hardware default control word for i387's and later coprocessors is
- * 0x37F, giving:
- *
- *	round to nearest
- *	64-bit precision
- *	all exceptions masked.
- *
- * We modify the affine mode bit and precision bits in this to give:
- *
- *	affine mode for 287's (if they work at all) (1 in bitfield 1<<12)
- *	53-bit precision (2 in bitfield 3<<8)
- *
- * 64-bit precision often gives bad results with high level languages
- * because it makes the results of calculations depend on whether
- * intermediate values are stored in memory or in FPU registers.
- */
-#define	__INITIAL_NPXCW__	0x127F
-#define	__INITIAL_MXCSR__	0x1F80
-
-#ifdef _KERNEL
-
-#define	IO_NPX		0x0F0		/* Numeric Coprocessor */
-#define	IO_NPXSIZE	16		/* 80387/80487 NPX registers */
-
-#define	IRQ_NPX		13
-
-/* full reset on some systems, NOP on others */
-#define npx_full_reset() outb(IO_NPX + 1, 0)
-
-int	npxdna(void);
-void	npxdrop(void);
-void	npxexit(struct thread *td);
-int	npxformat(void);
-int	npxgetregs(struct thread *td, union savefpu *addr);
-void	npxinit(u_short control);
-void	npxsave(union savefpu *addr);
-void	npxsetregs(struct thread *td, union savefpu *addr);
-int	npxtrap(void);
-#endif
-
-#endif /* !_MACHINE_NPX_H_ */
diff --git a/libm/include/amd64/machine/fpu.h b/libm/include/amd64/machine/fpu.h
deleted file mode 100644
index bda8f05..0000000
--- a/libm/include/amd64/machine/fpu.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*	$OpenBSD: fpu.h,v 1.9 2011/03/23 16:54:34 pirofti Exp $	*/
-/*	$NetBSD: fpu.h,v 1.1 2003/04/26 18:39:40 fvdl Exp $	*/
-
-#ifndef	_MACHINE_FPU_H_
-#define	_MACHINE_FPU_H_
-
-#include <sys/types.h>
-
-/*
- * amd64 only uses the extended save/restore format used
- * by fxsave/fsrestore, to always deal with the SSE registers,
- * which are part of the ABI to pass floating point values.
- * Must be stored in memory on a 16-byte boundary.
- */
-
-struct fxsave64 {
-	u_int16_t  fx_fcw;
-	u_int16_t  fx_fsw;
-	u_int8_t   fx_ftw;
-	u_int8_t   fx_unused1;
-	u_int16_t  fx_fop;
-	u_int64_t  fx_rip;
-	u_int64_t  fx_rdp;
-	u_int32_t  fx_mxcsr;
-	u_int32_t  fx_mxcsr_mask;
-	u_int64_t  fx_st[8][2];   /* 8 normal FP regs */
-	u_int64_t  fx_xmm[16][2]; /* 16 SSE2 registers */
-	u_int8_t   fx_unused3[96];
-} __packed;
-
-struct savefpu {
-	struct fxsave64 fp_fxsave;	/* see above */
-	u_int16_t fp_ex_sw;		/* saved status from last exception */
-	u_int16_t fp_ex_tw;		/* saved tag from last exception */
-};
-
-/*
- * The i387 defaults to Intel extended precision mode and round to nearest,
- * with all exceptions masked.
- */
-#define	__INITIAL_NPXCW__	0x037f
-#define __INITIAL_MXCSR__ 	0x1f80
-#define __INITIAL_MXCSR_MASK__	0xffbf
-
-#ifdef _KERNEL
-/*
- * XXX
- */
-struct trapframe;
-struct cpu_info;
-
-extern uint32_t	fpu_mxcsr_mask;
-
-void fpuinit(struct cpu_info *);
-void fpudrop(void);
-void fpudiscard(struct proc *);
-void fputrap(struct trapframe *);
-void fpusave_proc(struct proc *, int);
-void fpusave_cpu(struct cpu_info *, int);
-void fpu_kernel_enter(void);
-void fpu_kernel_exit(void);
-
-#endif
-
-#endif /* _MACHINE_FPU_H_ */
diff --git a/tests/complex_test.cpp b/tests/complex_test.cpp
index 710912a..3b8e682 100644
--- a/tests/complex_test.cpp
+++ b/tests/complex_test.cpp
@@ -18,7 +18,7 @@
 
 // libc++ actively gets in the way of including <complex.h> from C++, so we
 // have to be naughty.
-#include <../libm/include/complex.h>
+#include <../libc/include/complex.h>
 
 // (libc++ also seems to have really bad implementations of its own that ignore
 // the intricacies of floating point math.)