Generate the uapi headers for mips and x86/x86_64.
Bug: 11559337
Change-Id: I23b1a43e7bfa8fa6f9df7e59d2e731a0ec52dafc
diff --git a/libc/kernel/uapi/asm-mips/asm/cachectl.h b/libc/kernel/uapi/asm-mips/asm/cachectl.h
new file mode 100644
index 0000000..6cc6f28
--- /dev/null
+++ b/libc/kernel/uapi/asm-mips/asm/cachectl.h
@@ -0,0 +1,28 @@
+/****************************************************************************
+ ****************************************************************************
+ ***
+ *** This header was automatically generated from a Linux kernel header
+ *** of the same name, to make information necessary for userspace to
+ *** call into the kernel available to libc. It contains only constants,
+ *** structures, and macros generated from the original header, and thus,
+ *** contains no copyrightable information.
+ ***
+ *** To edit the content of this header, modify the corresponding
+ *** source file (e.g. under external/kernel-headers/original/) then
+ *** run bionic/libc/kernel/tools/update_all.py
+ ***
+ *** Any manual change here will be lost the next time this script will
+ *** be run. You've been warned!
+ ***
+ ****************************************************************************
+ ****************************************************************************/
+#ifndef _ASM_CACHECTL
+#define _ASM_CACHECTL
+#define ICACHE (1<<0)
+#define DCACHE (1<<1)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define BCACHE (ICACHE|DCACHE)
+#define CACHEABLE 0
+#define UNCACHEABLE 1
+#endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */