commit a7b0f8899790198cd9e72950f481679fe31e1a92
author Anders Lewis <agloo@google.com> Mon Jul 24 20:01:13 2017 -0700
committer Anders Lewis <agloo@google.com> Mon Aug 07 13:16:09 2017 -0700
tree 4167c3afc82ffb281f43ef2332a60c675f121e43
parent 0d6485eca47f0e860486795b2da97679948fd5d5

Implement interface for bionic benchmarks.

Test: Unit tests.
Change-Id: Ic61932f61ddd572e2f045b601f9da6e090cdc45d

benchmarks/atomic_benchmark.cpp

diff --git a/benchmarks/atomic_benchmark.cpp b/benchmarks/atomic_benchmark.cpp
index 66a0120..a584dce 100644
--- a/benchmarks/atomic_benchmark.cpp
+++ b/benchmarks/atomic_benchmark.cpp
@@ -20,10 +20,12 @@
 // Expected mappings from C++ atomics to hardware primitives can be found at
 // http://www.cl.cam.ac.uk/~pes20/cpp/cpp0xmappings.html .
 
-#include <benchmark/benchmark.h>
 #include <atomic>
 #include <mutex>
 
+#include <benchmark/benchmark.h>
+#include "util.h"
+
 // We time atomic operations separated by a volatile (not atomic!) increment.  This ensures
 // that the compiler emits memory instructions (e.g. load or store) prior to any fence or the
 // like.  That in turn ensures that the CPU has outstanding memory operations when the fence
@@ -48,7 +50,7 @@
     ++counter;
   }
 }
-BENCHMARK(BM_empty);
+BIONIC_BENCHMARK(BM_empty);
 
 static void BM_load_relaxed(benchmark::State& state) {
   unsigned result = 0;
@@ -58,7 +60,7 @@
   }
   sink = result;
 }
-BENCHMARK(BM_load_relaxed);
+BIONIC_BENCHMARK(BM_load_relaxed);
 
 static void BM_load_acquire(benchmark::State& state) {
   unsigned result = 0;
@@ -68,7 +70,7 @@
   }
   sink = result;
 }
-BENCHMARK(BM_load_acquire);
+BIONIC_BENCHMARK(BM_load_acquire);
 
 static void BM_store_release(benchmark::State& state) {
   int i = counter;
@@ -77,7 +79,7 @@
     ++counter;
   }
 }
-BENCHMARK(BM_store_release);
+BIONIC_BENCHMARK(BM_store_release);
 
 static void BM_store_seq_cst(benchmark::State& state) {
   int i = counter;
@@ -86,7 +88,7 @@
     ++counter;
   }
 }
-BENCHMARK(BM_store_seq_cst);
+BIONIC_BENCHMARK(BM_store_seq_cst);
 
 static void BM_fetch_add_relaxed(benchmark::State& state) {
   unsigned result = 0;
@@ -96,7 +98,7 @@
   }
   sink = result;
 }
-BENCHMARK(BM_fetch_add_relaxed);
+BIONIC_BENCHMARK(BM_fetch_add_relaxed);
 
 static void BM_fetch_add_seq_cst(benchmark::State& state) {
   unsigned result = 0;
@@ -106,7 +108,7 @@
   }
   sink = result;
 }
-BENCHMARK(BM_fetch_add_seq_cst);
+BIONIC_BENCHMARK(BM_fetch_add_seq_cst);
 
 // The fence benchmarks include a relaxed load to make it much harder to optimize away
 // the fence.
@@ -120,7 +122,7 @@
   }
   sink = result;
 }
-BENCHMARK(BM_acquire_fence);
+BIONIC_BENCHMARK(BM_acquire_fence);
 
 static void BM_seq_cst_fence(benchmark::State& state) {
   unsigned result = 0;
@@ -131,7 +133,7 @@
   }
   sink = result;
 }
-BENCHMARK(BM_seq_cst_fence);
+BIONIC_BENCHMARK(BM_seq_cst_fence);
 
 // For comparison, also throw in a critical section version:
 
@@ -145,4 +147,4 @@
   }
   sink = result;
 }
-BENCHMARK(BM_fetch_add_cs);
+BIONIC_BENCHMARK(BM_fetch_add_cs);