Unify our assembler macros.
Our <machine/asm.h> files were modified from upstream, to the extent
that no architecture was actually using the upstream ENTRY or END macros,
assuming that architecture even had such a macro upstream. This patch moves
everyone to the same macros, with just a few tweaks remaining in the
<machine/asm.h> files, which no one should now use directly.
I've removed most of the unused cruft from the <machine/asm.h> files, though
there's still rather a lot in the mips/mips64 ones.
Bug: 12229603
Change-Id: I2fff287dc571ac1087abe9070362fb9420d85d6d
diff --git a/libc/arch-mips/bionic/__bionic_clone.S b/libc/arch-mips/bionic/__bionic_clone.S
index 8970b6e..9273134 100644
--- a/libc/arch-mips/bionic/__bionic_clone.S
+++ b/libc/arch-mips/bionic/__bionic_clone.S
@@ -26,49 +26,43 @@
* SUCH DAMAGE.
*/
-#include <asm/unistd.h>
+#include <private/bionic_asm.h>
#include <linux/errno.h>
#include <linux/sched.h>
// pid_t __bionic_clone(int flags, void* child_stack, pid_t* parent_tid, void* tls, pid_t* child_tid, int (*fn)(void*), void* arg);
- .text
- .type __bionic_clone, @function
- .global __bionic_clone
- .align 4
- .ent __bionic_clone
-__bionic_clone:
+ENTRY(__bionic_clone)
.set noreorder
- .cpload $t9
+ .cpload t9
.set reorder
# set up child stack
- subu $a1,16
- lw $t0,20($sp) # fn
- lw $t1,24($sp) # arg
- sw $t0,0($a1) # fn
- sw $t1,4($a1) # arg
+ subu a1,16
+ lw t0,20(sp) # fn
+ lw t1,24(sp) # arg
+ sw t0,0(a1) # fn
+ sw t1,4(a1) # arg
# remainder of arguments are correct for clone system call
- li $v0,__NR_clone
+ li v0,__NR_clone
syscall
- bnez $a3,.L__error_bc
+ bnez a3,.L__error_bc
- beqz $v0,.L__thread_start_bc
+ beqz v0,.L__thread_start_bc
- j $ra
+ j ra
.L__thread_start_bc:
- lw $a0,0($sp) # fn
- lw $a1,4($sp) # arg
+ lw a0,0(sp) # fn
+ lw a1,4(sp) # arg
# void __bionic_clone_entry(int (*func)(void*), void *arg)
- la $t9,__bionic_clone_entry
- j $t9
+ la t9,__bionic_clone_entry
+ j t9
.L__error_bc:
- move $a0,$v0
- la $t9,__set_errno
- j $t9
-
- .end __bionic_clone
+ move a0,v0
+ la t9,__set_errno
+ j t9
+END(__bionic_clone)
diff --git a/libc/arch-mips/bionic/__get_sp.S b/libc/arch-mips/bionic/__get_sp.S
index 834c89d..d4b278b 100644
--- a/libc/arch-mips/bionic/__get_sp.S
+++ b/libc/arch-mips/bionic/__get_sp.S
@@ -25,15 +25,11 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
- .text
-/* void *__get_sp(void) */
+#include <private/bionic_asm.h>
- .type __get_sp, @function
- .global __get_sp
- .align 4
- .ent __get_sp
-__get_sp:
- move $v0, $sp
- j $ra
- .end __get_sp
+// void* __get_sp()
+ENTRY(__get_sp)
+ move v0, sp
+ j ra
+END(__get_sp)
diff --git a/libc/arch-mips/bionic/_exit_with_stack_teardown.S b/libc/arch-mips/bionic/_exit_with_stack_teardown.S
index 8f624c3..129e3f9 100644
--- a/libc/arch-mips/bionic/_exit_with_stack_teardown.S
+++ b/libc/arch-mips/bionic/_exit_with_stack_teardown.S
@@ -26,23 +26,16 @@
* SUCH DAMAGE.
*/
-#include <asm/unistd.h>
-
- .text
+#include <private/bionic_asm.h>
// void _exit_with_stack_teardown(void* stackBase, size_t stackSize)
-
- .type _exit_with_stack_teardown, @function
- .global _exit_with_stack_teardown
- .align 4
- .ent _exit_with_stack_teardown
-_exit_with_stack_teardown:
- li $v0, __NR_munmap
+ENTRY(_exit_with_stack_teardown)
+ li v0, __NR_munmap
syscall
// If munmap failed, we ignore the failure and exit anyway.
- li $a0, 0
- li $v0, __NR_exit
+ li a0, 0
+ li v0, __NR_exit
syscall
// The exit syscall does not return.
- .end _exit_with_stack_teardown
+END(_exit_with_stack_teardown)
diff --git a/libc/arch-mips/bionic/_setjmp.S b/libc/arch-mips/bionic/_setjmp.S
index e7083ae..4465cd2 100644
--- a/libc/arch-mips/bionic/_setjmp.S
+++ b/libc/arch-mips/bionic/_setjmp.S
@@ -2,7 +2,7 @@
/*
* Copyright (c) 2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
+ *
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
@@ -29,7 +29,7 @@
*
*/
-#include <machine/asm.h>
+#include <private/bionic_asm.h>
#include <machine/regnum.h>
#include <machine/signal.h>
@@ -48,13 +48,13 @@
swc1 FPR, OFF(BASE) ; \
mfhc1 t0, FPR ; \
sw t0, OFF+4(BASE) ;
-
+
#define FPREG64_L(FPR, OFF, BASE) \
lw t0, OFF+4(BASE) ; \
lw t1, OFF(BASE) ; \
mtc1 t1, FPR ; \
mthc1 t0, FPR ; \
-
+
LEAF(_setjmp, FRAMESZ)
PTR_SUBU sp, FRAMESZ
SETUP_GP64(GPOFF, _setjmp)
@@ -185,4 +185,3 @@
RESTORE_GP64
PTR_ADDU sp, FRAMESZ
END(_longjmp)
-
diff --git a/libc/arch-mips/bionic/bzero.S b/libc/arch-mips/bionic/bzero.S
index 6739345..6e5d294 100644
--- a/libc/arch-mips/bionic/bzero.S
+++ b/libc/arch-mips/bionic/bzero.S
@@ -25,21 +25,15 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
- .text
-/*
- * void bzero(void *s, size_t n);
- */
- .type bzero, @function
- .global bzero
- .align 4
- .ent bzero
+#include <private/bionic_asm.h>
+
+// void bzero(void*, size_t);
+ENTRY(bzero)
.set noreorder
-bzero:
- .cpload $t9
- move $a2,$a1
- la $t9,memset
- j $t9
- move $a1,$zero
- .end bzero
-
+ .cpload t9
+ move a2,a1
+ la t9,memset
+ j t9
+ move a1,zero
+END(bzero)
diff --git a/libc/arch-mips/bionic/futex_mips.S b/libc/arch-mips/bionic/futex_mips.S
index 285beac..7626a7c 100644
--- a/libc/arch-mips/bionic/futex_mips.S
+++ b/libc/arch-mips/bionic/futex_mips.S
@@ -32,11 +32,7 @@
#define FUTEX_WAKE 1
// int __futex_wait(volatile void* ftx, int val, const struct timespec* timeout)
- .type __futex_wait, @function
- .global __futex_wait
- .align 4
- .ent __futex_wait
-__futex_wait:
+ENTRY(__futex_wait)
subu sp,4*6
sw $0,20(sp) /* val3 */
sw $0,16(sp) /* addr2 */
@@ -54,14 +50,10 @@
.set reorder
addu sp,4*6
j ra
- .end __futex_wait
+END(__futex_wait)
// int __futex_wake(volatile void* ftx, int count)
- .type __futex_wake, @function
- .globl __futex_wake
- .align 4
- .ent __futex_wake
-__futex_wake:
+ENTRY(__futex_wake)
subu sp,4*6
sw $0,20(sp) /* val3 */
sw $0,16(sp) /* addr2 */
@@ -79,14 +71,10 @@
.set reorder
addu sp,4*6
j ra
- .end __futex_wake
+END(__futex_wake)
// int __futex_syscall3(volatile void* ftx, int op, int count)
- .type __futex_syscall3, @function
- .global __futex_syscall3
- .align 4
- .ent __futex_syscall3
-__futex_syscall3:
+ENTRY(__futex_syscall3)
subu sp,4*6
sw $0,20(sp) /* val3 */
sw $0,16(sp) /* addr2 */
@@ -104,14 +92,10 @@
.set reorder
addu sp,4*6
j ra
- .end __futex_syscall3
+END(__futex_syscall3)
// int __futex_syscall4(volatile void* ftx, int op, int val, const struct timespec* timeout)
- .type __futex_syscall4, @function
- .global __futex_syscall4
- .align 4
- .ent __futex_syscall4
-__futex_syscall4:
+ENTRY(__futex_syscall4)
subu sp,4*6
sw $0,20(sp) /* val3 */
sw $0,16(sp) /* addr2 */
@@ -129,4 +113,4 @@
.set reorder
addu sp,4*6
j ra
- .end __futex_syscall4
+END(__futex_syscall4)
diff --git a/libc/arch-mips/bionic/memcmp16.S b/libc/arch-mips/bionic/memcmp16.S
index a2b2544..f9d14a9 100644
--- a/libc/arch-mips/bionic/memcmp16.S
+++ b/libc/arch-mips/bionic/memcmp16.S
@@ -25,31 +25,26 @@
* OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
- .text
-/*
- * u4 __memcmp16(const u2* s0, const u2* s1, size_t count);
- */
- .type __memcmp16, @function
- .global __memcmp16
- .align 4
- .ent __memcmp16
-__memcmp16:
- li $t0,0
- li $t1,0
- beqz $a2,done /* 0 length string */
- beq $a0,$a1,done /* strings are identical */
+#include <private/bionic_asm.h>
+
+// u4 __memcmp16(const u2*, const u2*, size_t);
+ENTRY(__memcmp16)
+ li t0,0
+ li t1,0
+ beqz a2,done /* 0 length string */
+ beq a0,a1,done /* strings are identical */
/* Unoptimised... */
-1: lhu $t0,0($a0)
- lhu $t1,0($a1)
- addu $a1,2
- bne $t0,$t1,done
- addu $a0,2
- subu $a2,1
- bnez $a2,1b
+1: lhu t0,0(a0)
+ lhu t1,0(a1)
+ addu a1,2
+ bne t0,t1,done
+ addu a0,2
+ subu a2,1
+ bnez a2,1b
done:
- subu $v0,$t0,$t1
- j $ra
- .end __memcmp16
+ subu v0,t0,t1
+ j ra
+END(__memcmp16)
diff --git a/libc/arch-mips/bionic/setjmp.S b/libc/arch-mips/bionic/setjmp.S
index 7c21195..2af1fbd 100644
--- a/libc/arch-mips/bionic/setjmp.S
+++ b/libc/arch-mips/bionic/setjmp.S
@@ -29,7 +29,7 @@
*
*/
-#include <machine/asm.h>
+#include <private/bionic_asm.h>
#include <machine/regnum.h>
#include <machine/signal.h>
@@ -49,13 +49,13 @@
swc1 FPR, OFF(BASE) ; \
mfhc1 t0, FPR ; \
sw t0, OFF+4(BASE) ;
-
+
#define FPREG64_L(FPR, OFF, BASE) \
lw t0, OFF+4(BASE) ; \
lw t1, OFF(BASE) ; \
mtc1 t1, FPR ; \
mthc1 t0, FPR ; \
-
+
NON_LEAF(setjmp, FRAMESZ, ra)
.mask 0x80000000, RAOFF
PTR_SUBU sp, FRAMESZ # allocate stack frame
@@ -154,7 +154,7 @@
lw a0, A0OFF(sp)
lw a1, A1OFF(sp)
- .set noreorder
+ .set noreorder
REG_L v0, SC_REGS+ZERO*REGSZ(a0)
bne v0, 0xACEDBADE, botch # jump if error
REG_L ra, SC_PC(a0)
@@ -169,9 +169,9 @@
REG_L s8, SC_REGS+S8*REGSZ(a0)
REG_L gp, SC_REGS+GP*REGSZ(a0)
REG_L sp, SC_REGS+SP*REGSZ(a0)
-
+
#if !defined(SOFTFLOAT)
- REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
+ REG_L v0, SC_FPREGS+((FSR-F0)*REGSZ)(a0)
ctc1 v0, $31
#if _MIPS_FPSET == 32
FPREG64_L($f20, SC_FPREGS+((F20-F0)*REGSZ_FP), a0)
diff --git a/libc/arch-mips/bionic/sigsetjmp.S b/libc/arch-mips/bionic/sigsetjmp.S
index b05454c..9d2e5ea 100644
--- a/libc/arch-mips/bionic/sigsetjmp.S
+++ b/libc/arch-mips/bionic/sigsetjmp.S
@@ -31,7 +31,7 @@
* SUCH DAMAGE.
*/
-#include <machine/asm.h>
+#include <private/bionic_asm.h>
#include <machine/regnum.h>
#include <machine/setjmp.h>
diff --git a/libc/arch-mips/bionic/syscall.S b/libc/arch-mips/bionic/syscall.S
index af5bcc9..db477a5 100644
--- a/libc/arch-mips/bionic/syscall.S
+++ b/libc/arch-mips/bionic/syscall.S
@@ -26,11 +26,7 @@
* SUCH DAMAGE.
*/
-#include <asm/unistd.h>
- .text
- .globl syscall
- .align 4
- .ent syscall
+#include <private/bionic_asm.h>
/*
* The caller is only required to allocate 16 bytes of stack for a0-a3.
@@ -38,28 +34,28 @@
*/
#define STACKSIZE 2*4
-syscall:
+ENTRY(syscall)
.set noreorder
- .cpload $t9
- move $v0, $a0
- move $a0, $a1
- move $a1, $a2
- move $a2, $a3
- lw $a3, 16($sp)
- lw $t0, 20($sp)
- lw $t1, 24($sp)
- subu $sp, STACKSIZE
- sw $t0, 16($sp)
- sw $t1, 20($sp)
+ .cpload t9
+ move v0, a0
+ move a0, a1
+ move a1, a2
+ move a2, a3
+ lw a3, 16(sp)
+ lw t0, 20(sp)
+ lw t1, 24(sp)
+ subu sp, STACKSIZE
+ sw t0, 16(sp)
+ sw t1, 20(sp)
syscall
- addu $sp, STACKSIZE
- bnez $a3, 1f
- move $a0, $v0
- j $ra
+ addu sp, STACKSIZE
+ bnez a3, 1f
+ move a0, v0
+ j ra
nop
1:
- la $t9,__set_errno
- j $t9
+ la t9,__set_errno
+ j t9
nop
.set reorder
- .end syscall
+END(syscall)
diff --git a/libc/arch-mips/bionic/vfork.S b/libc/arch-mips/bionic/vfork.S
index 414caaf..96de69e 100644
--- a/libc/arch-mips/bionic/vfork.S
+++ b/libc/arch-mips/bionic/vfork.S
@@ -26,39 +26,33 @@
* SUCH DAMAGE.
*/
-#include <asm/unistd.h>
+#include <private/bionic_asm.h>
#include <linux/sched.h>
// TODO: mips' uapi signal.h is missing #ifndef __ASSEMBLY__.
// #include <asm/signal.h>
#define SIGCHLD 18
- .text
-
- .type vfork, @function
- .global vfork
- .align 4
- .ent vfork
-vfork:
+ENTRY(vfork)
.set noreorder
- .cpload $t9
+ .cpload t9
- li $a0, (CLONE_VM | CLONE_VFORK | SIGCHLD)
- li $a1, 0
- li $a2, 0
- li $a3, 0
- subu $sp, 8
- sw $0, 16($sp)
- li $v0, __NR_clone
+ li a0, (CLONE_VM | CLONE_VFORK | SIGCHLD)
+ li a1, 0
+ li a2, 0
+ li a3, 0
+ subu sp, 8
+ sw $0, 16(sp)
+ li v0, __NR_clone
syscall
- addu $sp, 8
- bnez $a3, 1f
- move $a0, $v0
+ addu sp, 8
+ bnez a3, 1f
+ move a0, v0
- j $ra
+ j ra
nop
1:
- la $t9, __set_errno
- j $t9
+ la t9, __set_errno
+ j t9
nop
- .end vfork
+END(vfork)
diff --git a/libc/arch-mips/include/machine/asm.h b/libc/arch-mips/include/machine/asm.h
index 43dbc09..5eacde3 100644
--- a/libc/arch-mips/include/machine/asm.h
+++ b/libc/arch-mips/include/machine/asm.h
@@ -28,25 +28,24 @@
#ifndef _MIPS64_ASM_H
#define _MIPS64_ASM_H
-#include <machine/regdef.h>
-
-#ifdef NEED_OLD_RM7KFIX
-#define ITLBNOPFIX nop;nop;nop;nop;nop;nop;nop;nop;nop;nop;
-#else
-#define ITLBNOPFIX nop;nop;nop;nop
+#ifndef _ALIGN_TEXT
+# define _ALIGN_TEXT .align 4
#endif
+#undef __bionic_asm_custom_entry
+#undef __bionic_asm_custom_end
+#define __bionic_asm_custom_entry(f) .ent f
+#define __bionic_asm_custom_end(f) .end f
+
+#include <machine/regdef.h>
+
#define _MIPS_ISA_MIPS1 1 /* R2000/R3000 */
#define _MIPS_ISA_MIPS2 2 /* R4000/R6000 */
#define _MIPS_ISA_MIPS3 3 /* R4000 */
#define _MIPS_ISA_MIPS4 4 /* TFP (R1x000) */
-#ifdef __linux__
#define _MIPS_ISA_MIPS5 5
#define _MIPS_ISA_MIPS32 6
#define _MIPS_ISA_MIPS64 7
-#else
-#define _MIPS_ISA_MIPS32 32 /* MIPS32 */
-#endif
#if !defined(ABICALLS) && !defined(_NO_ABICALLS)
#define ABICALLS .abicalls
@@ -56,8 +55,6 @@
ABICALLS
#endif
-#define _C_LABEL(x) x /* XXX Obsolete but keep for a while */
-
#if !defined(__MIPSEL__) && !defined(__MIPSEB__)
#error "__MIPSEL__ or __MIPSEB__ must be defined"
#endif
@@ -90,15 +87,6 @@
*/
#if defined(ABICALLS) && !defined(_KERNEL) && !defined(_STANDALONE)
-#ifndef _MIPS_SIM
-#define _MIPS_SIM 1
-#define _ABIO32 1
-#endif
-#ifndef _MIPS_ISA
-#define _MIPS_ISA 2
-#define _MIPS_ISA_MIPS2 2
-#endif
-
#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
#define NARGSAVE 4
@@ -151,7 +139,7 @@
#define CF_RA_OFFS 20 /* Call ra save offset */
#endif
-#if (_MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4)
+#if (_MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS64)
#define REGSZ 8 /* 64 bit mode register size */
#define LOGREGSZ 3 /* log rsize */
#define REG_S sd
@@ -190,28 +178,6 @@
#endif
/*
- * Define -pg profile entry code.
- */
-#if defined(XGPROF) || defined(XPROF)
-#define MCOUNT \
- PTR_SUBU sp, sp, 32; \
- SAVE_GP(16); \
- sw ra, 28(sp); \
- sw gp, 24(sp); \
- .set noat; \
- .set noreorder; \
- move AT, ra; \
- jal _mcount; \
- PTR_SUBU sp, sp, 8; \
- lw ra, 28(sp); \
- PTR_ADDU sp, sp, 32; \
- .set reorder; \
- .set at;
-#else
-#define MCOUNT
-#endif
-
-/*
* LEAF(x, fsize)
*
* Declare a leaf routine.
@@ -221,26 +187,9 @@
.globl x; \
.ent x, 0; \
x: ; \
+ .cfi_startproc; \
.frame sp, fsize, ra; \
SETUP_GP \
- MCOUNT
-
-#define ALEAF(x) \
- .globl x; \
-x:
-
-/*
- * NLEAF(x)
- *
- * Declare a non-profiled leaf routine.
- */
-#define NLEAF(x, fsize) \
- .align 3; \
- .globl x; \
- .ent x, 0; \
-x: ; \
- .frame sp, fsize, ra; \
- SETUP_GP
/*
* NON_LEAF(x)
@@ -252,54 +201,8 @@
.globl x; \
.ent x, 0; \
x: ; \
+ .cfi_startproc; \
.frame sp, fsize, retpc; \
SETUP_GP \
- MCOUNT
-
-/*
- * NNON_LEAF(x)
- *
- * Declare a non-profiled non-leaf routine
- * (a routine that makes other C calls).
- */
-#define NNON_LEAF(x, fsize, retpc) \
- .align 3; \
- .globl x; \
- .ent x, 0; \
-x: ; \
- .frame sp, fsize, retpc \
- SETUP_GP
-
-/*
- * END(x)
- *
- * Mark end of a procedure.
- */
-#define END(x) \
- .end x
-
-/*
- * Macros to panic and printf from assembly language.
- */
-#define PANIC(msg) \
- LA a0, 9f; \
- jal panic; \
- nop ; \
- MSG(msg)
-
-#define PRINTF(msg) \
- la a0, 9f; \
- jal printf; \
- nop ; \
- MSG(msg)
-
-#define MSG(msg) \
- .rdata; \
-9: .asciiz msg; \
- .text
-
-#define ASMSTR(str) \
- .asciiz str; \
- .align 3
#endif /* !_MIPS_ASM_H */
diff --git a/libc/arch-mips/include/machine/signal.h b/libc/arch-mips/include/machine/signal.h
index f02ec0d..b31715c 100644
--- a/libc/arch-mips/include/machine/signal.h
+++ b/libc/arch-mips/include/machine/signal.h
@@ -37,8 +37,6 @@
#ifndef _MIPS_SIGNAL_H_
#define _MIPS_SIGNAL_H_
-#include <machine/asm.h>
-
#define SC_REGMASK (0*REGSZ)
#define SC_STATUS (1*REGSZ)
#define SC_PC (2*REGSZ)
diff --git a/libc/arch-mips/string/memcpy.S b/libc/arch-mips/string/memcpy.S
index aabdfcf..dc91096 100644
--- a/libc/arch-mips/string/memcpy.S
+++ b/libc/arch-mips/string/memcpy.S
@@ -39,13 +39,13 @@
* Include files
************************************************************************/
-#include "machine/asm.h"
+#include <private/bionic_asm.h>
-/*
+/*
* This routine could be optimized for MIPS64. The current code only
* uses MIPS32 instructions.
- */
+ */
#if defined(__MIPSEB__)
# define LWHI lwl /* high part is left in big-endian */
# define SWHI swl /* high part is left in big-endian */
diff --git a/libc/arch-mips/string/memset.S b/libc/arch-mips/string/memset.S
index a1c5055..3e630ca 100644
--- a/libc/arch-mips/string/memset.S
+++ b/libc/arch-mips/string/memset.S
@@ -39,12 +39,12 @@
* Include files
************************************************************************/
-#include "machine/asm.h"
+#include <private/bionic_asm.h>
-/*
+/*
* This routine could be optimized for MIPS64. The current code only
* uses MIPS32 instructions.
- */
+ */
#if defined(__MIPSEB__)
# define SWHI swl /* high part is left in big-endian */
@@ -220,7 +220,7 @@
sw a1,-36(a0)
nop
nop # the extra nop instructions help to balance
- nop # cycles needed for "store" + "fill" + "evict"
+ nop # cycles needed for "store" + "fill" + "evict"
nop # For 64byte store there are needed 8 fill
nop # and 8 evict cycles, i.e. at least 32 instr.
nop
@@ -320,4 +320,3 @@
/************************************************************************
* Implementation : Static functions
************************************************************************/
-