Update to v5.19 kernel headers.
Kernel headers coming from:
Git: https://android.googlesource.com/kernel/common/
Branch: android-mainline
Tag: android-mainline-5.19
Test: Builds on coral.
Test: All bionic unit tests pass on a coral device.
Test: Able to log in to wembley system.
Change-Id: I6fa6f6edb59f2cef990a7ba96877d9f2d3974c62
diff --git a/libc/kernel/uapi/linux/mdio.h b/libc/kernel/uapi/linux/mdio.h
index d5c9da8..7a2c9af 100644
--- a/libc/kernel/uapi/linux/mdio.h
+++ b/libc/kernel/uapi/linux/mdio.h
@@ -66,6 +66,19 @@
#define MDIO_PCS_10GBRT_STAT2 33
#define MDIO_AN_10GBT_CTRL 32
#define MDIO_AN_10GBT_STAT 33
+#define MDIO_B10L_PMA_CTRL 2294
+#define MDIO_PMA_10T1L_STAT 2295
+#define MDIO_PCS_10T1L_CTRL 2278
+#define MDIO_PMA_PMD_BT1 18
+#define MDIO_AN_T1_CTRL 512
+#define MDIO_AN_T1_STAT 513
+#define MDIO_AN_T1_ADV_L 514
+#define MDIO_AN_T1_ADV_M 515
+#define MDIO_AN_T1_ADV_H 516
+#define MDIO_AN_T1_LP_L 517
+#define MDIO_AN_T1_LP_M 518
+#define MDIO_AN_T1_LP_H 519
+#define MDIO_PMA_PMD_BT1_CTRL 2100
#define MDIO_PMA_LASI_RXCTRL 0x9000
#define MDIO_PMA_LASI_TXCTRL 0x9001
#define MDIO_PMA_LASI_CTRL 0x9002
@@ -139,6 +152,7 @@
#define MDIO_PMA_CTRL2_10BT 0x000f
#define MDIO_PMA_CTRL2_2_5GBT 0x0030
#define MDIO_PMA_CTRL2_5GBT 0x0031
+#define MDIO_PMA_CTRL2_BASET1 0x003D
#define MDIO_PCS_CTRL2_TYPE 0x0003
#define MDIO_PCS_CTRL2_10GBR 0x0000
#define MDIO_PCS_CTRL2_10GBX 0x0001
@@ -184,6 +198,7 @@
#define MDIO_PMA_EXTABLE_1000BKX 0x0040
#define MDIO_PMA_EXTABLE_100BTX 0x0080
#define MDIO_PMA_EXTABLE_10BT 0x0100
+#define MDIO_PMA_EXTABLE_BT1 0x0800
#define MDIO_PMA_EXTABLE_NBT 0x4000
#define MDIO_PHYXS_LNSTAT_SYNC0 0x0001
#define MDIO_PHYXS_LNSTAT_SYNC1 0x0002
@@ -218,6 +233,44 @@
#define MDIO_AN_10GBT_STAT_LOCOK 0x2000
#define MDIO_AN_10GBT_STAT_MS 0x4000
#define MDIO_AN_10GBT_STAT_MSFLT 0x8000
+#define MDIO_PMA_10T1L_CTRL_LB_EN 0x0001
+#define MDIO_PMA_10T1L_CTRL_EEE_EN 0x0400
+#define MDIO_PMA_10T1L_CTRL_LOW_POWER 0x0800
+#define MDIO_PMA_10T1L_CTRL_2V4_EN 0x1000
+#define MDIO_PMA_10T1L_CTRL_TX_DIS 0x4000
+#define MDIO_PMA_10T1L_CTRL_PMA_RST 0x8000
+#define MDIO_PMA_10T1L_STAT_LINK 0x0001
+#define MDIO_PMA_10T1L_STAT_FAULT 0x0002
+#define MDIO_PMA_10T1L_STAT_POLARITY 0x0004
+#define MDIO_PMA_10T1L_STAT_RECV_FAULT 0x0200
+#define MDIO_PMA_10T1L_STAT_EEE 0x0400
+#define MDIO_PMA_10T1L_STAT_LOW_POWER 0x0800
+#define MDIO_PMA_10T1L_STAT_2V4_ABLE 0x1000
+#define MDIO_PMA_10T1L_STAT_LB_ABLE 0x2000
+#define MDIO_PCS_10T1L_CTRL_LB 0x4000
+#define MDIO_PCS_10T1L_CTRL_RESET 0x8000
+#define MDIO_PMA_PMD_BT1_B10L_ABLE 0x0004
+#define MDIO_AN_T1_ADV_L_PAUSE_CAP ADVERTISE_PAUSE_CAP
+#define MDIO_AN_T1_ADV_L_PAUSE_ASYM ADVERTISE_PAUSE_ASYM
+#define MDIO_AN_T1_ADV_L_FORCE_MS 0x1000
+#define MDIO_AN_T1_ADV_L_REMOTE_FAULT ADVERTISE_RFAULT
+#define MDIO_AN_T1_ADV_L_ACK ADVERTISE_LPACK
+#define MDIO_AN_T1_ADV_L_NEXT_PAGE_REQ ADVERTISE_NPAGE
+#define MDIO_AN_T1_ADV_M_B10L 0x4000
+#define MDIO_AN_T1_ADV_M_MST 0x0010
+#define MDIO_AN_T1_ADV_H_10L_TX_HI_REQ 0x1000
+#define MDIO_AN_T1_ADV_H_10L_TX_HI 0x2000
+#define MDIO_AN_T1_LP_L_PAUSE_CAP LPA_PAUSE_CAP
+#define MDIO_AN_T1_LP_L_PAUSE_ASYM LPA_PAUSE_ASYM
+#define MDIO_AN_T1_LP_L_FORCE_MS 0x1000
+#define MDIO_AN_T1_LP_L_REMOTE_FAULT LPA_RFAULT
+#define MDIO_AN_T1_LP_L_ACK LPA_LPACK
+#define MDIO_AN_T1_LP_L_NEXT_PAGE_REQ LPA_NPAGE
+#define MDIO_AN_T1_LP_M_MST 0x0010
+#define MDIO_AN_T1_LP_M_B10L 0x4000
+#define MDIO_AN_T1_LP_H_10L_TX_HI_REQ 0x1000
+#define MDIO_AN_T1_LP_H_10L_TX_HI 0x2000
+#define MDIO_PMA_PMD_BT1_CTRL_CFG_MST 0x4000
#define MDIO_AN_EEE_ADV_100TX 0x0002
#define MDIO_AN_EEE_ADV_1000T 0x0004
#define MDIO_EEE_100TX MDIO_AN_EEE_ADV_100TX