commit 80ae69d11e9dde9606026b8fad30cf3b573df459
author Christopher Ferris <cferris@google.com> Tue Aug 02 16:32:21 2022 -0700
committer Christopher Ferris <cferris@google.com> Wed Aug 10 12:58:45 2022 -0700
tree 4c2facdbb523ba22265b323da4e35a8838c24943
parent ea7f84435d0e3d3aa4ab02a697eed8a5720dfbb7

Update to v5.19 kernel headers.

Kernel headers coming from:

Git: https://android.googlesource.com/kernel/common/
Branch: android-mainline
Tag: android-mainline-5.19

Test: Builds on coral.
Test: All bionic unit tests pass on a coral device.
Test: Able to log in to wembley system.
Change-Id: I6fa6f6edb59f2cef990a7ba96877d9f2d3974c62

libc/kernel/uapi/linux/idxd.h

diff --git a/libc/kernel/uapi/linux/idxd.h b/libc/kernel/uapi/linux/idxd.h
index ad9ed48..26f41ab 100644
--- a/libc/kernel/uapi/linux/idxd.h
+++ b/libc/kernel/uapi/linux/idxd.h
@@ -57,6 +57,11 @@
 #define IDXD_OP_FLAG_DRDBK 0x4000
 #define IDXD_OP_FLAG_DSTS 0x8000
 #define IDXD_OP_FLAG_RD_SRC2_AECS 0x010000
+#define IDXD_OP_FLAG_RD_SRC2_2ND 0x020000
+#define IDXD_OP_FLAG_WR_SRC2_AECS_COMP 0x040000
+#define IDXD_OP_FLAG_WR_SRC2_AECS_OVFL 0x080000
+#define IDXD_OP_FLAG_SRC2_STS 0x100000
+#define IDXD_OP_FLAG_CRC_RFC3720 0x200000
 enum dsa_opcode {
   DSA_OPCODE_NOOP = 0,
   DSA_OPCODE_BATCH,
@@ -82,6 +87,18 @@
   IAX_OPCODE_MEMMOVE,
   IAX_OPCODE_DECOMPRESS = 0x42,
   IAX_OPCODE_COMPRESS,
+  IAX_OPCODE_CRC64,
+  IAX_OPCODE_ZERO_DECOMP_32 = 0x48,
+  IAX_OPCODE_ZERO_DECOMP_16,
+  IAX_OPCODE_DECOMP_32 = 0x4c,
+  IAX_OPCODE_DECOMP_16,
+  IAX_OPCODE_SCAN = 0x50,
+  IAX_OPCODE_SET_MEMBER,
+  IAX_OPCODE_EXTRACT,
+  IAX_OPCODE_SELECT,
+  IAX_OPCODE_RLE_BURST,
+  IAX_OPCDE_FIND_UNIQUE,
+  IAX_OPCODE_EXPAND,
 };
 enum dsa_completion_status {
   DSA_COMP_NONE = 0,
@@ -118,6 +135,7 @@
   IAX_COMP_NONE = 0,
   IAX_COMP_SUCCESS,
   IAX_COMP_PAGE_FAULT_IR = 0x04,
+  IAX_COMP_ANALYTICS_ERROR = 0x0a,
   IAX_COMP_OUTBUF_OVERFLOW,
   IAX_COMP_BAD_OPCODE = 0x10,
   IAX_COMP_INVALID_FLAGS,
@@ -138,7 +156,10 @@
   IAX_COMP_WATCHDOG,
   IAX_COMP_INVALID_COMP_FLAG = 0x30,
   IAX_COMP_INVALID_FILTER_FLAG,
-  IAX_COMP_INVALID_NUM_ELEMS = 0x33,
+  IAX_COMP_INVALID_INPUT_SIZE,
+  IAX_COMP_INVALID_NUM_ELEMS,
+  IAX_COMP_INVALID_SRC1_WIDTH,
+  IAX_COMP_INVALID_INVERT_OUT,
 };
 #define DSA_COMP_STATUS_MASK 0x7f
 #define DSA_COMP_STATUS_WRITE 0x80
@@ -291,8 +312,12 @@
   uint32_t output_size;
   uint8_t output_bits;
   uint8_t rsvd3;
-  uint16_t rsvd4;
-  uint64_t rsvd5[4];
+  uint16_t xor_csum;
+  uint32_t crc;
+  uint32_t min;
+  uint32_t max;
+  uint32_t sum;
+  uint64_t rsvd4[2];
 } __attribute__((packed));
 struct iax_raw_completion_record {
   uint64_t field[8];