Update bionic kernel headers using update_all.py

Change-Id: I9c377436e9bf158e7236b3b7dcebf3e79fa961de
diff --git a/libc/kernel/arch-x86/asm/tlbflush_32.h b/libc/kernel/arch-x86/asm/tlbflush_32.h
index 8ebff80..e0ab132 100644
--- a/libc/kernel/arch-x86/asm/tlbflush_32.h
+++ b/libc/kernel/arch-x86/asm/tlbflush_32.h
@@ -7,37 +7,37 @@
  ***   structures, and macros generated from the original header, and thus,
  ***   contains no copyrightable information.
  ***
+ ***   To edit the content of this header, modify the corresponding
+ ***   source file (e.g. under external/kernel-headers/original/) then
+ ***   run bionic/libc/kernel/tools/update_all.py
+ ***
+ ***   Any manual change here will be lost the next time this script will
+ ***   be run. You've been warned!
+ ***
  ****************************************************************************
  ****************************************************************************/
 #ifndef _I386_TLBFLUSH_H
 #define _I386_TLBFLUSH_H
-
 #include <linux/mm.h>
 #include <asm/processor.h>
-
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __flush_tlb() __native_flush_tlb()
 #define __flush_tlb_global() __native_flush_tlb_global()
 #define __flush_tlb_single(addr) __native_flush_tlb_single(addr)
-
 #define __native_flush_tlb()   do {   unsigned int tmpreg;     __asm__ __volatile__(   "movl %%cr3, %0;              \n"   "movl %0, %%cr3;  # flush TLB \n"   : "=r" (tmpreg)   :: "memory");   } while (0)
-
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __native_flush_tlb_global()   do {   unsigned int tmpreg, cr4, cr4_orig;     __asm__ __volatile__(   "movl %%cr4, %2;  # turn off PGE     \n"   "movl %2, %1;                        \n"   "andl %3, %1;                        \n"   "movl %1, %%cr4;                     \n"   "movl %%cr3, %0;                     \n"   "movl %0, %%cr3;  # flush TLB        \n"   "movl %2, %%cr4;  # turn PGE back on \n"   : "=&r" (tmpreg), "=&r" (cr4), "=&r" (cr4_orig)   : "i" (~X86_CR4_PGE)   : "memory");   } while (0)
-
 #define __native_flush_tlb_single(addr)   __asm__ __volatile__("invlpg (%0)" ::"r" (addr) : "memory")
-
 #define __flush_tlb_all()   do {   if (cpu_has_pge)   __flush_tlb_global();   else   __flush_tlb();   } while (0)
-
 #define cpu_has_invlpg (boot_cpu_data.x86 > 3)
-
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __flush_tlb_one(addr)   do {   if (cpu_has_invlpg)   __flush_tlb_single(addr);   else   __flush_tlb();   } while (0)
-
 #define TLB_FLUSH_ALL 0xffffffff
-
 #include <linux/sched.h>
-
 #define flush_tlb() __flush_tlb()
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define flush_tlb_all() __flush_tlb_all()
 #define local_flush_tlb() __flush_tlb()
-
 #define flush_tlb_others(mask, mm, va)   native_flush_tlb_others(&mask, mm, va)
 #endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */