Update to v5.18 kernel headers.
Kernel headers coming from:
Git: https://android.googlesource.com/kernel/common/
Branch: android-mainline
Tag: android-mainline-5.18
Test: Builds.
Test: All bionic unit tests pass on a coral device.
Change-Id: I5700813eec0fb0db55bee4d75b129400b7a239bd
diff --git a/libc/kernel/uapi/misc/fastrpc.h b/libc/kernel/uapi/misc/fastrpc.h
index 62955ec..e82b961 100644
--- a/libc/kernel/uapi/misc/fastrpc.h
+++ b/libc/kernel/uapi/misc/fastrpc.h
@@ -27,11 +27,32 @@
#define FASTRPC_IOCTL_MMAP _IOWR('R', 6, struct fastrpc_req_mmap)
#define FASTRPC_IOCTL_MUNMAP _IOWR('R', 7, struct fastrpc_req_munmap)
#define FASTRPC_IOCTL_INIT_ATTACH_SNS _IO('R', 8)
+#define FASTRPC_IOCTL_MEM_MAP _IOWR('R', 10, struct fastrpc_mem_map)
+#define FASTRPC_IOCTL_MEM_UNMAP _IOWR('R', 11, struct fastrpc_mem_unmap)
+#define FASTRPC_IOCTL_GET_DSP_INFO _IOWR('R', 13, struct fastrpc_ioctl_capability)
+enum fastrpc_map_flags {
+ FASTRPC_MAP_STATIC = 0,
+ FASTRPC_MAP_RESERVED,
+ FASTRPC_MAP_FD = 2,
+ FASTRPC_MAP_FD_DELAYED,
+ FASTRPC_MAP_FD_NOMAP = 16,
+ FASTRPC_MAP_MAX,
+};
+enum fastrpc_proc_attr {
+ FASTRPC_MODE_DEBUG = (1 << 0),
+ FASTRPC_MODE_PTRACE = (1 << 1),
+ FASTRPC_MODE_CRC = (1 << 2),
+ FASTRPC_MODE_UNSIGNED_MODULE = (1 << 3),
+ FASTRPC_MODE_ADAPTIVE_QOS = (1 << 4),
+ FASTRPC_MODE_SYSTEM_PROCESS = (1 << 5),
+ FASTRPC_MODE_PRIVILEGED = (1 << 6),
+};
+#define FASTRPC_ATTR_SECUREMAP (1)
struct fastrpc_invoke_args {
__u64 ptr;
__u64 length;
__s32 fd;
- __u32 reserved;
+ __u32 attr;
};
struct fastrpc_invoke {
__u32 handle;
@@ -57,8 +78,32 @@
__u64 size;
__u64 vaddrout;
};
+struct fastrpc_mem_map {
+ __s32 version;
+ __s32 fd;
+ __s32 offset;
+ __u32 flags;
+ __u64 vaddrin;
+ __u64 length;
+ __u64 vaddrout;
+ __s32 attrs;
+ __s32 reserved[4];
+};
struct fastrpc_req_munmap {
__u64 vaddrout;
__u64 size;
};
+struct fastrpc_mem_unmap {
+ __s32 vesion;
+ __s32 fd;
+ __u64 vaddr;
+ __u64 length;
+ __s32 reserved[5];
+};
+struct fastrpc_ioctl_capability {
+ __u32 domain;
+ __u32 attribute_id;
+ __u32 capability;
+ __u32 reserved[4];
+};
#endif
diff --git a/libc/kernel/uapi/misc/habanalabs.h b/libc/kernel/uapi/misc/habanalabs.h
index 6e3439a..f9e1bb9 100644
--- a/libc/kernel/uapi/misc/habanalabs.h
+++ b/libc/kernel/uapi/misc/habanalabs.h
@@ -24,6 +24,7 @@
#define GAUDI_DRIVER_SRAM_RESERVED_SIZE_FROM_START 0x80
#define GAUDI_FIRST_AVAILABLE_W_S_SYNC_OBJECT 144
#define GAUDI_FIRST_AVAILABLE_W_S_MONITOR 72
+#define TS_MAX_ELEMENTS_NUM (1 << 20)
enum goya_queue_id {
GOYA_QUEUE_ID_DMA_0 = 0,
GOYA_QUEUE_ID_DMA_1 = 1,
@@ -294,6 +295,9 @@
__u8 card_name[HL_INFO_CARD_NAME_MAX_LEN];
__u64 reserved2;
__u64 dram_page_size;
+ __u32 reserved3;
+ __u16 number_of_user_interrupts;
+ __u16 pad2;
};
struct hl_info_dram_usage {
__u64 dram_free_mem;
@@ -512,6 +516,7 @@
#define HL_WAIT_CS_FLAGS_INTERRUPT_MASK 0xFFF00000
#define HL_WAIT_CS_FLAGS_MULTI_CS 0x4
#define HL_WAIT_CS_FLAGS_INTERRUPT_KERNEL_CQ 0x10
+#define HL_WAIT_CS_FLAGS_REGISTER_INTERRUPT 0x20
#define HL_WAIT_MULTI_CS_LIST_MAX_LEN 32
struct hl_wait_cs_in {
union {
@@ -537,6 +542,8 @@
__u64 interrupt_timeout_us;
};
__u64 cq_counters_offset;
+ __u64 timestamp_handle;
+ __u64 timestamp_offset;
};
#define HL_WAIT_CS_STATUS_COMPLETED 0
#define HL_WAIT_CS_STATUS_BUSY 1
@@ -561,6 +568,7 @@
#define HL_MEM_OP_UNMAP 3
#define HL_MEM_OP_MAP_BLOCK 4
#define HL_MEM_OP_EXPORT_DMABUF_FD 5
+#define HL_MEM_OP_TS_ALLOC 6
#define HL_MEM_CONTIGUOUS 0x1
#define HL_MEM_SHARED 0x2
#define HL_MEM_USERPTR 0x4
@@ -569,6 +577,7 @@
union {
struct {
__u64 mem_size;
+ __u64 page_size;
} alloc;
struct {
__u64 handle;
@@ -596,7 +605,7 @@
__u32 op;
__u32 flags;
__u32 ctx_id;
- __u32 pad;
+ __u32 num_of_elements;
};
struct hl_mem_out {
union {