Remove dead code.
We haven't built any of this for years.
Test: treehugger
Change-Id: I3f8a85e9530af68587f47931d850eb60631a9481
diff --git a/README.md b/README.md
index 6bece25..388a139 100644
--- a/README.md
+++ b/README.md
@@ -62,8 +62,6 @@
arch-arm/
arch-arm64/
arch-common/
- arch-mips/
- arch-mips64/
arch-x86/
arch-x86_64/
# Each architecture has its own subdirectory for stuff that isn't shared
diff --git a/docs/32-bit-abi.md b/docs/32-bit-abi.md
index 0ea94d4..81afd14 100644
--- a/docs/32-bit-abi.md
+++ b/docs/32-bit-abi.md
@@ -65,11 +65,11 @@
## `sigset_t` is too small for real-time signals
-On 32-bit Android, `sigset_t` is too small for ARM and x86 (but correct for
-MIPS). This means that there is no support for real-time signals in 32-bit
-code. Android P (API level 28) adds `sigset64_t` and a corresponding function
-for every function that takes a `sigset_t` (so `sigprocmask64` takes a
-`sigset64_t` where `sigprocmask` takes a `sigset_t`).
+On 32-bit Android, `sigset_t` is too small for ARM and x86. This means that
+there is no support for real-time signals in 32-bit code. Android P (API
+level 28) adds `sigset64_t` and a corresponding function for every function
+that takes a `sigset_t` (so `sigprocmask64` takes a `sigset64_t` where
+`sigprocmask` takes a `sigset_t`).
On 32-bit Android, `struct sigaction` is also too small because it contains
a `sigset_t`. We also offer a `struct sigaction64` and `sigaction64` function
diff --git a/libc/Android.bp b/libc/Android.bp
index 92951f7..80b157a 100644
--- a/libc/Android.bp
+++ b/libc/Android.bp
@@ -613,20 +613,6 @@
"upstream-openbsd/lib/libc/string/strncmp.c",
],
},
- mips: {
- exclude_srcs: [
- "upstream-openbsd/lib/libc/string/memchr.c",
- "upstream-openbsd/lib/libc/string/strcpy.c",
- "upstream-openbsd/lib/libc/string/strncmp.c",
- ],
- },
- mips64: {
- exclude_srcs: [
- "upstream-openbsd/lib/libc/string/memchr.c",
- "upstream-openbsd/lib/libc/string/strcpy.c",
- "upstream-openbsd/lib/libc/string/strncmp.c",
- ],
- },
x86: {
exclude_srcs: [
"upstream-openbsd/lib/libc/string/memchr.c",
@@ -886,60 +872,6 @@
],
},
- mips: {
- srcs: [
- "arch-mips/string/memcmp.c",
- "arch-mips/string/memcpy.c",
- "arch-mips/string/memset.S",
- "arch-mips/string/strcmp.S",
- "arch-mips/string/strncmp.S",
- "arch-mips/string/strlen.c",
- "arch-mips/string/strnlen.c",
- "arch-mips/string/strchr.c",
- "arch-mips/string/strcpy.c",
- "arch-mips/string/memchr.c",
- "arch-mips/string/memmove.c",
-
- "arch-mips/bionic/__bionic_clone.S",
- "arch-mips/bionic/cacheflush.cpp",
- "arch-mips/bionic/_exit_with_stack_teardown.S",
- "arch-mips/bionic/libcrt_compat.c",
- "arch-mips/bionic/setjmp.S",
- "arch-mips/bionic/syscall.S",
- "arch-mips/bionic/vfork.S",
- ],
- exclude_srcs: [
- "bionic/strchr.cpp",
- "bionic/strnlen.c",
- ],
- },
- mips64: {
- srcs: [
- "arch-mips/string/memcmp.c",
- "arch-mips/string/memcpy.c",
- "arch-mips/string/memset.S",
- "arch-mips/string/strcmp.S",
- "arch-mips/string/strncmp.S",
- "arch-mips/string/strlen.c",
- "arch-mips/string/strnlen.c",
- "arch-mips/string/strchr.c",
- "arch-mips/string/strcpy.c",
- "arch-mips/string/memchr.c",
- "arch-mips/string/memmove.c",
-
- "arch-mips64/bionic/__bionic_clone.S",
- "arch-mips64/bionic/_exit_with_stack_teardown.S",
- "arch-mips64/bionic/setjmp.S",
- "arch-mips64/bionic/syscall.S",
- "arch-mips64/bionic/vfork.S",
- "arch-mips64/bionic/stat.cpp",
- ],
- exclude_srcs: [
- "bionic/strchr.cpp",
- "bionic/strnlen.c",
- ],
- },
-
x86: {
srcs: [
"arch-x86/generic/string/memcmp.S",
@@ -1990,12 +1922,6 @@
defaults: ["crt_defaults"],
arch: {
- mips: {
- cflags: ["-fPIC"],
- },
- mips64: {
- cflags: ["-fPIC"],
- },
x86: {
cflags: ["-fPIC"],
},
@@ -2050,26 +1976,6 @@
name: "crtbegin_static1",
local_include_dirs: ["include"],
srcs: ["arch-common/bionic/crtbegin.c"],
-
- arch: {
- mips: {
- srcs: [
- "arch-mips/bionic/crtbegin.c",
- ],
- exclude_srcs: [
- "arch-common/bionic/crtbegin.c",
- ],
- },
- mips64: {
- srcs: [
- "arch-mips64/bionic/crtbegin.c",
- ],
- exclude_srcs: [
- "arch-common/bionic/crtbegin.c",
- ],
- },
- },
-
defaults: ["crt_defaults"],
}
@@ -2087,25 +1993,6 @@
name: "crtbegin_dynamic1",
local_include_dirs: ["include"],
srcs: ["arch-common/bionic/crtbegin.c"],
-
- arch: {
- mips: {
- srcs: [
- "arch-mips/bionic/crtbegin.c",
- ],
- exclude_srcs: [
- "arch-common/bionic/crtbegin.c",
- ],
- },
- mips64: {
- srcs: [
- "arch-mips64/bionic/crtbegin.c",
- ],
- exclude_srcs: [
- "arch-common/bionic/crtbegin.c",
- ],
- },
- },
defaults: ["crt_defaults"],
}
diff --git a/libc/NOTICE b/libc/NOTICE
index ef61ec1..8245ff8 100644
--- a/libc/NOTICE
+++ b/libc/NOTICE
@@ -2568,38 +2568,6 @@
-------------------------------------------------------------------
-Copyright (c) 1991, 1993, 1995,
- The Regents of the University of California. All rights reserved.
-
-This code is derived from software contributed to Berkeley by
-Havard Eidnes.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-1. Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
-2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-3. Neither the name of the University nor the names of its contributors
- may be used to endorse or promote products derived from this software
- without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-SUCH DAMAGE.
-
--------------------------------------------------------------------
-
Copyright (c) 1992 Henry Spencer.
Copyright (c) 1992, 1993
The Regents of the University of California. All rights reserved.
@@ -2727,38 +2695,6 @@
Copyright (c) 1992, 1993
The Regents of the University of California. All rights reserved.
-This code is derived from software contributed to Berkeley by
-Ralph Campbell.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-1. Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
-2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-3. Neither the name of the University nor the names of its contributors
- may be used to endorse or promote products derived from this software
- without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-SUCH DAMAGE.
-
--------------------------------------------------------------------
-
-Copyright (c) 1992, 1993
- The Regents of the University of California. All rights reserved.
-
This software was developed by the Computer Systems Engineering group
at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and
contributed to Berkeley.
@@ -3522,34 +3458,6 @@
-------------------------------------------------------------------
-Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-1. Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
-2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-3. Neither the name of Opsycon AB nor the names of its contributors
- may be used to endorse or promote products derived from this software
- without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
-OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
-WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
-DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-SUCH DAMAGE.
-
--------------------------------------------------------------------
-
Copyright (c) 2001-2011 The FreeBSD Project.
All rights reserved.
@@ -5400,35 +5308,6 @@
-------------------------------------------------------------------
-Copyright (c) 2013
- MIPS Technologies, Inc., California.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-1. Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
-2. Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer in the
- documentation and/or other materials provided with the distribution.
-3. Neither the name of the MIPS Technologies, Inc., nor the names of its
- contributors may be used to endorse or promote products derived from
- this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
-ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
-ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
-FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
-OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
-HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
-LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
-OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
-SUCH DAMAGE.
-
--------------------------------------------------------------------
-
Copyright (c) 2013 ARM Ltd
All rights reserved.
@@ -5781,38 +5660,6 @@
-------------------------------------------------------------------
-Copyright (c) 2017 Imagination Technologies.
-
-All rights reserved.
-
-Redistribution and use in source and binary forms, with or without
-modification, are permitted provided that the following conditions
-are met:
-
- * Redistributions of source code must retain the above copyright
- notice, this list of conditions and the following disclaimer.
- * Redistributions in binary form must reproduce the above copyright
- notice, this list of conditions and the following disclaimer
- in the documentation and/or other materials provided with
- the distribution.
- * Neither the name of Imagination Technologies nor the names of its
- contributors may be used to endorse or promote products derived
- from this software without specific prior written permission.
-
-THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
-"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
-LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
-A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
-OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
-SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
-LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
-DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
-THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
-(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-
--------------------------------------------------------------------
-
Copyright (c)1999 Citrus Project,
All rights reserved.
diff --git a/libc/arch-mips/bionic/__bionic_clone.S b/libc/arch-mips/bionic/__bionic_clone.S
deleted file mode 100644
index b6056f2..0000000
--- a/libc/arch-mips/bionic/__bionic_clone.S
+++ /dev/null
@@ -1,71 +0,0 @@
-/*
- * Copyright (C) 2008 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-
-// pid_t __bionic_clone(int flags, void* child_stack, pid_t* parent_tid, void* tls, pid_t* child_tid, int (*fn)(void*), void* arg);
-ENTRY_PRIVATE(__bionic_clone)
- .set noreorder
- .cpload $t9
- .set reorder
-
- # set up child stack
- subu $a1,16
- lw $t0,20($sp) # fn
- lw $t1,24($sp) # arg
- sw $t0,0($a1) # fn
- sw $t1,4($a1) # arg
-
- # remainder of arguments are correct for clone system call
- li $v0,__NR_clone
- syscall
-
- bnez $a3,.L__error_bc
-
- beqz $v0,.L__thread_start_bc
-
- j $ra
-
-.L__thread_start_bc:
- # Clear return address in child so we don't unwind further.
- li $ra,0
-
- lw $a0,0($sp) # fn
- lw $a1,4($sp) # arg
-
- # void __start_thread(int (*func)(void*), void *arg)
- la $t9,__start_thread
- j $t9
-
-.L__error_bc:
- move $a0,$v0
- la $t9,__set_errno_internal
- j $t9
-END(__bionic_clone)
diff --git a/libc/arch-mips/bionic/_exit_with_stack_teardown.S b/libc/arch-mips/bionic/_exit_with_stack_teardown.S
deleted file mode 100644
index 566b1c8..0000000
--- a/libc/arch-mips/bionic/_exit_with_stack_teardown.S
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright (C) 2008 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-
-// void _exit_with_stack_teardown(void* stackBase, size_t stackSize)
-ENTRY_PRIVATE(_exit_with_stack_teardown)
- li $v0, __NR_munmap
- syscall
- // If munmap failed, we ignore the failure and exit anyway.
-
- li $a0, 0
- li $v0, __NR_exit
- syscall
- // The exit syscall does not return.
-END(_exit_with_stack_teardown)
diff --git a/libc/arch-mips/bionic/cacheflush.cpp b/libc/arch-mips/bionic/cacheflush.cpp
deleted file mode 100644
index 380ad90..0000000
--- a/libc/arch-mips/bionic/cacheflush.cpp
+++ /dev/null
@@ -1,64 +0,0 @@
-/*
- * Copyright (C) 2008 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <unistd.h>
-#include <sys/cachectl.h>
-
-#include <async_safe/log.h>
-
-// Linux historically defines a cacheflush(3) routine for MIPS
-// with this signature:
-
-// int cacheflush(char *addr, int nbytes, int cache);
-
-// Android defines an alternate cacheflush routine which exposes the
-// ARM system call interface:
-
-// int cacheflush (long start, long end, long flags)
-
-// This is an attempt to maintain compatibility between the historical MIPS
-// usage for software previously ported to MIPS and Android specific
-// uses of cacheflush().
-
-int cacheflush(long start, long end, long /*flags*/) {
- if (end < start) {
- // It looks like this is really a MIPS-style cacheflush call.
- static bool warned = false;
- if (!warned) {
- async_safe_format_log(ANDROID_LOG_WARN, "libc",
- "cacheflush called with (start,len) instead of (start,end)");
- warned = true;
- }
- end += start;
- }
-
- // Use the GCC builtin. This will generate inline synci instructions if available,
- // or call _flush_cache(start, len, BCACHE) directly.
- __builtin___clear_cache(reinterpret_cast<char*>(start), reinterpret_cast<char*>(end));
- return 0;
-}
diff --git a/libc/arch-mips/bionic/crtbegin.c b/libc/arch-mips/bionic/crtbegin.c
deleted file mode 100644
index d72ec7b..0000000
--- a/libc/arch-mips/bionic/crtbegin.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include "../../bionic/libc_init_common.h"
-#include <stddef.h>
-#include <stdint.h>
-
-__attribute__ ((section (".preinit_array")))
-void (*__PREINIT_ARRAY__)(void) = (void (*)(void)) -1;
-
-__attribute__ ((section (".init_array")))
-void (*__INIT_ARRAY__)(void) = (void (*)(void)) -1;
-
-__attribute__ ((section (".fini_array")))
-void (*__FINI_ARRAY__)(void) = (void (*)(void)) -1;
-
-
-__LIBC_HIDDEN__ void do_mips_start(void *raw_args) {
- structors_array_t array;
- array.preinit_array = &__PREINIT_ARRAY__;
- array.init_array = &__INIT_ARRAY__;
- array.fini_array = &__FINI_ARRAY__;
-
- __libc_init(raw_args, NULL, &main, &array);
-}
-
-/*
- * This function prepares the return address with a branch-and-link
- * instruction (bal) and then uses a .cpload to compute the Global
- * Offset Table (GOT) pointer ($gp). The $gp is then used to load
- * the address of _do_start() into $t9 just before calling it.
- * Terminating the stack with a NULL return address.
- */
-__asm__ (
-" .set push \n"
-" \n"
-" .text \n"
-" .align 4 \n"
-" .type __start,@function \n"
-" .globl __start \n"
-" .globl _start \n"
-" \n"
-" .ent __start \n"
-"__start: \n"
-" _start: \n"
-" .frame $sp,32,$ra \n"
-" .mask 0x80000000,-4 \n"
-" \n"
-" .set noreorder \n"
-" bal 1f \n"
-" nop \n"
-"1: \n"
-" .cpload $ra \n"
-" .set reorder \n"
-" \n"
-" move $a0, $sp \n"
-" addiu $sp, $sp, (-32) \n"
-" sw $0, 28($sp) \n"
-" la $t9, do_mips_start \n"
-" jalr $t9 \n"
-" \n"
-"2: b 2b \n"
-" .end __start \n"
-" \n"
-" .set pop \n"
-);
-
-#include "../../arch-common/bionic/__dso_handle.h"
-#include "../../arch-common/bionic/atexit.h"
-#include "../../arch-common/bionic/pthread_atfork.h"
diff --git a/libc/arch-mips/bionic/libcrt_compat.c b/libc/arch-mips/bionic/libcrt_compat.c
deleted file mode 100644
index cfa41f2..0000000
--- a/libc/arch-mips/bionic/libcrt_compat.c
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright (C) 2016 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-extern char __divdi3;
-extern char __moddi3;
-extern char __popcountsi2;
-extern char __udivdi3;
-extern char __umoddi3;
-
-void* __bionic_libcrt_compat_symbols[] = {
- &__divdi3,
- &__moddi3,
- &__popcountsi2,
- &__udivdi3,
- &__umoddi3,
-};
diff --git a/libc/arch-mips/bionic/setjmp.S b/libc/arch-mips/bionic/setjmp.S
deleted file mode 100644
index ffe3665..0000000
--- a/libc/arch-mips/bionic/setjmp.S
+++ /dev/null
@@ -1,418 +0,0 @@
-/*
- * Copyright (C) 2014 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-/*
- * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com)
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of Opsycon AB nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
- * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- */
-/*-
- * Copyright (c) 1991, 1993, 1995,
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Havard Eidnes.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-/*
- * Copyright (c) 1992, 1993
- * The Regents of the University of California. All rights reserved.
- *
- * This code is derived from software contributed to Berkeley by
- * Ralph Campbell.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the University nor the names of its contributors
- * may be used to endorse or promote products derived from this software
- * without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * @(#)signal.h 8.1 (Berkeley) 6/10/93
- */
-
-#include <private/bionic_asm.h>
-
-/* jmpbuf is declared to users as an array of longs, which is only
- * 4-byte aligned in 32-bit builds. The Mips jmpbuf begins with a
- * dynamically-sized 0- or 4-byte unused filler so that double-prec FP regs
- * are saved to 8-byte-aligned mem cells.
- * All the following jmpbuf offsets are from the rounded-DOWN base addr.
- */
-
-/* Fields of same size on all MIPS abis: */
-/* field: byte offset: size: */
-/* dynam filler (0*4) 0-4 bytes of rounddown filler, DON'T TOUCH!!
- often overlays user storage!! */
-#define SC_FPSR_OFFSET (1*4) /* 4 bytes, floating point control/status reg */
-/* following fields are 8-byte aligned */
-#define SC_FLAG_OFFSET (2*4) /* 8 bytes, cookie and savesigs flag, first actual field */
-#define SC_MASK_OFFSET (4*4) /* 16 bytes, mips32/mips64 version of sigset_t */
-#define SC_CKSUM_OFFSET (8*4) /* 8 bytes, used for checksum */
-
-/* Registers that are 4-byte on mips32 o32, and 8-byte on mips64 n64 abi */
-#define SC_REGS_OFFSET (10*4) /* SC_REGS_BYTES */
-#define SC_REGS_SAVED 12 /*regs*/ /* ra,s0-s8,gp,sp */
-#define SC_REGS_BYTES (SC_REGS_SAVED*REGSZ)
-#define SC_REGS SC_REGS_OFFSET
-
-/* Double floating pt registers are 8-bytes on all abis,
- * but the number of saved fp regs varies for o32/n32 versus n64 abis:
- */
-
-#ifdef __LP64__
-#define SC_FPREGS_SAVED 8 /* all fp regs f24,f25,f26,f27,f28,f29,f30,f31 */
-#else
-#define SC_FPREGS_SAVED 6 /* even fp regs f20,f22,f24,f26,f28,f30 */
-#endif
-
-#define SC_FPREGS_OFFSET (SC_REGS_OFFSET + SC_REGS_BYTES) /* SC_FPREGS_BYTES */
-#define SC_FPREGS_BYTES (SC_FPREGS_SAVED*REGSZ_FP)
-#define SC_FPREGS SC_FPREGS_OFFSET
-
-#define SC_TOTAL_BYTES (SC_FPREGS_OFFSET + SC_FPREGS_BYTES)
-#define SC_TOTAL_LONGS (SC_TOTAL_BYTES/REGSZ)
-
-#define USE_CHECKSUM 1
-
-.macro m_mangle_reg_and_store reg, cookie, temp, offset
- xor \temp, \reg, \cookie
- REG_S \temp, \offset
-.endm
-
-.macro m_unmangle_reg_and_load reg, cookie, temp, offset
- REG_L \temp, \offset
- xor \reg, \temp, \cookie
-.endm
-
-.macro m_calculate_checksum dst, src, scratch
- REG_L \dst, REGSZ(\src)
-#ifdef __LP64__
- /* 64 bit: checksum offset is 4 (actual _JBLEN is 25) */
- .irp i,2,3,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24
-#else
- /* 32 bit: checksum offset is 8 (actual _JBLEN is 34) */
- .irp i,2,3,4,5,6,7,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33
-#endif
- REG_L \scratch, \i*REGSZ(\src)
- xor \dst, \dst, \scratch
- .endr
-.endm
-
-/*
- *
- * GPOFF and FRAMESIZE must be the same for all setjmp/longjmp routines
- *
- */
-
-FRAMESZ= MKFSIZ(2,6)
-A1OFF= FRAMESZ-4*REGSZ
-A0OFF= FRAMESZ-3*REGSZ
-GPOFF= FRAMESZ-2*REGSZ
-RAOFF= FRAMESZ-1*REGSZ
-
-NON_LEAF(sigsetjmp, FRAMESZ, $ra)
-__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(sigsetjmp)
- .mask 0x80000000, RAOFF
- PTR_SUBU $sp, FRAMESZ # allocate stack frame
- SETUP_GP64(GPOFF, sigsetjmp)
- SAVE_GP(GPOFF)
- .set reorder
-
-setjmp_common:
-#ifndef __LP64__
- li $t0, ~7
- and $a0, $t0 # round jmpbuf addr DOWN to 8-byte boundary
-#endif
- REG_S $ra, RAOFF($sp) # spill state
- REG_S $a0, A0OFF($sp)
-
- # get the cookie and store it along with the signal flag.
- move $a0, $a1
- jal __bionic_setjmp_cookie_get
- REG_L $a0, A0OFF($sp)
-
- REG_S $v0, SC_FLAG_OFFSET($a0) # save cookie and savesigs flag
- andi $t0, $v0, 1 # extract savesigs flag
-
- beqz $t0, 1f # do saving of signal mask?
-
- # call sigprocmask(int how ignored, sigset_t* null, sigset_t* SC_MASK(a0)):
- LA $a2, SC_MASK_OFFSET($a0) # gets current signal mask
- li $a0, 0 # how; ignored when new mask is null
- li $a1, 0 # null new mask
- jal sigprocmask # get current signal mask
- REG_L $a0, A0OFF($sp)
-1:
- REG_L $gp, GPOFF($sp) # restore spills
- REG_L $ra, RAOFF($sp)
- REG_L $t0, SC_FLAG_OFFSET($a0) # move cookie to temp reg
-
- # callee-saved long-sized regs:
- PTR_ADDU $v1, $sp, FRAMESZ # save orig sp
-
- # m_mangle_reg_and_store reg, cookie, temp, offset
- m_mangle_reg_and_store $ra, $t0, $t1, SC_REGS+0*REGSZ($a0)
- m_mangle_reg_and_store $s0, $t0, $t2, SC_REGS+1*REGSZ($a0)
- m_mangle_reg_and_store $s1, $t0, $t3, SC_REGS+2*REGSZ($a0)
- m_mangle_reg_and_store $s2, $t0, $t1, SC_REGS+3*REGSZ($a0)
- m_mangle_reg_and_store $s3, $t0, $t2, SC_REGS+4*REGSZ($a0)
- m_mangle_reg_and_store $s4, $t0, $t3, SC_REGS+5*REGSZ($a0)
- m_mangle_reg_and_store $s5, $t0, $t1, SC_REGS+6*REGSZ($a0)
- m_mangle_reg_and_store $s6, $t0, $t2, SC_REGS+7*REGSZ($a0)
- m_mangle_reg_and_store $s7, $t0, $t3, SC_REGS+8*REGSZ($a0)
- m_mangle_reg_and_store $s8, $t0, $t1, SC_REGS+9*REGSZ($a0)
- m_mangle_reg_and_store $gp, $t0, $t2, SC_REGS+10*REGSZ($a0)
- m_mangle_reg_and_store $v1, $t0, $t3, SC_REGS+11*REGSZ($a0)
-
- cfc1 $v0, $31
-
-#ifdef __LP64__
- # callee-saved fp regs on mips n64 ABI are $f24..$f31
- s.d $f24, SC_FPREGS+0*REGSZ_FP($a0)
- s.d $f25, SC_FPREGS+1*REGSZ_FP($a0)
- s.d $f26, SC_FPREGS+2*REGSZ_FP($a0)
- s.d $f27, SC_FPREGS+3*REGSZ_FP($a0)
- s.d $f28, SC_FPREGS+4*REGSZ_FP($a0)
- s.d $f29, SC_FPREGS+5*REGSZ_FP($a0)
- s.d $f30, SC_FPREGS+6*REGSZ_FP($a0)
- s.d $f31, SC_FPREGS+7*REGSZ_FP($a0)
-#else
- # callee-saved fp regs on mips o32 ABI are
- # the even-numbered double fp regs $f20,$f22,...$f30
- s.d $f20, SC_FPREGS+0*REGSZ_FP($a0)
- s.d $f22, SC_FPREGS+1*REGSZ_FP($a0)
- s.d $f24, SC_FPREGS+2*REGSZ_FP($a0)
- s.d $f26, SC_FPREGS+3*REGSZ_FP($a0)
- s.d $f28, SC_FPREGS+4*REGSZ_FP($a0)
- s.d $f30, SC_FPREGS+5*REGSZ_FP($a0)
-#endif
- sw $v0, SC_FPSR_OFFSET($a0)
-#if USE_CHECKSUM
- m_calculate_checksum $t0, $a0, $t1
- REG_S $t0, SC_CKSUM_OFFSET($a0)
-#endif
- move $v0, $zero
- RESTORE_GP64
- PTR_ADDU $sp, FRAMESZ
- j $ra
-END(sigsetjmp)
-
-
-# Alternate entry points:
-
-NON_LEAF(setjmp, FRAMESZ, $ra)
-__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(setjmp)
- .mask 0x80000000, RAOFF
- PTR_SUBU $sp, FRAMESZ
- SETUP_GP64(GPOFF, setjmp) # can't share sigsetjmp's gp code
- SAVE_GP(GPOFF)
- .set reorder
-
- li $a1, 1 # save/restore signals state
- b setjmp_common # tail call
-END(setjmp)
-
-
-NON_LEAF(_setjmp, FRAMESZ, $ra)
-__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(_setjmp)
- .mask 0x80000000, RAOFF
- PTR_SUBU $sp, FRAMESZ
- SETUP_GP64(GPOFF, _setjmp) # can't share sigsetjmp's gp code
- SAVE_GP(GPOFF)
- .set reorder
-
- li $a1, 0 # don't save/restore signals
- b setjmp_common # tail call
-END(_setjmp)
-
-
-NON_LEAF(siglongjmp, FRAMESZ, $ra)
-__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(siglongjmp)
- .mask 0x80000000, RAOFF
- PTR_SUBU $sp, FRAMESZ
- SETUP_GP64(GPOFF, siglongjmp)
- SAVE_GP(GPOFF)
- .set reorder
-
-#ifndef __LP64__
- li $t0, ~7
- and $a0, $t0 # round jmpbuf addr DOWN to 8-byte boundary
-#endif
-
- move $s1, $a1 # temp spill
- move $s0, $a0
-
-#if USE_CHECKSUM
- m_calculate_checksum $t0, $s0, $s2
- REG_L $s2, SC_CKSUM_OFFSET($s0)
- beq $t0, $s2, 0f
- nop
- jal __bionic_setjmp_checksum_mismatch
- nop
-0:
-#endif
-
- # extract savesigs flag
- REG_L $s2, SC_FLAG_OFFSET($s0)
- andi $t0, $s2, 1
- beqz $t0, 1f # restore signal mask?
-
- # call sigprocmask(int how SIG_SETMASK, sigset_t* SC_MASK(a0), sigset_t* null):
- LA $a1, SC_MASK_OFFSET($s0) # signals being restored
- li $a0, 3 # mips SIG_SETMASK
- li $a2, 0 # null
- jal sigprocmask # restore signal mask
-1:
- move $t0, $s2 # get cookie to temp reg
- move $a1, $s1
- move $a0, $s0
-
- # callee-saved long-sized regs:
-
- # m_unmangle_reg_and_load reg, cookie, temp, offset
- # don't restore gp yet, old value is needed for cookie_check call
- m_unmangle_reg_and_load $ra, $t0, $t1, SC_REGS+0*REGSZ($a0)
- m_unmangle_reg_and_load $s0, $t0, $t2, SC_REGS+1*REGSZ($a0)
- m_unmangle_reg_and_load $s1, $t0, $t3, SC_REGS+2*REGSZ($a0)
- m_unmangle_reg_and_load $s2, $t0, $t1, SC_REGS+3*REGSZ($a0)
- m_unmangle_reg_and_load $s3, $t0, $t2, SC_REGS+4*REGSZ($a0)
- m_unmangle_reg_and_load $s4, $t0, $t3, SC_REGS+5*REGSZ($a0)
- m_unmangle_reg_and_load $s5, $t0, $t1, SC_REGS+6*REGSZ($a0)
- m_unmangle_reg_and_load $s6, $t0, $t2, SC_REGS+7*REGSZ($a0)
- m_unmangle_reg_and_load $s7, $t0, $t3, SC_REGS+8*REGSZ($a0)
- m_unmangle_reg_and_load $s8, $t0, $t1, SC_REGS+9*REGSZ($a0)
- m_unmangle_reg_and_load $v1, $t0, $t2, SC_REGS+10*REGSZ($a0)
- m_unmangle_reg_and_load $sp, $t0, $t3, SC_REGS+11*REGSZ($a0)
-
- lw $v0, SC_FPSR_OFFSET($a0)
- ctc1 $v0, $31 # restore old fr mode before fp values
-#ifdef __LP64__
- # callee-saved fp regs on mips n64 ABI are $f24..$f31
- l.d $f24, SC_FPREGS+0*REGSZ_FP($a0)
- l.d $f25, SC_FPREGS+1*REGSZ_FP($a0)
- l.d $f26, SC_FPREGS+2*REGSZ_FP($a0)
- l.d $f27, SC_FPREGS+3*REGSZ_FP($a0)
- l.d $f28, SC_FPREGS+4*REGSZ_FP($a0)
- l.d $f29, SC_FPREGS+5*REGSZ_FP($a0)
- l.d $f30, SC_FPREGS+6*REGSZ_FP($a0)
- l.d $f31, SC_FPREGS+7*REGSZ_FP($a0)
-#else
- # callee-saved fp regs on mips o32 ABI are
- # the even-numbered double fp regs $f20,$f22,...$f30
- l.d $f20, SC_FPREGS+0*REGSZ_FP($a0)
- l.d $f22, SC_FPREGS+1*REGSZ_FP($a0)
- l.d $f24, SC_FPREGS+2*REGSZ_FP($a0)
- l.d $f26, SC_FPREGS+3*REGSZ_FP($a0)
- l.d $f28, SC_FPREGS+4*REGSZ_FP($a0)
- l.d $f30, SC_FPREGS+5*REGSZ_FP($a0)
-#endif
-
- # check cookie
- PTR_SUBU $sp, FRAMESZ
- REG_S $v1, GPOFF($sp)
- REG_S $ra, RAOFF($sp)
- REG_S $a1, A1OFF($sp)
- move $a0, $t0
- jal __bionic_setjmp_cookie_check
- REG_L $gp, GPOFF($sp)
- REG_L $ra, RAOFF($sp)
- REG_L $a1, A1OFF($sp)
- PTR_ADDU $sp, FRAMESZ
-
- sltiu $t0, $a1, 1 # never return 0!
- xor $v0, $a1, $t0
- j $ra # return to setjmp call site
-END(siglongjmp)
-
-ALIAS_SYMBOL(longjmp, siglongjmp)
-__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(longjmp)
-ALIAS_SYMBOL(_longjmp, siglongjmp)
-__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(_longjmp)
diff --git a/libc/arch-mips/bionic/syscall.S b/libc/arch-mips/bionic/syscall.S
deleted file mode 100644
index 857bbab..0000000
--- a/libc/arch-mips/bionic/syscall.S
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-
-/*
- * The caller is only required to allocate 16 bytes of stack for a0-a3.
- * syscall has up to 6 arguments, so we need space for the extra two arguments.
- */
-#define STACKSIZE 2*4
-
-ENTRY(syscall)
- .set noreorder
- .cpload $t9
- move $v0, $a0
- move $a0, $a1
- move $a1, $a2
- move $a2, $a3
- lw $a3, 16($sp)
- lw $t0, 20($sp)
- lw $t1, 24($sp)
- subu $sp, STACKSIZE
- sw $t0, 16($sp)
- sw $t1, 20($sp)
- syscall
- addu $sp, STACKSIZE
- bnez $a3, 1f
- move $a0, $v0
- j $ra
- nop
-1:
- la $t9, __set_errno_internal
- j $t9
- nop
- .set reorder
-END(syscall)
diff --git a/libc/arch-mips/bionic/vfork.S b/libc/arch-mips/bionic/vfork.S
deleted file mode 100644
index c4f67c6..0000000
--- a/libc/arch-mips/bionic/vfork.S
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Copyright (C) 2008 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <linux/sched.h>
-
-// TODO: mips' uapi signal.h is missing #ifndef __ASSEMBLY__.
-// #include <asm/signal.h>
-#define SIGCHLD 18
-
-ENTRY(vfork)
-__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(vfork)
- .set noreorder
- .cpload $t9
-
- // __get_tls()[TLS_SLOT_THREAD_ID]->cached_pid_ = 0
- .set push
- .set mips32r2
- rdhwr $v0, $29 // v0 = tls; kernel trap on mips32r1
- .set pop
- lw $v0, REGSZ*1($v0) // v0 = v0[TLS_SLOT_THREAD_ID ie 1]
- sw $0, REGSZ*2+4($v0) // v0->cached_pid_ = 0
-
- li $a0, (CLONE_VM | CLONE_VFORK | SIGCHLD)
- li $a1, 0
- li $a2, 0
- li $a3, 0
- subu $sp, 8
- sw $0, 16($sp)
- li $v0, __NR_clone
- syscall
- addu $sp, 8
- bnez $a3, 1f
- move $a0, $v0
-
- j $ra
- nop
-1:
- la $t9, __set_errno_internal
- j $t9
- nop
-END(vfork)
diff --git a/libc/arch-mips/string/memchr.c b/libc/arch-mips/string/memchr.c
deleted file mode 100644
index bc24f79..0000000
--- a/libc/arch-mips/string/memchr.c
+++ /dev/null
@@ -1,185 +0,0 @@
-/*
- * Copyright (c) 2017 Imagination Technologies.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer
- * in the documentation and/or other materials provided with
- * the distribution.
- * * Neither the name of Imagination Technologies nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-#include <string.h>
-
-#define ENABLE_PREFETCH 1
-#define op_t unsigned long int
-#define op_size sizeof (op_t)
-
-#if ENABLE_PREFETCH
-#define PREFETCH(addr) __builtin_prefetch (addr, 0, 1);
-#else
-#define PREFETCH(addr)
-#endif
-
-#if __mips64 || __mips_isa_rev >= 2
-static inline void * __attribute__ ((always_inline))
-do_bytes (const op_t* w, op_t inval)
-{
- const unsigned char *p = (const unsigned char *) w;
- op_t outval = 0;
-#if __mips64
- __asm__ volatile (
- "dsbh %1, %0 \n\t"
- "dshd %0, %1 \n\t"
- "dclz %1, %0 \n\t"
- : "+r" (inval), "+r" (outval)
- );
-#else
- __asm__ volatile (
- "wsbh %1, %0 \n\t"
- "rotr %0, %1, 16 \n\t"
- "clz %1, %0 \n\t"
- : "+r" (inval), "+r" (outval)
- );
-#endif
- p += (outval >> 3);
- return (void *) p;
-}
-
-#define DO_WORD(in, val) { \
- op_t tmp = ((val - mask_1) & ~val) & mask_128; \
- if (tmp != 0) \
- return do_bytes(in, tmp); \
-}
-#else
-static inline void * __attribute__ ((always_inline))
-do_bytes (const op_t* w, unsigned char ch)
-{
- const unsigned char *p = (const unsigned char *) w;
- for (; *p != ch; ++p);
- return (void *) p;
-}
-
-#define DO_WORD(in, val) { \
- op_t tmp = ((val - mask_1) & ~val) & mask_128; \
- if (tmp != 0) \
- return do_bytes(in, ch); \
-}
-#endif
-
-#define DO_WORDS(w) { \
- op_t* w1 = (op_t*) w; \
- op_t val0 = w1[0] ^ mask_c; \
- op_t val1 = w1[1] ^ mask_c; \
- op_t val2 = w1[2] ^ mask_c; \
- op_t val3 = w1[3] ^ mask_c; \
- DO_WORD(w1, val0) \
- DO_WORD(w1 + 1, val1) \
- DO_WORD(w1 + 2, val2) \
- DO_WORD(w1 + 3, val3) \
-}
-
-void *
-memchr (void const *s, int c_in, size_t n)
-{
- if (n != 0) {
- const unsigned char *p = (const unsigned char *) s;
- const op_t *w;
- op_t mask_1, mask_128, mask_c;
- unsigned char ch = (unsigned char) c_in;
-
- /*
- * Check bytewize till initial alignment
- */
- for (; n > 0 && ((size_t) p % op_size) != 0; --n, ++p) {
- if (*p == ch)
- return (void *) p;
- }
-
- w = (const op_t *) p;
-
- mask_c = ch | (ch << 8);
- mask_c |= mask_c << 16;
- __asm__ volatile (
- "li %0, 0x01010101 \n\t"
- : "=r" (mask_1)
- );
-#if __mips64
- mask_1 |= mask_1 << 32;
- mask_c |= mask_c << 32;
-#endif
- mask_128 = mask_1 << 7;
-
- /*
- * Check op_size byteswize after initial alignment
- */
-#if ((_MIPS_SIM == _ABIO32) || _MIPS_TUNE_I6400)
- PREFETCH (w);
- PREFETCH (w + 8);
- while (n >= 24 * op_size) {
- PREFETCH(w + 16);
- DO_WORDS(w);
- DO_WORDS(w + 4);
- w += 8;
- n -= 8 * op_size;
- }
- while (n >= 8 * op_size) {
- DO_WORDS(w);
- DO_WORDS(w + 4);
- w += 8;
- n -= 8 * op_size;
- }
-#else
- PREFETCH (w);
- PREFETCH (w + 4);
- while (n >= 12 * op_size) {
- PREFETCH(w + 8);
- DO_WORDS(w);
- w += 4;
- n -= 4 * op_size;
- }
- while (n >= 4 * op_size) {
- DO_WORDS(w);
- w += 4;
- n -= 4 * op_size;
- }
-#endif
-
- while (n >= op_size) {
- op_t val = *w ^ mask_c;
- DO_WORD(w, val);
- w++;
- n -= op_size;
- }
-
- /*
- * Check bytewize for remaining bytes
- */
- p = (const unsigned char *) w;
- for (; n > 0; --n, ++p) {
- if (*p == ch)
- return (void *) p;
- }
- }
- return NULL;
-}
diff --git a/libc/arch-mips/string/memcmp.c b/libc/arch-mips/string/memcmp.c
deleted file mode 100644
index eb4ad07..0000000
--- a/libc/arch-mips/string/memcmp.c
+++ /dev/null
@@ -1,352 +0,0 @@
-/*
- * Copyright (c) 2017 Imagination Technologies.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer
- * in the documentation and/or other materials provided with
- * the distribution.
- * * Neither the name of Imagination Technologies nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <string.h>
-#include <stdint.h>
-
-#define ENABLE_PREFETCH 1
-
-#define STRNG(X) #X
-#define PREFETCH(src_ptr, offset) \
- asm("pref 0, " STRNG(offset) "(%[src]) \n\t" : : [src] "r" (src_ptr));
-
-#if !defined(UNALIGNED_INSTR_SUPPORT)
-/* does target have unaligned lw/ld/ualw/uald instructions? */
-#define UNALIGNED_INSTR_SUPPORT 0
-#if __mips_isa_rev < 6 && !__mips1
-#undef UNALIGNED_INSTR_SUPPORT
-#define UNALIGNED_INSTR_SUPPORT 1
-#endif
-#endif
-
-#if !defined(HW_UNALIGNED_SUPPORT)
-/* Does target have hardware support for unaligned accesses? */
-#define HW_UNALIGNED_SUPPORT 0
-#if __mips_isa_rev >= 6
-#undef HW_UNALIGNED_SUPPORT
-#define HW_UNALIGNED_SUPPORT 1
-#endif
-#endif
-
-#define SIZEOF_reg_t 4
-#if _MIPS_SIM == _ABIO32
-typedef unsigned long reg_t;
-typedef struct bits
-{
- reg_t B0:8, B1:8, B2:8, B3:8;
-} bits_t;
-#else
-#undef SIZEOF_reg_t
-#define SIZEOF_reg_t 8
-typedef unsigned long long reg_t;
-typedef struct bits
-{
- reg_t B0:8, B1:8, B2:8, B3:8, B4:8, B5:8, B6:8, B7:8;
-} bits_t;
-#endif
-
-/* This union assumes that small structures can be in registers. If
- not, then memory accesses will be done - not optimal, but ok. */
-typedef union
-{
- reg_t v;
- bits_t b;
-} bitfields_t;
-
-#define do_bitfield(__i) \
- if (x.b.B##__i != y.b.B##__i) return x.b.B##__i - y.b.B##__i;
-
-/* pull apart the words to find the first differing unsigned byte. */
-static int __attribute__ ((noinline)) do_by_bitfields (reg_t a, reg_t b)
-{
- bitfields_t x, y;
- x.v = a;
- y.v = b;
- do_bitfield (0);
- do_bitfield (1);
- do_bitfield (2);
-#if SIZEOF_reg_t == 4
- return x.b.B3 - y.b.B3;
-#else
- do_bitfield (3);
- do_bitfield (4);
- do_bitfield (5);
- do_bitfield (6);
- return x.b.B7 - y.b.B7;
-#endif
-}
-
-/* This code is called when aligning a pointer, there are remaining bytes
- after doing word compares, or architecture does not have some form
- of unaligned support. */
-static inline int __attribute__ ((always_inline))
-do_bytes (const void *a, const void *b, unsigned long len)
-{
- unsigned char *x = (unsigned char *) a;
- unsigned char *y = (unsigned char *) b;
- unsigned long i;
-
- /* 'len' might be zero here, so preloading the first two values
- before the loop may access unallocated memory. */
- for (i = 0; i < len; i++) {
- if (*x != *y)
- return *x - *y;
- x++;
- y++;
- }
- return 0;
-}
-
-#if !HW_UNALIGNED_SUPPORT
-#if UNALIGNED_INSTR_SUPPORT
-/* for MIPS GCC, there are no unaligned builtins - so this struct forces
- the compiler to treat the pointer access as unaligned. */
-struct ulw
-{
- reg_t uli;
-} __attribute__ ((packed));
-
-/* first pointer is not aligned while second pointer is. */
-static int unaligned_words (const struct ulw *a, const reg_t *b,
- unsigned long words, unsigned long bytes)
-{
-#if ENABLE_PREFETCH
- /* prefetch pointer aligned to 32 byte boundary */
- const reg_t *pref_ptr = (const reg_t *) (((uintptr_t) b + 31) & ~31);
- const reg_t *pref_ptr_a = (const reg_t *) (((uintptr_t) a + 31) & ~31);
-#endif
- for (; words >= 16; words -= 8) {
-#if ENABLE_PREFETCH
- pref_ptr += 8;
- PREFETCH(pref_ptr, 0);
- PREFETCH(pref_ptr, 32);
-
- pref_ptr_a += 8;
- PREFETCH(pref_ptr_a, 0);
- PREFETCH(pref_ptr_a, 32);
-#endif
- reg_t x0 = a[0].uli, x1 = a[1].uli;
- reg_t x2 = a[2].uli, x3 = a[3].uli;
- reg_t y0 = b[0], y1 = b[1], y2 = b[2], y3 = b[3];
- if (x0 != y0)
- return do_by_bitfields (x0, y0);
- if (x1 != y1)
- return do_by_bitfields (x1, y1);
- if (x2 != y2)
- return do_by_bitfields (x2, y2);
- if (x3 != y3)
- return do_by_bitfields (x3, y3);
-
- x0 = a[4].uli; x1 = a[5].uli;
- x2 = a[6].uli; x3 = a[7].uli;
- y0 = b[4]; y1 = b[5]; y2 = b[6]; y3 = b[7];
- if (x0 != y0)
- return do_by_bitfields (x0, y0);
- if (x1 != y1)
- return do_by_bitfields (x1, y1);
- if (x2 != y2)
- return do_by_bitfields (x2, y2);
- if (x3 != y3)
- return do_by_bitfields (x3, y3);
-
- a += 8;
- b += 8;
- }
-
- for (; words >= 4; words -= 4) {
- reg_t x0 = a[0].uli, x1 = a[1].uli;
- reg_t x2 = a[2].uli, x3 = a[3].uli;
- reg_t y0 = b[0], y1 = b[1], y2 = b[2], y3 = b[3];
- if (x0 != y0)
- return do_by_bitfields (x0, y0);
- if (x1 != y1)
- return do_by_bitfields (x1, y1);
- if (x2 != y2)
- return do_by_bitfields (x2, y2);
- if (x3 != y3)
- return do_by_bitfields (x3, y3);
- a += 4;
- b += 4;
- }
-
- /* do remaining words. */
- while (words--) {
- reg_t x0 = a->uli;
- reg_t y0 = *b;
- a += 1;
- b += 1;
- if (x0 != y0)
- return do_by_bitfields (x0, y0);
- }
-
- /* mop up any remaining bytes. */
- return do_bytes (a, b, bytes);
-}
-#else
-/* no HW support or unaligned lw/ld/ualw/uald instructions. */
-static int unaligned_words (const reg_t *a, const reg_t *b,
- unsigned long words, unsigned long bytes)
-{
- return do_bytes (a, b, (sizeof (reg_t) * words) + bytes);
-}
-#endif /* UNALIGNED_INSTR_SUPPORT */
-#endif /* HW_UNALIGNED_SUPPORT */
-
-/* both pointers are aligned, or first isn't and HW support for unaligned. */
-static int aligned_words (const reg_t *a, const reg_t *b,
- unsigned long words, unsigned long bytes)
-{
-#if ENABLE_PREFETCH
- /* prefetch pointer aligned to 32 byte boundary */
- const reg_t *pref_ptr = (const reg_t *) (((uintptr_t) b + 31) & ~31);
- const reg_t *pref_ptr_a = (const reg_t *) (((uintptr_t) a + 31) & ~31);
-#endif
-
- for (; words >= 24; words -= 12) {
-#if ENABLE_PREFETCH
- pref_ptr += 12;
- PREFETCH(pref_ptr, 0);
- PREFETCH(pref_ptr, 32);
- PREFETCH(pref_ptr, 64);
-
- pref_ptr_a += 12;
- PREFETCH(pref_ptr_a, 0);
- PREFETCH(pref_ptr_a, 32);
- PREFETCH(pref_ptr_a, 64);
-#endif
- reg_t x0 = a[0], x1 = a[1], x2 = a[2], x3 = a[3];
- reg_t y0 = b[0], y1 = b[1], y2 = b[2], y3 = b[3];
- if (x0 != y0)
- return do_by_bitfields (x0, y0);
- if (x1 != y1)
- return do_by_bitfields (x1, y1);
- if (x2 != y2)
- return do_by_bitfields (x2, y2);
- if (x3 != y3)
- return do_by_bitfields (x3, y3);
-
- x0 = a[4]; x1 = a[5]; x2 = a[6]; x3 = a[7];
- y0 = b[4]; y1 = b[5]; y2 = b[6]; y3 = b[7];
- if (x0 != y0)
- return do_by_bitfields (x0, y0);
- if (x1 != y1)
- return do_by_bitfields (x1, y1);
- if (x2 != y2)
- return do_by_bitfields (x2, y2);
- if (x3 != y3)
- return do_by_bitfields (x3, y3);
-
- x0 = a[8]; x1 = a[9]; x2 = a[10]; x3 = a[11];
- y0 = b[8]; y1 = b[9]; y2 = b[10]; y3 = b[11];
- if (x0 != y0)
- return do_by_bitfields (x0, y0);
- if (x1 != y1)
- return do_by_bitfields (x1, y1);
- if (x2 != y2)
- return do_by_bitfields (x2, y2);
- if (x3 != y3)
- return do_by_bitfields (x3, y3);
-
- a += 12;
- b += 12;
- }
-
- for (; words >= 4; words -= 4) {
- reg_t x0 = a[0], x1 = a[1], x2 = a[2], x3 = a[3];
- reg_t y0 = b[0], y1 = b[1], y2 = b[2], y3 = b[3];
- if (x0 != y0)
- return do_by_bitfields (x0, y0);
- if (x1 != y1)
- return do_by_bitfields (x1, y1);
- if (x2 != y2)
- return do_by_bitfields (x2, y2);
- if (x3 != y3)
- return do_by_bitfields (x3, y3);
- a += 4;
- b += 4;
- }
-
- /* do remaining words. */
- while (words--) {
- reg_t x0 = *a;
- reg_t y0 = *b;
- a += 1;
- b += 1;
- if (x0 != y0)
- return do_by_bitfields (x0, y0);
- }
-
- /* mop up any remaining bytes. */
- return do_bytes (a, b, bytes);
-}
-
-int memcmp (const void *a, const void *b, size_t len)
-{
- unsigned long bytes, words;
-
- /* shouldn't hit that often. */
- if (len < sizeof (reg_t) * 4) {
- return do_bytes (a, b, len);
- }
-
- /* Align the second pointer to word/dword alignment.
- Note that the pointer is only 32-bits for o32/n32 ABIs. For
- n32, loads are done as 64-bit while address remains 32-bit. */
- bytes = ((unsigned long) b) % sizeof (reg_t);
- if (bytes) {
- int res;
- bytes = sizeof (reg_t) - bytes;
- if (bytes > len)
- bytes = len;
- res = do_bytes (a, b, bytes);
- if (res || len == bytes)
- return res;
- len -= bytes;
- a = (const void *) (((unsigned char *) a) + bytes);
- b = (const void *) (((unsigned char *) b) + bytes);
- }
-
- /* Second pointer now aligned. */
- words = len / sizeof (reg_t);
- bytes = len % sizeof (reg_t);
-
-#if HW_UNALIGNED_SUPPORT
- /* treat possible unaligned first pointer as aligned. */
- return aligned_words (a, b, words, bytes);
-#else
- if (((unsigned long) a) % sizeof (reg_t) == 0) {
- return aligned_words (a, b, words, bytes);
- }
- /* need to use unaligned instructions on first pointer. */
- return unaligned_words (a, b, words, bytes);
-#endif
-}
diff --git a/libc/arch-mips/string/memcpy.c b/libc/arch-mips/string/memcpy.c
deleted file mode 100644
index bb0d179..0000000
--- a/libc/arch-mips/string/memcpy.c
+++ /dev/null
@@ -1,328 +0,0 @@
-/*
- * Copyright (c) 2017 Imagination Technologies.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer
- * in the documentation and/or other materials provided with
- * the distribution.
- * * Neither the name of Imagination Technologies nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <string.h>
-
-#if !defined(UNALIGNED_INSTR_SUPPORT)
-/* does target have unaligned lw/ld/ualw/uald instructions? */
-#define UNALIGNED_INSTR_SUPPORT 0
-#if __mips_isa_rev < 6 && !__mips1
-#undef UNALIGNED_INSTR_SUPPORT
-#define UNALIGNED_INSTR_SUPPORT 1
-#endif
-#endif
-
-#if !defined(HW_UNALIGNED_SUPPORT)
-/* Does target have hardware support for unaligned accesses? */
-#define HW_UNALIGNED_SUPPORT 0
-#if __mips_isa_rev >= 6
-#undef HW_UNALIGNED_SUPPORT
-#define HW_UNALIGNED_SUPPORT 1
-#endif
-#endif
-
-#define ENABLE_PREFETCH 1
-
-#if ENABLE_PREFETCH
-#define PREFETCH(addr) __builtin_prefetch (addr, 0, 1);
-#else
-#define PREFETCH(addr)
-#endif
-
-#if _MIPS_SIM == _ABIO32
-typedef unsigned long reg_t;
-typedef struct
-{
- reg_t B0:8, B1:8, B2:8, B3:8;
-} bits_t;
-#else
-typedef unsigned long long reg_t;
-typedef struct
-{
- reg_t B0:8, B1:8, B2:8, B3:8, B4:8, B5:8, B6:8, B7:8;
-} bits_t;
-#endif
-
-typedef union
-{
- reg_t v;
- bits_t b;
-} bitfields_t;
-
-#define DO_BYTE(a, i) \
- a[i] = bw.b.B##i; \
- len--; \
- if(!len) return ret; \
-
-/* This code is called when aligning a pointer, there are remaining bytes
- after doing word compares, or architecture does not have some form
- of unaligned support. */
-static inline void * __attribute__ ((always_inline))
-do_bytes (void *a, const void *b, unsigned long len, void *ret)
-{
- unsigned char *x = (unsigned char *) a;
- unsigned char *y = (unsigned char *) b;
- unsigned long i;
-
- /* 'len' might be zero here, so preloading the first two values
- before the loop may access unallocated memory. */
- for (i = 0; i < len; i++) {
- *x = *y;
- x++;
- y++;
- }
- return ret;
-}
-
-/* This code is called to copy only remaining bytes within word or doubleword */
-static inline void * __attribute__ ((always_inline))
-do_bytes_remaining (void *a, const void *b, unsigned long len, void *ret)
-{
- unsigned char *x = (unsigned char *) a;
-
- if(len > 0) {
- bitfields_t bw;
- bw.v = *((reg_t*) b);
-
-#if __mips64
- DO_BYTE(x, 0);
- DO_BYTE(x, 1);
- DO_BYTE(x, 2);
- DO_BYTE(x, 3);
- DO_BYTE(x, 4);
- DO_BYTE(x, 5);
- DO_BYTE(x, 6);
- DO_BYTE(x, 7);
-#else
- DO_BYTE(x, 0);
- DO_BYTE(x, 1);
- DO_BYTE(x, 2);
- DO_BYTE(x, 3);
-#endif
- }
-
- return ret;
-}
-
-#if !HW_UNALIGNED_SUPPORT
-#if UNALIGNED_INSTR_SUPPORT
-/* for MIPS GCC, there are no unaligned builtins - so this struct forces
- the compiler to treat the pointer access as unaligned. */
-struct ulw
-{
- reg_t uli;
-} __attribute__ ((packed));
-
-/* first pointer is not aligned while second pointer is. */
-static void *
-unaligned_words (struct ulw *a, const reg_t * b,
- unsigned long words, unsigned long bytes, void *ret)
-{
-#if ((_MIPS_SIM == _ABIO32) || _MIPS_TUNE_I6400)
- unsigned long i, words_by_8, words_by_1;
- words_by_1 = words % 8;
- words_by_8 = words >> 3;
- for (; words_by_8 > 0; words_by_8--) {
- if(words_by_8 != 1)
- PREFETCH (b + 8);
- reg_t y0 = b[0], y1 = b[1], y2 = b[2], y3 = b[3];
- reg_t y4 = b[4], y5 = b[5], y6 = b[6], y7 = b[7];
- a[0].uli = y0;
- a[1].uli = y1;
- a[2].uli = y2;
- a[3].uli = y3;
- a[4].uli = y4;
- a[5].uli = y5;
- a[6].uli = y6;
- a[7].uli = y7;
- a += 8;
- b += 8;
- }
-#else
- unsigned long i, words_by_4, words_by_1;
- words_by_1 = words % 4;
- words_by_4 = words >> 2;
- for (; words_by_4 > 0; words_by_4--) {
- if(words_by_4 != 1)
- PREFETCH (b + 4);
- reg_t y0 = b[0], y1 = b[1], y2 = b[2], y3 = b[3];
- a[0].uli = y0;
- a[1].uli = y1;
- a[2].uli = y2;
- a[3].uli = y3;
- a += 4;
- b += 4;
- }
-#endif
-
- /* do remaining words. */
- for (i = 0; i < words_by_1; i++) {
- a->uli = *b;
- a += 1;
- b += 1;
- }
-
- /* mop up any remaining bytes. */
- return do_bytes_remaining (a, b, bytes, ret);
-}
-#else
-/* no HW support or unaligned lw/ld/ualw/uald instructions. */
-static void *
-unaligned_words (reg_t * a, const reg_t * b,
- unsigned long words, unsigned long bytes, void *ret)
-{
- unsigned long i;
- unsigned char *x = (unsigned char *) a;
-
- for (i = 0; i < words; i++) {
- bitfields_t bw;
- bw.v = *((reg_t*) b);
- x = (unsigned char *) a;
-#if __mips64
- x[0] = bw.b.B0;
- x[1] = bw.b.B1;
- x[2] = bw.b.B2;
- x[3] = bw.b.B3;
- x[4] = bw.b.B4;
- x[5] = bw.b.B5;
- x[6] = bw.b.B6;
- x[7] = bw.b.B7;
-#else
- x[0] = bw.b.B0;
- x[1] = bw.b.B1;
- x[2] = bw.b.B2;
- x[3] = bw.b.B3;
-#endif
- a += 1;
- b += 1;
- }
-
- /* mop up any remaining bytes */
- return do_bytes_remaining (a, b, bytes, ret);
-}
-#endif /* UNALIGNED_INSTR_SUPPORT */
-#endif /* HW_UNALIGNED_SUPPORT */
-
-/* both pointers are aligned, or first isn't and HW support for unaligned. */
-static void *
-aligned_words (reg_t * a, const reg_t * b,
- unsigned long words, unsigned long bytes, void *ret)
-{
-#if ((_MIPS_SIM == _ABIO32) || _MIPS_TUNE_I6400)
- unsigned long i, words_by_8, words_by_1;
- words_by_1 = words % 8;
- words_by_8 = words >> 3;
- for (; words_by_8 > 0; words_by_8--) {
- if(words_by_8 != 1)
- PREFETCH (b + 8);
- reg_t x0 = b[0], x1 = b[1], x2 = b[2], x3 = b[3];
- reg_t x4 = b[4], x5 = b[5], x6 = b[6], x7 = b[7];
- a[0] = x0;
- a[1] = x1;
- a[2] = x2;
- a[3] = x3;
- a[4] = x4;
- a[5] = x5;
- a[6] = x6;
- a[7] = x7;
- a += 8;
- b += 8;
- }
-#else
- unsigned long i, words_by_4, words_by_1;
- words_by_1 = words % 4;
- words_by_4 = words >> 2;
- for (; words_by_4 > 0; words_by_4--) {
- if(words_by_4 != 1)
- PREFETCH (b + 4);
- reg_t x0 = b[0], x1 = b[1], x2 = b[2], x3 = b[3];
- a[0] = x0;
- a[1] = x1;
- a[2] = x2;
- a[3] = x3;
- a += 4;
- b += 4;
- }
-#endif
-
- /* do remaining words. */
- for (i = 0; i < words_by_1; i++) {
- *a = *b;
- a += 1;
- b += 1;
- }
-
- /* mop up any remaining bytes. */
- return do_bytes_remaining (a, b, bytes, ret);
-}
-
-void *
-memcpy (void *a, const void *b, size_t len)
-{
- unsigned long bytes, words;
- void *ret = a;
-
- /* shouldn't hit that often. */
- if (len < sizeof (reg_t) * 4) {
- return do_bytes (a, b, len, a);
- }
-
- /* Align the second pointer to word/dword alignment.
- Note that the pointer is only 32-bits for o32/n32 ABIs. For
- n32, loads are done as 64-bit while address remains 32-bit. */
- bytes = ((unsigned long) b) % sizeof (reg_t);
- if (bytes) {
- bytes = sizeof (reg_t) - bytes;
- if (bytes > len)
- bytes = len;
- do_bytes (a, b, bytes, ret);
- if (len == bytes)
- return ret;
- len -= bytes;
- a = (void *) (((unsigned char *) a) + bytes);
- b = (const void *) (((unsigned char *) b) + bytes);
- }
-
- /* Second pointer now aligned. */
- words = len / sizeof (reg_t);
- bytes = len % sizeof (reg_t);
-#if HW_UNALIGNED_SUPPORT
- /* treat possible unaligned first pointer as aligned. */
- return aligned_words (a, b, words, bytes, ret);
-#else
- if (((unsigned long) a) % sizeof (reg_t) == 0) {
- return aligned_words (a, b, words, bytes, ret);
- }
- /* need to use unaligned instructions on first pointer. */
- return unaligned_words (a, b, words, bytes, ret);
-#endif
-}
diff --git a/libc/arch-mips/string/memmove.c b/libc/arch-mips/string/memmove.c
deleted file mode 100644
index 74d4cd0..0000000
--- a/libc/arch-mips/string/memmove.c
+++ /dev/null
@@ -1,468 +0,0 @@
-/*
- * Copyright (c) 2017 Imagination Technologies.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer
- * in the documentation and/or other materials provided with
- * the distribution.
- * * Neither the name of Imagination Technologies nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <string.h>
-
-#if !defined(UNALIGNED_INSTR_SUPPORT)
-/* does target have unaligned lw/ld/ualw/uald instructions? */
-#define UNALIGNED_INSTR_SUPPORT 0
-#if __mips_isa_rev < 6 && !__mips1
-#undef UNALIGNED_INSTR_SUPPORT
-#define UNALIGNED_INSTR_SUPPORT 1
-#endif
-#endif
-
-#if !defined(HW_UNALIGNED_SUPPORT)
-/* Does target have hardware support for unaligned accesses? */
-#define HW_UNALIGNED_SUPPORT 0
-#if __mips_isa_rev >= 6
-#undef HW_UNALIGNED_SUPPORT
-#define HW_UNALIGNED_SUPPORT 1
-#endif
-#endif
-
-#define ENABLE_PREFETCH 1
-
-#if ENABLE_PREFETCH
-#define PREFETCH(addr) __builtin_prefetch (addr, 0, 1);
-#else
-#define PREFETCH(addr)
-#endif
-
-#if _MIPS_SIM == _ABIO32
-typedef unsigned long reg_t;
-typedef struct
-{
- reg_t B0:8, B1:8, B2:8, B3:8;
-} bits_t;
-#else
-typedef unsigned long long reg_t;
-typedef struct
-{
- reg_t B0:8, B1:8, B2:8, B3:8, B4:8, B5:8, B6:8, B7:8;
-} bits_t;
-#endif
-
-typedef union
-{
- reg_t v;
- bits_t b;
-} bitfields_t;
-
-#define DO_BYTE(a, i) \
- a[i] = bw.b.B##i; \
- len--; \
- if(!len) return ret; \
-
-/* This code is called when aligning a pointer, there are remaining bytes
- after doing word compares, or architecture does not have some form
- of unaligned support. */
-static inline void * __attribute__ ((always_inline))
-do_bytes (void *a, const void *b, unsigned long len, void *ret)
-{
- unsigned char *x = (unsigned char *) a;
- unsigned char *y = (unsigned char *) b;
- unsigned long i;
-
- /* 'len' might be zero here, so preloading the first two values
- before the loop may access unallocated memory. */
- for (i = 0; i < len; i++)
- {
- *x = *y;
- x++;
- y++;
- }
- return ret;
-}
-
-static inline void * __attribute__ ((always_inline))
-do_bytes_backward (void *a, const void *b, unsigned long len, void *ret)
-{
- unsigned char *x = (unsigned char *) a;
- unsigned char *y = (unsigned char *) b;
- unsigned long i;
-
- /* 'len' might be zero here, so preloading the first two values
- before the loop may access unallocated memory. */
- for (i = 0; i < len; i++) {
- *--x = *--y;
- }
- return ret;
-}
-
-static inline void * __attribute__ ((always_inline))
-do_bytes_aligned (void *a, const void *b, unsigned long len, void *ret)
-{
- unsigned char *x = (unsigned char *) a;
-
- if(len > 0) {
- bitfields_t bw;
- bw.v = *((reg_t*) b);
-
-#if __mips64
- DO_BYTE(x, 0);
- DO_BYTE(x, 1);
- DO_BYTE(x, 2);
- DO_BYTE(x, 3);
- DO_BYTE(x, 4);
- DO_BYTE(x, 5);
- DO_BYTE(x, 6);
- DO_BYTE(x, 7);
-#else
- DO_BYTE(x, 0);
- DO_BYTE(x, 1);
- DO_BYTE(x, 2);
- DO_BYTE(x, 3);
-#endif
- }
-
- return ret;
-}
-
-#if !HW_UNALIGNED_SUPPORT
-#if UNALIGNED_INSTR_SUPPORT
-/* for MIPS GCC, there are no unaligned builtins - so this struct forces
- the compiler to treat the pointer access as unaligned. */
-struct ulw
-{
- reg_t uli;
-} __attribute__ ((packed));
-
-#define STORE_UNALIGNED_8(a, b) \
-{ \
- reg_t y0 = b[0], y1 = b[1], y2 = b[2], y3 = b[3]; \
- reg_t y4 = b[4], y5 = b[5], y6 = b[6], y7 = b[7]; \
- a[0].uli = y0; \
- a[1].uli = y1; \
- a[2].uli = y2; \
- a[3].uli = y3; \
- a[4].uli = y4; \
- a[5].uli = y5; \
- a[6].uli = y6; \
- a[7].uli = y7; \
-}
-
-#define STORE_UNALIGNED_4(a, b) \
-{ \
- reg_t y0 = b[0], y1 = b[1], y2 = b[2], y3 = b[3]; \
- a[0].uli = y0; \
- a[1].uli = y1; \
- a[2].uli = y2; \
- a[3].uli = y3; \
-}
-
-/* first pointer is not aligned while second pointer is. */
-static void *
-unaligned_words_forward (struct ulw *a, const reg_t * b,
- unsigned long words, unsigned long bytes, void *ret)
-{
-#if ((_MIPS_SIM == _ABIO32) || _MIPS_TUNE_I6400)
- unsigned long i, words_by_8, words_by_1;
- words_by_1 = words % 8;
- words_by_8 = words >> 3;
- for (; words_by_8 > 0; words_by_8--) {
- if(words_by_8 != 1)
- PREFETCH (b + 8);
- STORE_UNALIGNED_8(a, b);
- a += 8;
- b += 8;
- }
-#else
- unsigned long i, words_by_4, words_by_1;
- words_by_1 = words % 4;
- words_by_4 = words >> 2;
- for (; words_by_4 > 0; words_by_4--) {
- if(words_by_4 != 1)
- PREFETCH (b + 4);
- STORE_UNALIGNED_4(a, b);
- a += 4;
- b += 4;
- }
-#endif
-
- /* do remaining words. */
- for (i = 0; i < words_by_1; i++) {
- a->uli = *b;
- a += 1;
- b += 1;
- }
-
- /* mop up any remaining bytes. */
- return do_bytes_aligned (a, b, bytes, ret);
-}
-
-static void *
-unaligned_words_backward (struct ulw *a, const reg_t * b,
- unsigned long words, unsigned long bytes, void *ret)
-{
-#if ((_MIPS_SIM == _ABIO32) || _MIPS_TUNE_I6400)
- unsigned long i, words_by_8, words_by_1;
- words_by_1 = words % 8;
- words_by_8 = words >> 3;
- for (; words_by_8 > 0; words_by_8--) {
- if(words_by_8 != 1)
- PREFETCH (b - 16);
- a -= 8;
- b -= 8;
- STORE_UNALIGNED_8(a, b);
- }
-#else
- unsigned long i, words_by_4, words_by_1;
- words_by_1 = words % 4;
- words_by_4 = words >> 2;
- for (; words_by_4 > 0; words_by_4--) {
- if(words_by_4 != 1)
- PREFETCH (b - 8);
- a -= 4;
- b -= 4;
- STORE_UNALIGNED_4(a, b);
- }
-#endif
-
- /* do remaining words. */
- for (i = 0; i < words_by_1; i++) {
- a -= 1;
- b -= 1;
- a->uli = *b;
- }
-
- /* mop up any remaining bytes. */
- return do_bytes_backward (a, b, bytes, ret);
-}
-
-#else
-/* no HW support or unaligned lw/ld/ualw/uald instructions. */
-static void *
-unaligned_words_forward (reg_t * a, const reg_t * b,
- unsigned long words, unsigned long bytes, void *ret)
-{
- return do_bytes_aligned (a, b, (sizeof (reg_t) * words) + bytes, ret);
-}
-
-static void *
-unaligned_words_backward (reg_t * a, const reg_t * b,
- unsigned long words, unsigned long bytes, void *ret)
-{
- return do_bytes_backward (a, b, (sizeof (reg_t) * words) + bytes, ret);
-}
-
-#endif /* UNALIGNED_INSTR_SUPPORT */
-#endif /* HW_UNALIGNED_SUPPORT */
-
-/* both pointers are aligned, or first isn't and HW support for unaligned. */
-
-#define STORE_ALIGNED_8(a, b) \
-{ \
- reg_t x0 = b[0], x1 = b[1], x2 = b[2], x3 = b[3]; \
- reg_t x4 = b[4], x5 = b[5], x6 = b[6], x7 = b[7]; \
- a[0] = x0; \
- a[1] = x1; \
- a[2] = x2; \
- a[3] = x3; \
- a[4] = x4; \
- a[5] = x5; \
- a[6] = x6; \
- a[7] = x7; \
-}
-
-#define STORE_ALIGNED_4(a, b) \
-{ \
- reg_t x0 = b[0], x1 = b[1], x2 = b[2], x3 = b[3]; \
- a[0] = x0; \
- a[1] = x1; \
- a[2] = x2; \
- a[3] = x3; \
-}
-
-static void *
-aligned_words_forward (reg_t * a, const reg_t * b,
- unsigned long words, unsigned long bytes, void *ret)
-{
-#if ((_MIPS_SIM == _ABIO32) || _MIPS_TUNE_I6400)
- unsigned long i, words_by_8, words_by_1;
- words_by_1 = words % 8;
- words_by_8 = words >> 3;
- for (; words_by_8 > 0; words_by_8--) {
- if(words_by_8 != 1)
- PREFETCH (b + 8);
- STORE_ALIGNED_8(a, b);
- a += 8;
- b += 8;
- }
-#else
- unsigned long i, words_by_4, words_by_1;
- words_by_1 = words % 4;
- words_by_4 = words >> 2;
- for (; words_by_4 > 0; words_by_4--) {
- if(words_by_4 != 1)
- PREFETCH (b + 4);
- STORE_ALIGNED_4(a, b);
- a += 4;
- b += 4;
- }
-#endif
-
- /* do remaining words. */
- for (i = 0; i < words_by_1; i++) {
- *a = *b;
- a += 1;
- b += 1;
- }
-
- /* mop up any remaining bytes. */
- return do_bytes_aligned (a, b, bytes, ret);
-}
-
-
-static void *
-aligned_words_backward (reg_t * a, const reg_t * b,
- unsigned long words, unsigned long bytes, void *ret)
-{
-#if ((_MIPS_SIM == _ABIO32) || _MIPS_TUNE_I6400)
- unsigned long i, words_by_8, words_by_1;
- words_by_1 = words % 8;
- words_by_8 = words >> 3;
- for (; words_by_8 > 0; words_by_8--) {
- if(words_by_8 != 1)
- PREFETCH (b - 16);
- a -= 8;
- b -= 8;
- STORE_ALIGNED_8(a, b);
- }
-#else
- unsigned long i, words_by_4, words_by_1;
- words_by_1 = words % 4;
- words_by_4 = words >> 2;
- for (; words_by_4 > 0; words_by_4--) {
- if(words_by_4 != 1)
- PREFETCH (b - 8);
- a -= 4;
- b -= 4;
- STORE_ALIGNED_4(a, b);
- }
-#endif
-
- /* do remaining words. */
- for (i = 0; i < words_by_1; i++) {
- a -= 1;
- b -= 1;
- *a = *b;
- }
-
- /* mop up any remaining bytes. */
- return do_bytes_backward (a, b, bytes, ret);
-}
-
-void *
-memmove (void *dst0, const void *src0, size_t length)
-{
- unsigned long bytes, words;
- void *ret = dst0;
-
- if (length == 0 || dst0 == src0) /* nothing to do */
- return dst0;
-
- if ((unsigned long)dst0 < (unsigned long)src0) {
- /* Copy forwards. */
- /* This shouldn't hit that often. */
- if (length < sizeof (reg_t) * 4) {
- return do_bytes (dst0, src0, length, ret);
- }
-
- /* Align the second pointer to word/dword alignment.
- Note that the pointer is only 32-bits for o32/n32 ABIs. For
- n32, loads are done as 64-bit while address remains 32-bit. */
- bytes = ((unsigned long) src0) % sizeof (reg_t);
- if (bytes) {
- bytes = sizeof (reg_t) - bytes;
- if (bytes > length)
- bytes = length;
- do_bytes (dst0, src0, bytes, ret);
- if (length == bytes)
- return ret;
- length -= bytes;
- dst0 = (void *) (((unsigned char *) dst0) + bytes);
- src0 = (const void *) (((unsigned char *) src0) + bytes);
- }
-
- /* Second pointer now aligned. */
- words = length / sizeof (reg_t);
- bytes = length % sizeof (reg_t);
-#if HW_UNALIGNED_SUPPORT
- /* treat possible unaligned first pointer as aligned. */
- return aligned_words_forward (dst0, src0, words, bytes, ret);
-#else
- if (((unsigned long) dst0) % sizeof (reg_t) == 0) {
- return aligned_words_forward (dst0, src0, words, bytes, ret);
- }
- /* need to use unaligned instructions on first pointer. */
- return unaligned_words_forward (dst0, src0, words, bytes, ret);
-#endif
- } else {
- /* Copy backwards. */
- dst0 = (void *) (((unsigned char *) dst0) + length);
- src0 = (const void *) (((unsigned char *) src0) + length);
-
- /* This shouldn't hit that often. */
- if (length < sizeof (reg_t) * 4) {
- return do_bytes_backward (dst0, src0, length, ret);
- }
-
- /* Align the second pointer to word/dword alignment.
- Note that the pointer is only 32-bits for o32/n32 ABIs. For
- n32, loads are done as 64-bit while address remains 32-bit. */
- bytes = ((unsigned long) src0) % sizeof (reg_t);
- if (bytes) {
- if (bytes > length)
- bytes = length;
- do_bytes_backward (dst0, src0, bytes, ret);
- if (length == bytes)
- return ret;
- length -= bytes;
- dst0 = (void *) (((unsigned char *) dst0) - bytes);
- src0 = (const void *) (((unsigned char *) src0) - bytes);
- }
-
- words = length / sizeof (reg_t);
- bytes = length % sizeof (reg_t);
-#if HW_UNALIGNED_SUPPORT
- /* treat possible unaligned first pointer as aligned. */
- return aligned_words_backward ((void *)dst0, (void *)src0, words, bytes, ret);
-#else
- if (((unsigned long) dst0) % sizeof (reg_t) == 0) {
- return aligned_words_backward (dst0, src0, words, bytes, ret);
- }
- /* need to use unaligned instructions on first pointer. */
- return unaligned_words_backward (dst0, src0, words, bytes, ret);
-#endif
- }
-}
diff --git a/libc/arch-mips/string/memset.S b/libc/arch-mips/string/memset.S
deleted file mode 100644
index 85ba2e9..0000000
--- a/libc/arch-mips/string/memset.S
+++ /dev/null
@@ -1,448 +0,0 @@
-/*
- * Copyright (c) 2013
- * MIPS Technologies, Inc., California.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in the
- * documentation and/or other materials provided with the distribution.
- * 3. Neither the name of the MIPS Technologies, Inc., nor the names of its
- * contributors may be used to endorse or promote products derived from
- * this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE MIPS TECHNOLOGIES, INC. ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE MIPS TECHNOLOGIES, INC. BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#ifdef __ANDROID__
-# include <private/bionic_asm.h>
-# define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
-#elif _LIBC
-# include <sysdep.h>
-# include <regdef.h>
-# include <sys/asm.h>
-# define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
-#elif _COMPILING_NEWLIB
-# include "machine/asm.h"
-# include "machine/regdef.h"
-# define PREFETCH_STORE_HINT PREFETCH_HINT_PREPAREFORSTORE
-#else
-# include <regdef.h>
-# include <sys/asm.h>
-#endif
-
-/* Check to see if the MIPS architecture we are compiling for supports
- prefetching. */
-
-#if (__mips == 4) || (__mips == 5) || (__mips == 32) || (__mips == 64)
-# ifndef DISABLE_PREFETCH
-# define USE_PREFETCH
-# endif
-#endif
-
-#if defined(_MIPS_SIM) && ((_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32))
-# ifndef DISABLE_DOUBLE
-# define USE_DOUBLE
-# endif
-#endif
-
-#ifndef USE_DOUBLE
-# ifndef DISABLE_DOUBLE_ALIGN
-# define DOUBLE_ALIGN
-# endif
-#endif
-
-/* Some asm.h files do not have the L macro definition. */
-#ifndef L
-# if _MIPS_SIM == _ABIO32
-# define L(label) $L ## label
-# else
-# define L(label) .L ## label
-# endif
-#endif
-
-/* Some asm.h files do not have the PTR_ADDIU macro definition. */
-#ifndef PTR_ADDIU
-# if _MIPS_SIM == _ABIO32
-# define PTR_ADDIU addiu
-# else
-# define PTR_ADDIU daddiu
-# endif
-#endif
-
-/* New R6 instructions that may not be in asm.h. */
-#ifndef PTR_LSA
-# if _MIPS_SIM == _ABIO32
-# define PTR_LSA lsa
-# else
-# define PTR_LSA dlsa
-# endif
-#endif
-
-/* Using PREFETCH_HINT_PREPAREFORSTORE instead of PREFETCH_STORE
- or PREFETCH_STORE_STREAMED offers a large performance advantage
- but PREPAREFORSTORE has some special restrictions to consider.
-
- Prefetch with the 'prepare for store' hint does not copy a memory
- location into the cache, it just allocates a cache line and zeros
- it out. This means that if you do not write to the entire cache
- line before writing it out to memory some data will get zero'ed out
- when the cache line is written back to memory and data will be lost.
-
- There are ifdef'ed sections of this memcpy to make sure that it does not
- do prefetches on cache lines that are not going to be completely written.
- This code is only needed and only used when PREFETCH_STORE_HINT is set to
- PREFETCH_HINT_PREPAREFORSTORE. This code assumes that cache lines are
- less than MAX_PREFETCH_SIZE bytes and if the cache line is larger it will
- not work correctly. */
-
-#ifdef USE_PREFETCH
-# define PREFETCH_HINT_STORE 1
-# define PREFETCH_HINT_STORE_STREAMED 5
-# define PREFETCH_HINT_STORE_RETAINED 7
-# define PREFETCH_HINT_PREPAREFORSTORE 30
-
-/* If we have not picked out what hints to use at this point use the
- standard load and store prefetch hints. */
-# ifndef PREFETCH_STORE_HINT
-# define PREFETCH_STORE_HINT PREFETCH_HINT_STORE
-# endif
-
-/* We double everything when USE_DOUBLE is true so we do 2 prefetches to
- get 64 bytes in that case. The assumption is that each individual
- prefetch brings in 32 bytes. */
-# ifdef USE_DOUBLE
-# define PREFETCH_CHUNK 64
-# define PREFETCH_FOR_STORE(chunk, reg) \
- pref PREFETCH_STORE_HINT, (chunk)*64(reg); \
- pref PREFETCH_STORE_HINT, ((chunk)*64)+32(reg)
-# else
-# define PREFETCH_CHUNK 32
-# define PREFETCH_FOR_STORE(chunk, reg) \
- pref PREFETCH_STORE_HINT, (chunk)*32(reg)
-# endif
-
-/* MAX_PREFETCH_SIZE is the maximum size of a prefetch, it must not be less
- than PREFETCH_CHUNK, the assumed size of each prefetch. If the real size
- of a prefetch is greater than MAX_PREFETCH_SIZE and the PREPAREFORSTORE
- hint is used, the code will not work correctly. If PREPAREFORSTORE is not
- used than MAX_PREFETCH_SIZE does not matter. */
-# define MAX_PREFETCH_SIZE 128
-/* PREFETCH_LIMIT is set based on the fact that we never use an offset greater
- than 5 on a STORE prefetch and that a single prefetch can never be larger
- than MAX_PREFETCH_SIZE. We add the extra 32 when USE_DOUBLE is set because
- we actually do two prefetches in that case, one 32 bytes after the other. */
-# ifdef USE_DOUBLE
-# define PREFETCH_LIMIT (5 * PREFETCH_CHUNK) + 32 + MAX_PREFETCH_SIZE
-# else
-# define PREFETCH_LIMIT (5 * PREFETCH_CHUNK) + MAX_PREFETCH_SIZE
-# endif
-
-# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE) \
- && ((PREFETCH_CHUNK * 4) < MAX_PREFETCH_SIZE)
-/* We cannot handle this because the initial prefetches may fetch bytes that
- are before the buffer being copied. We start copies with an offset
- of 4 so avoid this situation when using PREPAREFORSTORE. */
-# error "PREFETCH_CHUNK is too large and/or MAX_PREFETCH_SIZE is too small."
-# endif
-#else /* USE_PREFETCH not defined */
-# define PREFETCH_FOR_STORE(offset, reg)
-#endif
-
-#if __mips_isa_rev > 5
-# if (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
-# undef PREFETCH_STORE_HINT
-# define PREFETCH_STORE_HINT PREFETCH_HINT_STORE_STREAMED
-# endif
-# define R6_CODE
-#endif
-
-/* We load/store 64 bits at a time when USE_DOUBLE is true.
- The C_ prefix stands for CHUNK and is used to avoid macro name
- conflicts with system header files. */
-
-#ifdef USE_DOUBLE
-# define C_ST sd
-# if __MIPSEB
-# define C_STHI sdl /* high part is left in big-endian */
-# else
-# define C_STHI sdr /* high part is right in little-endian */
-# endif
-#else
-# define C_ST sw
-# if __MIPSEB
-# define C_STHI swl /* high part is left in big-endian */
-# else
-# define C_STHI swr /* high part is right in little-endian */
-# endif
-#endif
-
-/* Bookkeeping values for 32 vs. 64 bit mode. */
-#ifdef USE_DOUBLE
-# define NSIZE 8
-# define NSIZEMASK 0x3f
-# define NSIZEDMASK 0x7f
-#else
-# define NSIZE 4
-# define NSIZEMASK 0x1f
-# define NSIZEDMASK 0x3f
-#endif
-#define UNIT(unit) ((unit)*NSIZE)
-#define UNITM1(unit) (((unit)*NSIZE)-1)
-
-#ifdef __ANDROID__
-LEAF(__memset_chk,0)
-#else
-LEAF(__memset_chk)
-#endif
- .set noreorder
- sltu $t2, $a3, $a2
- beq $t2, $zero, memset
- nop
- .cpsetup $t9, $t8, __memset_chk
- LA $t9, __memset_chk_fail
- jr $t9
- nop
- .set reorder
-END(__memset_chk)
-
-#ifdef __ANDROID__
-LEAF(memset,0)
-#else
-LEAF(memset)
-#endif
-
- .set nomips16
- .set noreorder
-/* If the size is less than 2*NSIZE (8 or 16), go to L(lastb). Regardless of
- size, copy dst pointer to v0 for the return value. */
- slti $t2,$a2,(2 * NSIZE)
- bne $t2,$zero,L(lastb)
- move $v0,$a0
-
-/* If memset value is not zero, we copy it to all the bytes in a 32 or 64
- bit word. */
- beq $a1,$zero,L(set0) /* If memset value is zero no smear */
- PTR_SUBU $a3,$zero,$a0
- nop
-
- /* smear byte into 32 or 64 bit word */
-#if ((__mips == 64) || (__mips == 32)) && (__mips_isa_rev >= 2)
-# ifdef USE_DOUBLE
- dins $a1, $a1, 8, 8 /* Replicate fill byte into half-word. */
- dins $a1, $a1, 16, 16 /* Replicate fill byte into word. */
- dins $a1, $a1, 32, 32 /* Replicate fill byte into dbl word. */
-# else
- ins $a1, $a1, 8, 8 /* Replicate fill byte into half-word. */
- ins $a1, $a1, 16, 16 /* Replicate fill byte into word. */
-# endif
-#else
-# ifdef USE_DOUBLE
- and $a1,0xff
- dsll $t2,$a1,8
- or $a1,$t2
- dsll $t2,$a1,16
- or $a1,$t2
- dsll $t2,$a1,32
- or $a1,$t2
-# else
- and $a1,0xff
- sll $t2,$a1,8
- or $a1,$t2
- sll $t2,$a1,16
- or $a1,$t2
-# endif
-#endif
-
-/* If the destination address is not aligned do a partial store to get it
- aligned. If it is already aligned just jump to L(aligned). */
-L(set0):
-#ifndef R6_CODE
- andi $t2,$a3,(NSIZE-1) /* word-unaligned address? */
- beq $t2,$zero,L(aligned) /* t2 is the unalignment count */
- PTR_SUBU $a2,$a2,$t2
- C_STHI $a1,0($a0)
- PTR_ADDU $a0,$a0,$t2
-#else /* R6_CODE */
- andi $t2,$a0,(NSIZE-1)
- lapc $t9,L(atable)
- PTR_LSA $t9,$t2,$t9,2
- jrc $t9
-L(atable):
- bc L(aligned)
-# ifdef USE_DOUBLE
- bc L(lb7)
- bc L(lb6)
- bc L(lb5)
- bc L(lb4)
-# endif
- bc L(lb3)
- bc L(lb2)
- bc L(lb1)
-L(lb7):
- sb $a1,6($a0)
-L(lb6):
- sb $a1,5($a0)
-L(lb5):
- sb $a1,4($a0)
-L(lb4):
- sb $a1,3($a0)
-L(lb3):
- sb $a1,2($a0)
-L(lb2):
- sb $a1,1($a0)
-L(lb1):
- sb $a1,0($a0)
-
- li $t9,NSIZE
- subu $t2,$t9,$t2
- PTR_SUBU $a2,$a2,$t2
- PTR_ADDU $a0,$a0,$t2
-#endif /* R6_CODE */
-
-L(aligned):
-/* If USE_DOUBLE is not set we may still want to align the data on a 16
- byte boundry instead of an 8 byte boundry to maximize the opportunity
- of proAptiv chips to do memory bonding (combining two sequential 4
- byte stores into one 8 byte store). We know there are at least 4 bytes
- left to store or we would have jumped to L(lastb) earlier in the code. */
-#ifdef DOUBLE_ALIGN
- andi $t2,$a3,4
- beq $t2,$zero,L(double_aligned)
- PTR_SUBU $a2,$a2,$t2
- sw $a1,0($a0)
- PTR_ADDU $a0,$a0,$t2
-L(double_aligned):
-#endif
-
-/* Now the destination is aligned to (word or double word) aligned address
- Set a2 to count how many bytes we have to copy after all the 64/128 byte
- chunks are copied and a3 to the dest pointer after all the 64/128 byte
- chunks have been copied. We will loop, incrementing a0 until it equals
- a3. */
- andi $t8,$a2,NSIZEDMASK /* any whole 64-byte/128-byte chunks? */
- beq $a2,$t8,L(chkw) /* if a2==t8, no 64-byte/128-byte chunks */
- PTR_SUBU $a3,$a2,$t8 /* subtract from a2 the reminder */
- PTR_ADDU $a3,$a0,$a3 /* Now a3 is the final dst after loop */
-
-/* When in the loop we may prefetch with the 'prepare to store' hint,
- in this case the a0+x should not be past the "t0-32" address. This
- means: for x=128 the last "safe" a0 address is "t0-160". Alternatively,
- for x=64 the last "safe" a0 address is "t0-96" In the current version we
- will use "prefetch hint,128(a0)", so "t0-160" is the limit. */
-#if defined(USE_PREFETCH) \
- && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
- PTR_ADDU $t0,$a0,$a2 /* t0 is the "past the end" address */
- PTR_SUBU $t9,$t0,PREFETCH_LIMIT /* t9 is the "last safe pref" address */
-#endif
-#if defined(USE_PREFETCH) \
- && (PREFETCH_STORE_HINT != PREFETCH_HINT_PREPAREFORSTORE)
- PREFETCH_FOR_STORE (1, $a0)
- PREFETCH_FOR_STORE (2, $a0)
- PREFETCH_FOR_STORE (3, $a0)
-#endif
-
-L(loop16w):
-#if defined(USE_PREFETCH) \
- && (PREFETCH_STORE_HINT == PREFETCH_HINT_PREPAREFORSTORE)
- sltu $v1,$t9,$a0 /* If a0 > t9 don't use next prefetch */
- bgtz $v1,L(skip_pref)
- nop
-#endif
-#ifndef R6_CODE
- PREFETCH_FOR_STORE (4, $a0)
- PREFETCH_FOR_STORE (5, $a0)
-#else
- PREFETCH_FOR_STORE (2, $a0)
-#endif
-L(skip_pref):
- C_ST $a1,UNIT(0)($a0)
- C_ST $a1,UNIT(1)($a0)
- C_ST $a1,UNIT(2)($a0)
- C_ST $a1,UNIT(3)($a0)
- C_ST $a1,UNIT(4)($a0)
- C_ST $a1,UNIT(5)($a0)
- C_ST $a1,UNIT(6)($a0)
- C_ST $a1,UNIT(7)($a0)
- C_ST $a1,UNIT(8)($a0)
- C_ST $a1,UNIT(9)($a0)
- C_ST $a1,UNIT(10)($a0)
- C_ST $a1,UNIT(11)($a0)
- C_ST $a1,UNIT(12)($a0)
- C_ST $a1,UNIT(13)($a0)
- C_ST $a1,UNIT(14)($a0)
- C_ST $a1,UNIT(15)($a0)
- PTR_ADDIU $a0,$a0,UNIT(16) /* adding 64/128 to dest */
- bne $a0,$a3,L(loop16w)
- nop
- move $a2,$t8
-
-/* Here we have dest word-aligned but less than 64-bytes or 128 bytes to go.
- Check for a 32(64) byte chunk and copy if if there is one. Otherwise
- jump down to L(chk1w) to handle the tail end of the copy. */
-L(chkw):
- andi $t8,$a2,NSIZEMASK /* is there a 32-byte/64-byte chunk. */
- /* the t8 is the reminder count past 32-bytes */
- beq $a2,$t8,L(chk1w)/* when a2==t8, no 32-byte chunk */
- nop
- C_ST $a1,UNIT(0)($a0)
- C_ST $a1,UNIT(1)($a0)
- C_ST $a1,UNIT(2)($a0)
- C_ST $a1,UNIT(3)($a0)
- C_ST $a1,UNIT(4)($a0)
- C_ST $a1,UNIT(5)($a0)
- C_ST $a1,UNIT(6)($a0)
- C_ST $a1,UNIT(7)($a0)
- PTR_ADDIU $a0,$a0,UNIT(8)
-
-/* Here we have less than 32(64) bytes to set. Set up for a loop to
- copy one word (or double word) at a time. Set a2 to count how many
- bytes we have to copy after all the word (or double word) chunks are
- copied and a3 to the dest pointer after all the (d)word chunks have
- been copied. We will loop, incrementing a0 until a0 equals a3. */
-L(chk1w):
- andi $a2,$t8,(NSIZE-1) /* a2 is the reminder past one (d)word chunks */
- beq $a2,$t8,L(lastb)
- PTR_SUBU $a3,$t8,$a2 /* a3 is count of bytes in one (d)word chunks */
- PTR_ADDU $a3,$a0,$a3 /* a3 is the dst address after loop */
-
-/* copying in words (4-byte or 8 byte chunks) */
-L(wordCopy_loop):
- PTR_ADDIU $a0,$a0,UNIT(1)
- bne $a0,$a3,L(wordCopy_loop)
- C_ST $a1,UNIT(-1)($a0)
-
-/* Copy the last 8 (or 16) bytes */
-L(lastb):
- blez $a2,L(leave)
- PTR_ADDU $a3,$a0,$a2 /* a3 is the last dst address */
-L(lastbloop):
- PTR_ADDIU $a0,$a0,1
- bne $a0,$a3,L(lastbloop)
- sb $a1,-1($a0)
-L(leave):
- j $ra
- nop
-
- .set at
- .set reorder
-END(memset)
-#ifndef __ANDROID__
-# ifdef _LIBC
-libc_hidden_builtin_def (memset)
-libc_hidden_builtin_def (__memset_chk)
-# endif
-#endif
diff --git a/libc/arch-mips/string/strchr.c b/libc/arch-mips/string/strchr.c
deleted file mode 100644
index 3458f66..0000000
--- a/libc/arch-mips/string/strchr.c
+++ /dev/null
@@ -1,138 +0,0 @@
-/*
- * Copyright (c) 2017 Imagination Technologies.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer
- * in the documentation and/or other materials provided with
- * the distribution.
- * * Neither the name of Imagination Technologies nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <string.h>
-
-#define op_t unsigned long int
-#define op_size sizeof (op_t)
-
-#if __mips64
-typedef struct
-{
- op_t B0:8, B1:8, B2:8, B3:8, B4:8, B5:8, B6:8, B7:8;
-} bits_t;
-#else
-typedef struct
-{
- op_t B0:8, B1:8, B2:8, B3:8;
-} bits_t;
-#endif
-
-typedef union
-{
- op_t v;
- bits_t b;
-} bitfields_t;
-
-#define DO_BYTE(i) \
- if (a.b.B##i != ch) { \
- if(a.b.B##i == '\0') return 0; \
- p++; \
- } else \
- return (char *)p;
-
-#define DO_WORD(w, cnt) { \
- op_t val = w[cnt] ^ mask_c; \
- if ((((w[cnt] - mask_1) & ~w[cnt]) & mask_128) || \
- (((val - mask_1) & ~val) & mask_128)) { \
- return do_bytes(w + cnt, ch); \
- } \
-}
-
-static inline char * __attribute__ ((always_inline))
-do_bytes (const op_t* w, unsigned char ch)
-{
- bitfields_t a;
- unsigned char* p = (unsigned char *) w;
- a.v = *w;
-#if __mips64
- DO_BYTE(0)
- DO_BYTE(1)
- DO_BYTE(2)
- DO_BYTE(3)
- DO_BYTE(4)
- DO_BYTE(5)
- DO_BYTE(6)
- DO_BYTE(7)
-#else
- DO_BYTE(0)
- DO_BYTE(1)
- DO_BYTE(2)
- DO_BYTE(3)
-#endif
- return (char *)p;
-}
-
-char* strchr(const char* s, int c)
-{
- const op_t *w;
- op_t mask_1, mask_128, mask_c;
- const unsigned char ch = c;
- unsigned char* p = (unsigned char *) s;
-
- /*
- * Check byte by byte till initial alignment
- */
- for ( ; *p != ch && ((size_t) p % op_size) != 0; p++)
- if (*p == '\0')
- return 0;
-
- if (*p != ch) {
- w = (const op_t *) p;
-
- mask_c = ch | (ch << 8);
- mask_c |= mask_c << 16;
- __asm__ volatile (
- "li %0, 0x01010101 \n\t"
- : "=r" (mask_1)
- );
-#if __mips64
- mask_1 |= mask_1 << 32;
- mask_c |= mask_c << 32;
-#endif
- mask_128 = mask_1 << 7;
-
- /*
- * Check word/dword wize after initial alignment till character match
- * or end of string
- */
- while (1) {
- DO_WORD(w, 0)
- DO_WORD(w, 1)
- DO_WORD(w, 2)
- DO_WORD(w, 3)
- w += 4;
- }
- }
-
- return (char *)p;
-}
diff --git a/libc/arch-mips/string/strcmp.S b/libc/arch-mips/string/strcmp.S
deleted file mode 100644
index 4791a0d..0000000
--- a/libc/arch-mips/string/strcmp.S
+++ /dev/null
@@ -1,362 +0,0 @@
-/*
- * Copyright (c) 2017 Imagination Technologies.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer
- * in the documentation and/or other materials provided with
- * the distribution.
- * * Neither the name of Imagination Technologies nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifdef __ANDROID__
-# include <private/bionic_asm.h>
-#elif _LIBC
-# include <sysdep.h>
-# include <regdef.h>
-# include <sys/asm.h>
-#elif _COMPILING_NEWLIB
-# include "machine/asm.h"
-# include "machine/regdef.h"
-#else
-# include <regdef.h>
-# include <sys/asm.h>
-#endif
-
-#if __mips64
-# define NSIZE 8
-# define LW ld
-# define EXT dext
-# define SRL dsrl
-# define SLL dsll
-# define SUBU dsubu
-#else
-# define NSIZE 4
-# define LW lw
-# define EXT ext
-# define SRL srl
-# define SLL sll
-# define SUBU subu
-#endif
-
-/* Technically strcmp should not read past the end of the strings being
- compared. We will read a full word that may contain excess bits beyond
- the NULL string terminator but unless ENABLE_READAHEAD is set, we will not
- read the next word after the end of string. Setting ENABLE_READAHEAD will
- improve performance but is technically illegal based on the definition of
- strcmp. */
-#ifdef ENABLE_READAHEAD
-# define DELAY_READ
-#else
-# define DELAY_READ nop
-#endif
-
-/* Testing on a little endian machine showed using CLZ was a
- performance loss, so we are not turning it on by default. */
-#if defined(ENABLE_CLZ) && (__mips_isa_rev > 1)
-# define USE_CLZ
-#endif
-
-/* Some asm.h files do not have the L macro definition. */
-#ifndef L
-# if _MIPS_SIM == _ABIO32
-# define L(label) $L ## label
-# else
-# define L(label) .L ## label
-# endif
-#endif
-
-/* Some asm.h files do not have the PTR_ADDIU macro definition. */
-#ifndef PTR_ADDIU
-# if _MIPS_SIM == _ABIO32
-# define PTR_ADDIU addiu
-# else
-# define PTR_ADDIU daddiu
-# endif
-#endif
-
-/* It might seem better to do the 'beq' instruction between the two 'lbu'
- instructions so that the nop is not needed but testing showed that this
- code is actually faster (based on glibc strcmp test). */
-#define BYTECMP01(OFFSET) \
- lbu $v0, OFFSET($a0); \
- lbu $v1, OFFSET($a1); \
- beq $v0, $zero, L(bexit01); \
- nop; \
- bne $v0, $v1, L(bexit01)
-
-#define BYTECMP89(OFFSET) \
- lbu $t8, OFFSET($a0); \
- lbu $t9, OFFSET($a1); \
- beq $t8, $zero, L(bexit89); \
- nop; \
- bne $t8, $t9, L(bexit89)
-
-/* Allow the routine to be named something else if desired. */
-#ifndef STRCMP_NAME
-# define STRCMP_NAME strcmp
-#endif
-
-#ifdef __ANDROID__
-LEAF(STRCMP_NAME, 0)
-#else
-LEAF(STRCMP_NAME)
-#endif
- .set nomips16
- .set noreorder
-
- andi $t1, $a1, (NSIZE - 1)
- beqz $t1, L(exitalign)
- or $t0, $zero, NSIZE
- SUBU $t1, $t0, $t1 #process (NSIZE - 1) bytes at max
-
-L(alignloop): #do by bytes until a1 aligned
- BYTECMP01(0)
- SUBU $t1, $t1, 0x1
- PTR_ADDIU $a0, $a0, 0x1
- bnez $t1, L(alignloop)
- PTR_ADDIU $a1, $a1, 0x1
-
-L(exitalign):
-
-/* string a1 is NSIZE byte aligned at this point. */
-
- lui $t8, 0x0101
- ori $t8, 0x0101
- lui $t9, 0x7f7f
- ori $t9, 0x7f7f
-#if __mips64
- dsll $t1, $t8, 32
- or $t8, $t1
- dsll $t1, $t9, 32
- or $t9, $t1
-#endif
-
- andi $t2, $a0, (NSIZE - 1) #check if a0 aligned
- SUBU $t3, $t0, $t2 #t3 will be used as shifter
- bnez $t2, L(uloopenter)
- SUBU $a2, $a0, $t2 #bring back a0 to aligned position
-
-#define STRCMPW(OFFSET) \
- LW $v0, OFFSET($a0); \
- LW $v1, OFFSET($a1); \
- SUBU $t0, $v0, $t8; \
- bne $v0, $v1, L(worddiff); \
- nor $t1, $v0, $t9; \
- and $t0, $t0, $t1; \
- bne $t0, $zero, L(returnzero);\
-
-L(wordloop):
- STRCMPW(0 * NSIZE)
- DELAY_READ
- STRCMPW(1 * NSIZE)
- DELAY_READ
- STRCMPW(2 * NSIZE)
- DELAY_READ
- STRCMPW(3 * NSIZE)
- DELAY_READ
- STRCMPW(4 * NSIZE)
- DELAY_READ
- STRCMPW(5 * NSIZE)
- DELAY_READ
- STRCMPW(6 * NSIZE)
- DELAY_READ
- STRCMPW(7 * NSIZE)
- PTR_ADDIU $a0, $a0, (8 * NSIZE)
- b L(wordloop)
- PTR_ADDIU $a1, $a1, (8 * NSIZE)
-
-#define USTRCMPW(OFFSET) \
- LW $v1, OFFSET($a1); \
- SUBU $t0, $v0, $t8; \
- nor $t1, $v0, $t9; \
- and $t0, $t0, $t1; \
- bne $t0, $zero, L(worddiff); \
- SRL $v0, $t2; \
- LW $a3, (OFFSET + NSIZE)($a2); \
- SUBU $t0, $v1, $t8; \
- SLL $t1, $a3, $t3; \
- or $v0, $v0, $t1; \
- bne $v0, $v1, L(worddiff); \
- nor $t1, $v1, $t9; \
- and $t0, $t0, $t1; \
- bne $t0, $zero, L(returnzero); \
- move $v0, $a3;\
-
-L(uloopenter):
- LW $v0, 0($a2)
- SLL $t2, 3 #multiply by 8
- SLL $t3, 3 #multiply by 8
- li $a3, -1 #all 1s
- SRL $a3, $t3
- or $v0, $a3 #replace with all 1s if zeros in unintented read
-
-L(uwordloop):
- USTRCMPW(0 * NSIZE)
- USTRCMPW(1 * NSIZE)
- USTRCMPW(2 * NSIZE)
- USTRCMPW(3 * NSIZE)
- USTRCMPW(4 * NSIZE)
- USTRCMPW(5 * NSIZE)
- USTRCMPW(6 * NSIZE)
- USTRCMPW(7 * NSIZE)
- PTR_ADDIU $a2, $a2, (8 * NSIZE)
- b L(uwordloop)
- PTR_ADDIU $a1, $a1, (8 * NSIZE)
-
-L(returnzero):
- j $ra
- move $v0, $zero
-
-#if __mips_isa_rev > 1
-#define EXT_COMPARE01(POS) \
- EXT $t0, $v0, POS, 8; \
- beq $t0, $zero, L(wexit01); \
- EXT $t1, $v1, POS, 8; \
- bne $t0, $t1, L(wexit01)
-#define EXT_COMPARE89(POS) \
- EXT $t8, $v0, POS, 8; \
- beq $t8, $zero, L(wexit89); \
- EXT $t9, $v1, POS, 8; \
- bne $t8, $t9, L(wexit89)
-#else
-#define EXT_COMPARE01(POS) \
- SRL $t0, $v0, POS; \
- SRL $t1, $v1, POS; \
- andi $t0, $t0, 0xff; \
- beq $t0, $zero, L(wexit01); \
- andi $t1, $t1, 0xff; \
- bne $t0, $t1, L(wexit01)
-#define EXT_COMPARE89(POS) \
- SRL $t8, $v0, POS; \
- SRL $t9, $v1, POS; \
- andi $t8, $t8, 0xff; \
- beq $t8, $zero, L(wexit89); \
- andi $t9, $t9, 0xff; \
- bne $t8, $t9, L(wexit89)
-#endif
-
-L(worddiff):
-#ifdef USE_CLZ
- SUBU $t0, $v0, $t8
- nor $t1, $v0, $t9
- and $t1, $t0, $t1
- xor $t0, $v0, $v1
- or $t0, $t0, $t1
-# if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
- wsbh $t0, $t0
- rotr $t0, $t0, 16
-# endif
- clz $t1, $t0
- and $t1, 0xf8
-# if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
- neg $t1
- addu $t1, 24
-# endif
- rotrv $v0, $v0, $t1
- rotrv $v1, $v1, $t1
- and $v0, $v0, 0xff
- and $v1, $v1, 0xff
- j $ra
- SUBU $v0, $v0, $v1
-#else /* USE_CLZ */
-# if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
- andi $t0, $v0, 0xff
- beq $t0, $zero, L(wexit01)
- andi $t1, $v1, 0xff
- bne $t0, $t1, L(wexit01)
- EXT_COMPARE89(8)
- EXT_COMPARE01(16)
-#ifndef __mips64
- SRL $t8, $v0, 24
- SRL $t9, $v1, 24
-#else
- EXT_COMPARE89(24)
- EXT_COMPARE01(32)
- EXT_COMPARE89(40)
- EXT_COMPARE01(48)
- SRL $t8, $v0, 56
- SRL $t9, $v1, 56
-#endif
-
-# else /* __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ */
-#ifdef __mips64
- SRL $t0, $v0, 56
- beq $t0, $zero, L(wexit01)
- SRL $t1, $v1, 56
- bne $t0, $t1, L(wexit01)
- EXT_COMPARE89(48)
- EXT_COMPARE01(40)
- EXT_COMPARE89(32)
- EXT_COMPARE01(24)
-#else
- SRL $t0, $v0, 24
- beq $t0, $zero, L(wexit01)
- SRL $t1, $v1, 24
- bne $t0, $t1, L(wexit01)
-#endif
- EXT_COMPARE89(16)
- EXT_COMPARE01(8)
-
- andi $t8, $v0, 0xff
- andi $t9, $v1, 0xff
-# endif /* __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ */
-
-L(wexit89):
- j $ra
- SUBU $v0, $t8, $t9
-L(wexit01):
- j $ra
- SUBU $v0, $t0, $t1
-#endif /* USE_CLZ */
-
-L(byteloop):
- BYTECMP01(0)
- BYTECMP89(1)
- BYTECMP01(2)
- BYTECMP89(3)
- BYTECMP01(4)
- BYTECMP89(5)
- BYTECMP01(6)
- BYTECMP89(7)
- PTR_ADDIU $a0, $a0, 8
- b L(byteloop)
- PTR_ADDIU $a1, $a1, 8
-
-L(bexit01):
- j $ra
- SUBU $v0, $v0, $v1
-L(bexit89):
- j $ra
- SUBU $v0, $t8, $t9
-
- .set at
- .set reorder
-
-END(STRCMP_NAME)
-#ifndef __ANDROID__
-# ifdef _LIBC
-libc_hidden_builtin_def (STRCMP_NAME)
-# endif
-#endif
diff --git a/libc/arch-mips/string/strcpy.c b/libc/arch-mips/string/strcpy.c
deleted file mode 100644
index b77105e..0000000
--- a/libc/arch-mips/string/strcpy.c
+++ /dev/null
@@ -1,204 +0,0 @@
-/*
- * Copyright (c) 2017 Imagination Technologies.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer
- * in the documentation and/or other materials provided with
- * the distribution.
- * * Neither the name of Imagination Technologies nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <string.h>
-
-#define op_t unsigned long int
-
-#if !defined(UNALIGNED_INSTR_SUPPORT)
-/* does target have unaligned lw/ld/ualw/uald instructions? */
-#define UNALIGNED_INSTR_SUPPORT 0
-#if __mips_isa_rev < 6 && !__mips1
-#undef UNALIGNED_INSTR_SUPPORT
-#define UNALIGNED_INSTR_SUPPORT 1
-#endif
-#endif
-
-#if !defined(HW_UNALIGNED_SUPPORT)
-/* Does target have hardware support for unaligned accesses? */
-#define HW_UNALIGNED_SUPPORT 0
-#if __mips_isa_rev >= 6
-#undef HW_UNALIGNED_SUPPORT
-#define HW_UNALIGNED_SUPPORT 1
-#endif
-#endif
-
-#if __mips64
-typedef struct
-{
- op_t B0:8, B1:8, B2:8, B3:8, B4:8, B5:8, B6:8, B7:8;
-} bits_t;
-#else
-typedef struct
-{
- op_t B0:8, B1:8, B2:8, B3:8;
-} bits_t;
-#endif
-
-typedef union
-{
- op_t v;
- bits_t b;
-} bitfields_t;
-
-#if !HW_UNALIGNED_SUPPORT && UNALIGNED_INSTR_SUPPORT
-/* for MIPS GCC, there are no unaligned builtins - so this struct forces
- the compiler to treat the pointer access as unaligned. */
-struct ulw
-{
- op_t uli;
-} __attribute__ ((packed));
-#endif /* !HW_UNALIGNED_SUPPORT && UNALIGNED_INSTR_SUPPORT */
-
-#define DO_BYTE(i, ptdst) { \
- *(ptdst+i) = a.b.B##i; \
- if(a.b.B##i == '\0') \
- return ret; \
-}
-
-#if __mips64
-#define DO_BYTES(val, dst) { \
- bitfields_t a; \
- char *tdst = (char *)(dst); \
- a.v = val; \
- DO_BYTE(0, tdst) \
- DO_BYTE(1, tdst) \
- DO_BYTE(2, tdst) \
- DO_BYTE(3, tdst) \
- DO_BYTE(4, tdst) \
- DO_BYTE(5, tdst) \
- DO_BYTE(6, tdst) \
- DO_BYTE(7, tdst) \
-}
-#else
-#define DO_BYTES(val, dst) { \
- bitfields_t a; \
- char *tdst = (char *)(dst); \
- a.v = val; \
- DO_BYTE(0, tdst) \
- DO_BYTE(1, tdst) \
- DO_BYTE(2, tdst) \
- DO_BYTE(3, tdst) \
-}
-#endif
-
-#define DO_WORD_ALIGNED(dst, src) { \
- op_t val = *(src); \
- if ((((val - mask_1) & ~val) & mask_128) != 0) { \
- DO_BYTES(val, dst); \
- } else *(dst) = val; \
-}
-
-#if !HW_UNALIGNED_SUPPORT
-#if UNALIGNED_INSTR_SUPPORT
-#define DO_WORD_UNALIGNED(dst, src) { \
- op_t val = *(src); \
- if ((((val - mask_1) & ~val) & mask_128) != 0) { \
- DO_BYTES(val, dst); \
- } else { \
- struct ulw *a = (struct ulw *)(dst); \
- a->uli = val; \
- } \
-}
-#else
-#define DO_WORD_UNALIGNED(dst, src) { \
- op_t val = *(src); \
- if ((((val - mask_1) & ~val) & mask_128) != 0) { \
- DO_BYTES(val, dst); \
- } else { \
- char *pdst = (char *) dst; \
- const char *psrc = (const char *) src; \
- for (; (*pdst = *psrc) != '\0'; ++psrc, ++pdst); \
- return ret; \
- } \
-}
-#endif /* UNALIGNED_INSTR_SUPPORT */
-
-#define PROCESS_UNALIGNED_WORDS(a, b) { \
- while (1) { \
- DO_WORD_UNALIGNED(a, b); \
- DO_WORD_UNALIGNED(a + 1, b + 1); \
- DO_WORD_UNALIGNED(a + 2, b + 2); \
- DO_WORD_UNALIGNED(a + 3, b + 3); \
- a += 4; \
- b += 4; \
- } \
-}
-#endif /* HW_UNALIGNED_SUPPORT */
-
-#define PROCESS_ALIGNED_WORDS(a, b) { \
- while (1) { \
- DO_WORD_ALIGNED(a, b); \
- DO_WORD_ALIGNED(a + 1, b + 1); \
- DO_WORD_ALIGNED(a + 2, b + 2); \
- DO_WORD_ALIGNED(a + 3, b + 3); \
- a += 4; \
- b += 4; \
- } \
-}
-
-char *
-strcpy (char *to, const char *from)
-{
- char *ret = to;
- op_t mask_1, mask_128;
- const op_t *src;
- op_t *dst;
-
- for (; (*to = *from) != '\0' && ((size_t) from % sizeof (op_t)) != 0; ++from, ++to);
-
- if(*to != '\0') {
- __asm__ volatile (
- "li %0, 0x01010101 \n\t"
- : "=r" (mask_1)
- );
-#if __mips64
- mask_1 |= mask_1 << 32;
-#endif
- mask_128 = mask_1 << 7;
-
- src = (const op_t *) from;
- dst = (op_t *) to;
-
-#if HW_UNALIGNED_SUPPORT
- PROCESS_ALIGNED_WORDS(dst, src);
-#else
- if (((unsigned long) dst) % sizeof (op_t) == 0) {
- PROCESS_ALIGNED_WORDS(dst, src);
- } else {
- PROCESS_UNALIGNED_WORDS(dst, src);
- }
-#endif
- }
-
- return ret;
-}
diff --git a/libc/arch-mips/string/strlen.c b/libc/arch-mips/string/strlen.c
deleted file mode 100644
index 28463f6..0000000
--- a/libc/arch-mips/string/strlen.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/*
- * Copyright (c) 2017 Imagination Technologies.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer
- * in the documentation and/or other materials provided with
- * the distribution.
- * * Neither the name of Imagination Technologies nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <string.h>
-
-#define op_t unsigned long int
-#define op_size sizeof (op_t)
-
-#if __mips64 || __mips_isa_rev >= 2
-static inline size_t __attribute__ ((always_inline))
-do_bytes (const char *base, const char *p, op_t inval)
-{
- op_t outval = 0;
-#if __mips64
- __asm__ volatile (
- "dsbh %1, %0 \n\t"
- "dshd %0, %1 \n\t"
- "dclz %1, %0 \n\t"
- : "+r" (inval), "+r" (outval)
- );
-#else
- __asm__ volatile (
- "wsbh %1, %0 \n\t"
- "rotr %0, %1, 16 \n\t"
- "clz %1, %0 \n\t"
- : "+r" (inval), "+r" (outval)
- );
-#endif
- p += (outval >> 3);
- return (size_t) (p - base);
-}
-
-#define DO_WORD(w, cnt) { \
- op_t val = ((w[cnt] - mask_1) & ~w[cnt]) & mask_128; \
- if (val) \
- return do_bytes(str, (const char *)(w + cnt), val); \
-}
-#else
-static inline size_t __attribute__ ((always_inline))
-do_bytes (const char *base, const char *p)
-{
- for (; *p; ++p);
- return (size_t) (p - base);
-}
-
-#define DO_WORD(w, cnt) { \
- if (((w[cnt] - mask_1) & ~w[cnt]) & mask_128) \
- return do_bytes(str, (const char *)(w + cnt)); \
-}
-#endif
-
-size_t
-strlen (const char *str)
-{
- if (*str) {
- const char *p = (const char *) str;
- const op_t *w;
- op_t mask_1, mask_128;
-
- while ((size_t) p % sizeof (op_t)) {
- if (!(*p))
- return (p - str);
- p++;
- }
-
- __asm__ volatile (
- "li %0, 0x01010101 \n\t"
- : "=r" (mask_1)
- );
-#if __mips64
- mask_1 |= mask_1 << 32;
-#endif
- mask_128 = mask_1 << 7;
-
- w = (const op_t *) p;
-
- while (1) {
- DO_WORD(w, 0);
- DO_WORD(w, 1);
- DO_WORD(w, 2);
- DO_WORD(w, 3);
- w += 4;
- }
- }
- return 0;
-}
diff --git a/libc/arch-mips/string/strncmp.S b/libc/arch-mips/string/strncmp.S
deleted file mode 100644
index 49250a0..0000000
--- a/libc/arch-mips/string/strncmp.S
+++ /dev/null
@@ -1,401 +0,0 @@
-/*
- * Copyright (c) 2017 Imagination Technologies.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer
- * in the documentation and/or other materials provided with
- * the distribution.
- * * Neither the name of Imagination Technologies nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#ifdef __ANDROID__
-# include <private/bionic_asm.h>
-#elif _LIBC
-# include <sysdep.h>
-# include <regdef.h>
-# include <sys/asm.h>
-#elif _COMPILING_NEWLIB
-# include "machine/asm.h"
-# include "machine/regdef.h"
-#else
-# include <regdef.h>
-# include <sys/asm.h>
-#endif
-
-#if __mips64
-# define NSIZE 8
-# define LW ld
-# define LWR ldr
-# define LWL ldl
-# define EXT dext
-# define SRL dsrl
-# define SUBU dsubu
-#else
-# define NSIZE 4
-# define LW lw
-# define LWR lwr
-# define LWL lwl
-# define EXT ext
-# define SRL srl
-# define SUBU subu
-#endif
-
-/* Technically strcmp should not read past the end of the strings being
- compared. We will read a full word that may contain excess bits beyond
- the NULL string terminator but unless ENABLE_READAHEAD is set, we will not
- read the next word after the end of string. Setting ENABLE_READAHEAD will
- improve performance but is technically illegal based on the definition of
- strcmp. */
-#ifdef ENABLE_READAHEAD
-# define DELAY_READ
-#else
-# define DELAY_READ nop
-#endif
-
-/* Testing on a little endian machine showed using CLZ was a
- performance loss, so we are not turning it on by default. */
-#if defined(ENABLE_CLZ) && (__mips_isa_rev > 1) && (!__mips64)
-# define USE_CLZ
-#endif
-
-/* Some asm.h files do not have the L macro definition. */
-#ifndef L
-# if _MIPS_SIM == _ABIO32
-# define L(label) $L ## label
-# else
-# define L(label) .L ## label
-# endif
-#endif
-
-/* Some asm.h files do not have the PTR_ADDIU macro definition. */
-#ifndef PTR_ADDIU
-# if _MIPS_SIM == _ABIO32
-# define PTR_ADDIU addiu
-# else
-# define PTR_ADDIU daddiu
-# endif
-#endif
-
-/* It might seem better to do the 'beq' instruction between the two 'lbu'
- instructions so that the nop is not needed but testing showed that this
- code is actually faster (based on glibc strcmp test). */
-#define BYTECMP01(OFFSET) \
- lbu $v0, OFFSET($a0); \
- lbu $v1, OFFSET($a1); \
- beq $v0, $zero, L(bexit01); \
- nop; \
- bne $v0, $v1, L(bexit01)
-
-#define BYTECMP89(OFFSET) \
- lbu $t8, OFFSET($a0); \
- lbu $t9, OFFSET($a1); \
- beq $t8, $zero, L(bexit89); \
- nop; \
- bne $t8, $t9, L(bexit89)
-
-/* Allow the routine to be named something else if desired. */
-#ifndef STRNCMP_NAME
-# define STRNCMP_NAME strncmp
-#endif
-
-#ifdef __ANDROID__
-LEAF(STRNCMP_NAME, 0)
-#else
-LEAF(STRNCMP_NAME)
-#endif
- .set nomips16
- .set noreorder
-
- srl $t0, $a2, (2 + NSIZE / 4)
- beqz $t0, L(byteloop) #process by bytes if less than (2 * NSIZE)
- andi $t1, $a1, (NSIZE - 1)
- beqz $t1, L(exitalign)
- or $t0, $zero, NSIZE
- SUBU $t1, $t0, $t1 #process (NSIZE - 1) bytes at max
- SUBU $a2, $a2, $t1 #dec count by t1
-
-L(alignloop): #do by bytes until a1 aligned
- BYTECMP01(0)
- SUBU $t1, $t1, 0x1
- PTR_ADDIU $a0, $a0, 0x1
- bne $t1, $zero, L(alignloop)
- PTR_ADDIU $a1, $a1, 0x1
-
-L(exitalign):
-
-/* string a1 is NSIZE byte aligned at this point. */
-#ifndef __mips1
- lui $t8, 0x0101
- ori $t8, 0x0101
- lui $t9, 0x7f7f
- ori $t9, 0x7f7f
-#if __mips64
- dsll $t0, $t8, 32
- or $t8, $t0
- dsll $t1, $t9, 32
- or $t9, $t1
-#endif
-#endif
-
-/* hardware or software alignment not supported for mips1
- rev6 archs have h/w unaligned support
- remainings archs need to implemented with unaligned instructions */
-
-#if __mips1
- andi $t0, $a0, (NSIZE - 1)
- bne $t0, $zero, L(byteloop)
-#elif __mips_isa_rev < 6
- andi $t0, $a0, (NSIZE - 1)
- bne $t0, $zero, L(uwordloop)
-#endif
-
-#define STRCMPW(OFFSET) \
- LW $v0, (OFFSET)($a0); \
- LW $v1, (OFFSET)($a1); \
- SUBU $t0, $v0, $t8; \
- bne $v0, $v1, L(worddiff); \
- nor $t1, $v0, $t9; \
- and $t0, $t0, $t1; \
- bne $t0, $zero, L(returnzero);\
-
-L(wordloop):
- SUBU $t1, $a2, (8 * NSIZE)
- bltz $t1, L(onewords)
- STRCMPW(0 * NSIZE)
- DELAY_READ
- STRCMPW(1 * NSIZE)
- DELAY_READ
- STRCMPW(2 * NSIZE)
- DELAY_READ
- STRCMPW(3 * NSIZE)
- DELAY_READ
- STRCMPW(4 * NSIZE)
- DELAY_READ
- STRCMPW(5 * NSIZE)
- DELAY_READ
- STRCMPW(6 * NSIZE)
- DELAY_READ
- STRCMPW(7 * NSIZE)
- SUBU $a2, $a2, (8 * NSIZE)
- PTR_ADDIU $a0, $a0, (8 * NSIZE)
- b L(wordloop)
- PTR_ADDIU $a1, $a1, (8 * NSIZE)
-
-L(onewords):
- SUBU $t1, $a2, NSIZE
- bltz $t1, L(byteloop)
- STRCMPW(0)
- SUBU $a2, $a2, NSIZE
- PTR_ADDIU $a0, $a0, NSIZE
- b L(onewords)
- PTR_ADDIU $a1, $a1, NSIZE
-
-#if __mips_isa_rev < 6 && !__mips1
-#define USTRCMPW(OFFSET) \
- LWR $v0, (OFFSET)($a0); \
- LWL $v0, (OFFSET + NSIZE - 1)($a0); \
- LW $v1, (OFFSET)($a1); \
- SUBU $t0, $v0, $t8; \
- bne $v0, $v1, L(worddiff); \
- nor $t1, $v0, $t9; \
- and $t0, $t0, $t1; \
- bne $t0, $zero, L(returnzero);\
-
-L(uwordloop):
- SUBU $t1, $a2, (8 * NSIZE)
- bltz $t1, L(uonewords)
- USTRCMPW(0 * NSIZE)
- DELAY_READ
- USTRCMPW(1 * NSIZE)
- DELAY_READ
- USTRCMPW(2 * NSIZE)
- DELAY_READ
- USTRCMPW(3 * NSIZE)
- DELAY_READ
- USTRCMPW(4 * NSIZE)
- DELAY_READ
- USTRCMPW(5 * NSIZE)
- DELAY_READ
- USTRCMPW(6 * NSIZE)
- DELAY_READ
- USTRCMPW(7 * NSIZE)
- SUBU $a2, $a2, (8 * NSIZE)
- PTR_ADDIU $a0, $a0, (8 * NSIZE)
- b L(uwordloop)
- PTR_ADDIU $a1, $a1, (8 * NSIZE)
-
-L(uonewords):
- SUBU $t1, $a2, NSIZE
- bltz $t1, L(byteloop)
- USTRCMPW(0)
- SUBU $a2, $a2, NSIZE
- PTR_ADDIU $a0, $a0, NSIZE
- b L(uonewords)
- PTR_ADDIU $a1, $a1, NSIZE
-
-#endif
-
-L(returnzero):
- j $ra
- move $v0, $zero
-
-#if __mips_isa_rev > 1
-#define EXT_COMPARE01(POS) \
- EXT $t0, $v0, POS, 8; \
- beq $t0, $zero, L(wexit01); \
- EXT $t1, $v1, POS, 8; \
- bne $t0, $t1, L(wexit01)
-#define EXT_COMPARE89(POS) \
- EXT $t8, $v0, POS, 8; \
- beq $t8, $zero, L(wexit89); \
- EXT $t9, $v1, POS, 8; \
- bne $t8, $t9, L(wexit89)
-#else
-#define EXT_COMPARE01(POS) \
- SRL $t0, $v0, POS; \
- SRL $t1, $v1, POS; \
- andi $t0, $t0, 0xff; \
- beq $t0, $zero, L(wexit01); \
- andi $t1, $t1, 0xff; \
- bne $t0, $t1, L(wexit01)
-#define EXT_COMPARE89(POS) \
- SRL $t8, $v0, POS; \
- SRL $t9, $v1, POS; \
- andi $t8, $t8, 0xff; \
- beq $t8, $zero, L(wexit89); \
- andi $t9, $t9, 0xff; \
- bne $t8, $t9, L(wexit89)
-#endif
-
-L(worddiff):
-#ifdef USE_CLZ
- SUBU $t0, $v0, $t8
- nor $t1, $v0, $t9
- and $t1, $t0, $t1
- xor $t0, $v0, $v1
- or $t0, $t0, $t1
-# if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
- wsbh $t0, $t0
- rotr $t0, $t0, 16
-# endif
- clz $t1, $t0
- and $t1, 0xf8
-# if __BYTE_ORDER__ == __ORDER_BIG_ENDIAN__
- neg $t1
- addu $t1, 24
-# endif
- rotrv $v0, $v0, $t1
- rotrv $v1, $v1, $t1
- and $v0, $v0, 0xff
- and $v1, $v1, 0xff
- j $ra
- SUBU $v0, $v0, $v1
-#else /* USE_CLZ */
-# if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
- andi $t0, $v0, 0xff
- beq $t0, $zero, L(wexit01)
- andi $t1, $v1, 0xff
- bne $t0, $t1, L(wexit01)
- EXT_COMPARE89(8)
- EXT_COMPARE01(16)
-#ifndef __mips64
- SRL $t8, $v0, 24
- SRL $t9, $v1, 24
-#else
- EXT_COMPARE89(24)
- EXT_COMPARE01(32)
- EXT_COMPARE89(40)
- EXT_COMPARE01(48)
- SRL $t8, $v0, 56
- SRL $t9, $v1, 56
-#endif
-
-# else /* __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ */
-#ifdef __mips64
- SRL $t0, $v0, 56
- beq $t0, $zero, L(wexit01)
- SRL $t1, $v1, 56
- bne $t0, $t1, L(wexit01)
- EXT_COMPARE89(48)
- EXT_COMPARE01(40)
- EXT_COMPARE89(32)
- EXT_COMPARE01(24)
-#else
- SRL $t0, $v0, 24
- beq $t0, $zero, L(wexit01)
- SRL $t1, $v1, 24
- bne $t0, $t1, L(wexit01)
-#endif
- EXT_COMPARE89(16)
- EXT_COMPARE01(8)
-
- andi $t8, $v0, 0xff
- andi $t9, $v1, 0xff
-# endif /* __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ */
-
-L(wexit89):
- j $ra
- SUBU $v0, $t8, $t9
-L(wexit01):
- j $ra
- SUBU $v0, $t0, $t1
-#endif /* USE_CLZ */
-
-L(byteloop):
- beq $a2, $zero, L(returnzero)
- SUBU $a2, $a2, 1
- BYTECMP01(0)
- nop
- beq $a2, $zero, L(returnzero)
- SUBU $a2, $a2, 1
- BYTECMP89(1)
- nop
- beq $a2, $zero, L(returnzero)
- SUBU $a2, $a2, 1
- BYTECMP01(2)
- nop
- beq $a2, $zero, L(returnzero)
- SUBU $a2, $a2, 1
- BYTECMP89(3)
- PTR_ADDIU $a0, $a0, 4
- b L(byteloop)
- PTR_ADDIU $a1, $a1, 4
-
-L(bexit01):
- j $ra
- SUBU $v0, $v0, $v1
-L(bexit89):
- j $ra
- SUBU $v0, $t8, $t9
-
- .set at
- .set reorder
-
-END(STRNCMP_NAME)
-#ifndef __ANDROID__
-# ifdef _LIBC
-libc_hidden_builtin_def (STRNCMP_NAME)
-# endif
-#endif
diff --git a/libc/arch-mips/string/strnlen.c b/libc/arch-mips/string/strnlen.c
deleted file mode 100644
index 2011deb..0000000
--- a/libc/arch-mips/string/strnlen.c
+++ /dev/null
@@ -1,139 +0,0 @@
-/*
- * Copyright (c) 2017 Imagination Technologies.
- *
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- *
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer
- * in the documentation and/or other materials provided with
- * the distribution.
- * * Neither the name of Imagination Technologies nor the names of its
- * contributors may be used to endorse or promote products derived
- * from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
- * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
- * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
- * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
- * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
- * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
- * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include <string.h>
-
-#define op_t unsigned long int
-#define op_size sizeof (op_t)
-
-#if __mips64 || __mips_isa_rev >= 2
-static inline size_t __attribute__ ((always_inline))
-do_bytes (const char *base, const char *p, op_t inval)
-{
- op_t outval = 0;
-#if __mips64
- __asm__ volatile (
- "dsbh %1, %0 \n\t"
- "dshd %0, %1 \n\t"
- "dclz %1, %0 \n\t"
- : "+r" (inval), "+r" (outval)
- );
-#else
- __asm__ volatile (
- "wsbh %1, %0 \n\t"
- "rotr %0, %1, 16 \n\t"
- "clz %1, %0 \n\t"
- : "+r" (inval), "+r" (outval)
- );
-#endif
- p += (outval >> 3);
- return (size_t) (p - base);
-}
-
-#define DO_WORD(in, val) { \
- op_t tmp = ((val - mask_1) & ~val) & mask_128; \
- if (tmp) \
- return do_bytes(str, (const char *)(in), tmp); \
-}
-#else
-static inline size_t __attribute__ ((always_inline))
-do_bytes (const char *base, const char *p)
-{
- for (; *p; ++p);
- return (size_t) (p - base);
-}
-
-#define DO_WORD(in, val) { \
- if (((val - mask_1) & ~val) & mask_128) { \
- return do_bytes(str, (const char *)(in)); \
- } \
-}
-#endif
-
-size_t strnlen (const char *str, size_t n) {
- if (n != 0) {
- const char *p = (const char *) str;
- const op_t *w;
- op_t mask_1, mask_128;
-
- for (; n > 0 && ((size_t) p % op_size) != 0; --n, ++p) {
- if (!(*p))
- return (p - str);
- }
-
- w = (const op_t *) p;
-
- __asm__ volatile (
- "li %0, 0x01010101 \n\t"
- : "=r" (mask_1)
- );
-#if __mips64
- mask_1 |= mask_1 << 32;
-#endif
- mask_128 = mask_1 << 7;
-
- /*
- * Check op_size byteswize after initial alignment
- */
- while (n >= 4 * op_size) {
- const op_t w0 = w[0];
- const op_t w1 = w[1];
- const op_t w2 = w[2];
- const op_t w3 = w[3];
- DO_WORD(w + 0, w0)
- DO_WORD(w + 1, w1)
- DO_WORD(w + 2, w2)
- DO_WORD(w + 3, w3)
- w += 4;
- n -= 4 * op_size;
- }
-
- while (n >= op_size) {
- DO_WORD(w, w[0]);
- w++;
- n -= op_size;
- }
-
- /*
- * Check bytewize for remaining bytes
- */
- p = (const char *) w;
- for (; n > 0; --n, ++p) {
- if (!(*p))
- return (p - str);
- }
-
- return (p - str);
- }
-
- return 0;
-}
diff --git a/libc/arch-mips64/bionic/__bionic_clone.S b/libc/arch-mips64/bionic/__bionic_clone.S
deleted file mode 100644
index d725efc..0000000
--- a/libc/arch-mips64/bionic/__bionic_clone.S
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * Copyright (C) 2008 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <linux/errno.h>
-#include <linux/sched.h>
-
-#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
-FRAMESZ = MKFSIZ(NARGSAVE,0)
-FRAME_ARG = 0*REGSZ
-FRAME_FN = 1*REGSZ
-#else
-FRAMESZ = MKFSIZ(0,3)
-FRAME_GP = FRAMESZ-1*REGSZ
-FRAME_ARG = FRAMESZ-2*REGSZ
-FRAME_FN = FRAMESZ-3*REGSZ
-#endif
-
-// pid_t __bionic_clone(int flags, void* child_stack, pid_t* parent_tid, void* tls, pid_t* child_tid, int (*fn)(void*), void* arg);
-LEAF(__bionic_clone, FRAMESZ)
- PTR_SUBU $sp, FRAMESZ # allocate stack frame
- SETUP_GP64(FRAME_GP,__bionic_clone)
- SAVE_GP(FRAME_GP)
-
- # set up child stack
- PTR_SUBU $a1,FRAMESZ
-#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
- PTR_L $t0,FRAMESZ+5*REGSZ($sp) # fn
- PRL_L $t1,FRAMESZ+6*REGSZ($sp) # arg
- PTR_S $t0,FRAME_FN($a1) # fn
- PTR_S $t1,FRAME_ARG($a1) # arg
-#else
- PTR_L $t0,FRAME_GP($sp) # copy gp to child stack
- PTR_S $t0,FRAME_GP($a1)
- PTR_S $a5,FRAME_FN($a1) # fn
- PTR_S $a6,FRAME_ARG($a1) # arg
-# endif
-
- # remainder of arguments are correct for clone system call
- LI $v0,__NR_clone
- syscall
-
- move $a0,$v0
- bnez $a3,.L__error_bc
-
- beqz $v0,.L__thread_start_bc
-
- RESTORE_GP64
- PTR_ADDU $sp,FRAMESZ
- j $ra
-
-.L__thread_start_bc:
- # Clear return address in child so we don't unwind further.
- li $ra,0
-
- # void __start_thread(int (*func)(void*), void *arg)
- PTR_L $a0,FRAME_FN($sp) # fn
- PTR_L $a1,FRAME_ARG($sp) # arg
- LA $t9,__start_thread
- RESTORE_GP64
- /*
- * For O32 etc the child stack must have space for a0..a3 to be stored
- * For N64 etc, the child stack can be restored to the original value
- */
-#if !((_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32))
- PTR_ADDU $sp,FRAMESZ
-#endif
- j $t9
-
-.L__error_bc:
- LA $t9,__set_errno_internal
- RESTORE_GP64
- PTR_ADDU $sp,FRAMESZ
- j $t9
- END(__bionic_clone)
-.hidden __bionic_clone
diff --git a/libc/arch-mips64/bionic/_exit_with_stack_teardown.S b/libc/arch-mips64/bionic/_exit_with_stack_teardown.S
deleted file mode 100644
index 4f80801..0000000
--- a/libc/arch-mips64/bionic/_exit_with_stack_teardown.S
+++ /dev/null
@@ -1,41 +0,0 @@
-/*
- * Copyright (C) 2008 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-
-// void _exit_with_stack_teardown(void* stackBase, size_t stackSize)
-ENTRY_PRIVATE(_exit_with_stack_teardown)
- li $v0, __NR_munmap
- syscall
- // If munmap failed, we ignore the failure and exit anyway.
-
- li $a0, 0
- li $v0, __NR_exit
- syscall
- // The exit syscall does not return.
-END(_exit_with_stack_teardown)
diff --git a/libc/arch-mips64/bionic/crtbegin.c b/libc/arch-mips64/bionic/crtbegin.c
deleted file mode 100644
index bdd423b..0000000
--- a/libc/arch-mips64/bionic/crtbegin.c
+++ /dev/null
@@ -1,95 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include "../../bionic/libc_init_common.h"
-#include <stddef.h>
-#include <stdint.h>
-
-__attribute__ ((section (".preinit_array")))
-void (*__PREINIT_ARRAY__)(void) = (void (*)(void)) -1;
-
-__attribute__ ((section (".init_array")))
-void (*__INIT_ARRAY__)(void) = (void (*)(void)) -1;
-
-__attribute__ ((section (".fini_array")))
-void (*__FINI_ARRAY__)(void) = (void (*)(void)) -1;
-
-
-__LIBC_HIDDEN__ void do_mips_start(void *raw_args) {
- structors_array_t array;
- array.preinit_array = &__PREINIT_ARRAY__;
- array.init_array = &__INIT_ARRAY__;
- array.fini_array = &__FINI_ARRAY__;
-
- __libc_init(raw_args, NULL, &main, &array);
-}
-
-/*
- * This function prepares the return address with a branch-and-link
- * instruction (bal) and then uses a .cpsetup to compute the Global
- * Offset Table (GOT) pointer ($gp). The $gp is then used to load
- * the address of _do_mips_start() into $t9 just before calling it.
- * Terminating the stack with a NULL return address.
- */
-__asm__ (
-" .set push \n"
-" \n"
-" .text \n"
-" .align 4 \n"
-" .type __start,@function \n"
-" .globl __start \n"
-" .globl _start \n"
-" \n"
-" .ent __start \n"
-"__start: \n"
-" _start: \n"
-" .frame $sp,32,$0 \n"
-" .mask 0x80000000,-8 \n"
-" \n"
-" move $a0, $sp \n"
-" daddiu $sp, $sp, -32 \n"
-" \n"
-" .set noreorder \n"
-" bal 1f \n"
-" nop \n"
-"1: \n"
-" .cpsetup $ra,16,1b \n"
-" .set reorder \n"
-" \n"
-" sd $0, 24($sp) \n"
-" jal do_mips_start \n"
-" \n"
-"2: b 2b \n"
-" .end __start \n"
-" \n"
-" .set pop \n"
-);
-
-#include "../../arch-common/bionic/__dso_handle.h"
-#include "../../arch-common/bionic/atexit.h"
-#include "../../arch-common/bionic/pthread_atfork.h"
diff --git a/libc/arch-mips64/bionic/setjmp.S b/libc/arch-mips64/bionic/setjmp.S
deleted file mode 120000
index b117bb6..0000000
--- a/libc/arch-mips64/bionic/setjmp.S
+++ /dev/null
@@ -1 +0,0 @@
-../../arch-mips/bionic/setjmp.S
\ No newline at end of file
diff --git a/libc/arch-mips64/bionic/stat.cpp b/libc/arch-mips64/bionic/stat.cpp
deleted file mode 100644
index 63b6cd1..0000000
--- a/libc/arch-mips64/bionic/stat.cpp
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * Copyright (C) 2015 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <sys/stat.h>
-#include <sys/types.h>
-#include <sys/syscall.h>
-#include <unistd.h>
-
-struct kernel_stat {
- unsigned int st_dev;
- unsigned int st_pad0[3];
- unsigned long st_ino;
- mode_t st_mode;
- __u32 st_nlink;
- uid_t st_uid;
- gid_t st_gid;
- unsigned int st_rdev;
- unsigned int st_pad1[3];
- __kernel_off_t st_size;
- unsigned int _st_atime;
- unsigned int _st_atime_nsec;
- unsigned int _st_mtime;
- unsigned int _st_mtime_nsec;
- unsigned int _st_ctime;
- unsigned int _st_ctime_nsec;
- unsigned int st_blksize;
- unsigned int st_pad2;
- unsigned long st_blocks;
-};
-
-static void copy_stat(struct stat* st, struct kernel_stat* s) {
- st->st_dev = static_cast<dev_t>(s->st_dev);
- st->st_ino = static_cast<ino_t>(s->st_ino);
- st->st_mode = static_cast<mode_t>(s->st_mode);
- st->st_nlink = static_cast<nlink_t>(s->st_nlink);
- st->st_uid = static_cast<uid_t>(s->st_uid);
- st->st_gid = static_cast<gid_t>(s->st_gid);
- st->st_rdev = static_cast<dev_t>(s->st_rdev);
- st->st_size = static_cast<off_t>(s->st_size);
- st->st_blksize = static_cast<int>(s->st_blksize);
- st->st_blocks = static_cast<long>(s->st_blocks);
- st->st_atim.tv_sec = static_cast<time_t>(s->_st_atime);
- st->st_atim.tv_nsec = static_cast<long>(s->_st_atime_nsec);
- st->st_mtim.tv_sec = static_cast<time_t>(s->_st_mtime);
- st->st_mtim.tv_nsec = static_cast<long>(s->_st_mtime_nsec);
- st->st_ctim.tv_sec = static_cast<time_t>(s->_st_ctime);
- st->st_ctim.tv_nsec = static_cast<long>(s->_st_ctime_nsec);
-}
-
-int fstat(int fp, struct stat* st) {
- kernel_stat s;
- int ret = syscall(__NR_fstat, fp, &s);
- copy_stat(st, &s);
- return ret;
-}
-__strong_alias(fstat64, fstat);
-
-int fstatat(int dirfd, const char* pathname, struct stat* buf, int flags) {
- kernel_stat s;
- int ret = syscall(__NR_newfstatat, dirfd, pathname, &s, flags);
- copy_stat(buf, &s);
- return ret;
-}
-__strong_alias(fstatat64, fstatat);
diff --git a/libc/arch-mips64/bionic/syscall.S b/libc/arch-mips64/bionic/syscall.S
deleted file mode 100644
index ce5dfd3..0000000
--- a/libc/arch-mips64/bionic/syscall.S
+++ /dev/null
@@ -1,68 +0,0 @@
-/*
- * Copyright (C) 2013 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-
-#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
-FRAMESZ = MKFSIZ(6,0)
-#else
-FRAMESZ = MKFSIZ(0,1)
-FRAME_GP = FRAMESZ-1*REGSZ
-#endif
-
-LEAF(syscall,FRAMESZ)
- PTR_SUBU $sp, FRAMESZ # allocate stack frame
- SETUP_GP64(FRAME_GP,syscall)
- SAVE_GP(FRAME_GP)
- move $v0, $a0 # syscall number to v0
- move $a0, $a1 # shift args down
- move $a1, $a2
- move $a2, $a3
-#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
- REG_L $a3, FRAMESZ+4*REGSZ($sp)
- REG_L $t0, FRAMESZ+5*REGSZ($sp)
- REG_L $t1, FRAMESZ+6*REGSZ($sp)
- REG_S $t0, 4*REGSZ($sp)
- REG_S $t1, 5*REGSZ($sp)
-#else
- move $a3, $a4
- move $a4, $a5
- move $a5, $a6
-#endif
- syscall
- move $a0, $v0
- bnez $a3, 1f
- RESTORE_GP64
- PTR_ADDU $sp, FRAMESZ
- j $ra
-1:
- LA $t9,__set_errno_internal
- RESTORE_GP64
- PTR_ADDU $sp, FRAMESZ
- j $t9
- END(syscall)
diff --git a/libc/arch-mips64/bionic/vfork.S b/libc/arch-mips64/bionic/vfork.S
deleted file mode 100644
index b5ff5d4..0000000
--- a/libc/arch-mips64/bionic/vfork.S
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright (C) 2008 The Android Open Source Project
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * * Redistributions of source code must retain the above copyright
- * notice, this list of conditions and the following disclaimer.
- * * Redistributions in binary form must reproduce the above copyright
- * notice, this list of conditions and the following disclaimer in
- * the documentation and/or other materials provided with the
- * distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
- * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
- * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
- * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
- * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
- * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
- * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
- * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
- * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
- * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- */
-
-#include <private/bionic_asm.h>
-#include <linux/sched.h>
-
-// TODO: mips' uapi signal.h is missing #ifndef __ASSEMBLY__.
-// #include <asm/signal.h>
-#define SIGCHLD 18
-
- .text
-
-#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
-FRAMESZ = MKFSIZ(5,0)
-#else
-FRAMESZ = MKFSIZ(0,0)
-#endif
-
-LEAF(vfork,FRAMESZ)
-__BIONIC_WEAK_ASM_FOR_NATIVE_BRIDGE(vfork)
-#if FRAMESZ!=0
- PTR_SUBU $sp, FRAMESZ
-#endif
- SETUP_GP64($a5, vfork)
-
- // __get_tls()[TLS_SLOT_THREAD_ID]->cached_pid_ = 0
- rdhwr $v0, $29 // v0 = tls
- REG_L $v0, REGSZ*1($v0) // v0 = v0[TLS_SLOT_THREAD_ID ie 1]
- sw $0, REGSZ*2+4($v0) // v0->cached_pid_ = 0
-
- LI $a0, (CLONE_VM | CLONE_VFORK | SIGCHLD)
- move $a1, $0
- move $a2, $0
- move $a3, $0
-#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32)
- REG_S $0, 4*REGSZ(sp)
-#else
- move $a4, $0
-#endif
- LI $v0, __NR_clone
- syscall
-#if FRAMESZ!=0
- PTR_ADDU $sp,FRAMESZ
-#endif
- move $a0, $v0
- bnez $a3, 1f
- RESTORE_GP64
- j $ra
-1:
- LA $t9,__set_errno_internal
- RESTORE_GP64
- j $t9
- END(vfork)
diff --git a/libc/bionic/sys_msg.cpp b/libc/bionic/sys_msg.cpp
index 4880356..462c83b 100644
--- a/libc/bionic/sys_msg.cpp
+++ b/libc/bionic/sys_msg.cpp
@@ -32,9 +32,8 @@
#include <unistd.h>
int msgctl(int id, int cmd, msqid_ds* buf) {
-#if !defined(__LP64__) || defined(__mips__)
+#if !defined(__LP64__)
// Annoyingly, the kernel requires this for 32-bit but rejects it for 64-bit.
- // Mips64 is an exception to this, it requires the flag.
cmd |= IPC_64;
#endif
#if defined(SYS_msgctl)
diff --git a/libc/bionic/sys_sem.cpp b/libc/bionic/sys_sem.cpp
index 5e2a05c..058cfef 100644
--- a/libc/bionic/sys_sem.cpp
+++ b/libc/bionic/sys_sem.cpp
@@ -33,9 +33,8 @@
#include <unistd.h>
int semctl(int id, int num, int cmd, ...) {
-#if !defined(__LP64__) || defined(__mips__)
+#if !defined(__LP64__)
// Annoyingly, the kernel requires this for 32-bit but rejects it for 64-bit.
- // Mips64 is an exception to this, it requires the flag.
cmd |= IPC_64;
#endif
va_list ap;
diff --git a/libc/bionic/sys_shm.cpp b/libc/bionic/sys_shm.cpp
index f3b26e7..f780e04 100644
--- a/libc/bionic/sys_shm.cpp
+++ b/libc/bionic/sys_shm.cpp
@@ -45,9 +45,8 @@
}
int shmctl(int id, int cmd, struct shmid_ds* buf) {
-#if !defined(__LP64__) || defined(__mips__)
+#if !defined(__LP64__)
// Annoyingly, the kernel requires this for 32-bit but rejects it for 64-bit.
- // Mips64 is an exception to this, it requires the flag.
cmd |= IPC_64;
#endif
#if defined(SYS_shmctl)
diff --git a/libc/libc.map.txt b/libc/libc.map.txt
index 54da02e..37807be 100644
--- a/libc/libc.map.txt
+++ b/libc/libc.map.txt
@@ -9,7 +9,7 @@
__b64_ntop;
__b64_pton;
__cmsg_nxthdr; # introduced=21
- __connect; # arm x86 mips introduced=21
+ __connect; # arm x86 introduced=21
__ctype_get_mb_cur_max; # introduced=21
__cxa_atexit;
__cxa_finalize;
@@ -17,16 +17,16 @@
__dn_comp;
__dn_count_labels;
__dn_skipname;
- __epoll_pwait; # arm x86 mips introduced=21
+ __epoll_pwait; # arm x86 introduced=21
__errno;
- __exit; # arm x86 mips introduced=21
- __fadvise64; # x86 mips introduced=21
+ __exit; # arm x86 introduced=21
+ __fadvise64; # x86 introduced=21
__fbufsize; # introduced=23
- __fcntl64; # arm x86 mips
+ __fcntl64; # arm x86
__FD_CLR_chk; # introduced=21
__FD_ISSET_chk; # introduced=21
__FD_SET_chk; # introduced=21
- __fgets_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
+ __fgets_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
__flbf; # introduced=23
__fp_nquery;
__fp_query;
@@ -38,17 +38,17 @@
__fpurge; # introduced=23
__freadable; # introduced=23
__fsetlocking; # introduced=23
- __fstatfs64; # arm x86 mips
+ __fstatfs64; # arm x86
__fwritable; # introduced=23
__get_h_errno;
- __getcpu; # arm x86 mips introduced-arm=12 introduced-mips=16 introduced-x86=12
- __getcwd; # arm x86 mips
- __getpid; # arm x86 mips introduced=21
- __getpriority; # arm x86 mips
+ __getcpu; # arm x86 introduced-arm=12 introduced-x86=12
+ __getcwd; # arm x86
+ __getpid; # arm x86 introduced=21
+ __getpriority; # arm x86
__gnu_basename; # introduced=23
__gnu_strerror_r; # introduced=23
__hostalias;
- __ioctl; # arm x86 mips
+ __ioctl; # arm x86
__isfinite;
__isfinitef;
__isfinitel;
@@ -61,44 +61,44 @@
__isnormal;
__isnormalf;
__isnormall;
- __isthreaded; # arm x86 mips var
+ __isthreaded; # arm x86 var
__libc_current_sigrtmax; # introduced=21
__libc_current_sigrtmin; # introduced=21
__libc_init;
- __llseek; # arm x86 mips
+ __llseek; # arm x86
__loc_aton;
__loc_ntoa;
__memchr_chk; # introduced=23
- __memcpy_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- __memmove_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
+ __memcpy_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ __memmove_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
__memrchr_chk; # introduced=23
- __memset_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- __mmap2; # arm x86 mips
- __ns_format_ttl; # arm x86 mips
- __ns_get16; # arm x86 mips
- __ns_get32; # arm x86 mips
- __ns_initparse; # arm x86 mips
- __ns_makecanon; # arm x86 mips
- __ns_msg_getflag; # arm x86 mips
- __ns_name_compress; # arm x86 mips
- __ns_name_ntol; # arm x86 mips
- __ns_name_ntop; # arm x86 mips
- __ns_name_pack; # arm x86 mips
- __ns_name_pton; # arm x86 mips
- __ns_name_rollback; # arm x86 mips
- __ns_name_skip; # arm x86 mips
- __ns_name_uncompress; # arm x86 mips
- __ns_name_unpack; # arm x86 mips
- __ns_parserr; # arm x86 mips
- __ns_put16; # arm x86 mips
- __ns_put32; # arm x86 mips
- __ns_samename; # arm x86 mips
- __ns_skiprr; # arm x86 mips
- __ns_sprintrr; # arm x86 mips
- __ns_sprintrrf; # arm x86 mips
- __open_2; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- __openat; # arm x86 mips
- __openat_2; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
+ __memset_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ __mmap2; # arm x86
+ __ns_format_ttl; # arm x86
+ __ns_get16; # arm x86
+ __ns_get32; # arm x86
+ __ns_initparse; # arm x86
+ __ns_makecanon; # arm x86
+ __ns_msg_getflag; # arm x86
+ __ns_name_compress; # arm x86
+ __ns_name_ntol; # arm x86
+ __ns_name_ntop; # arm x86
+ __ns_name_pack; # arm x86
+ __ns_name_pton; # arm x86
+ __ns_name_rollback; # arm x86
+ __ns_name_skip; # arm x86
+ __ns_name_uncompress; # arm x86
+ __ns_name_unpack; # arm x86
+ __ns_parserr; # arm x86
+ __ns_put16; # arm x86
+ __ns_put32; # arm x86
+ __ns_samename; # arm x86
+ __ns_skiprr; # arm x86
+ __ns_sprintrr; # arm x86
+ __ns_sprintrrf; # arm x86
+ __open_2; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ __openat; # arm x86
+ __openat_2; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
__p_cdname;
__p_cdnname;
__p_class;
@@ -113,22 +113,22 @@
__p_type;
__p_type_syms; # var
__poll_chk; # introduced=23
- __ppoll; # arm x86 mips introduced=21
+ __ppoll; # arm x86 introduced=21
__ppoll_chk; # introduced=23
__ppoll64_chk; # introduced=28
__pread64_chk; # introduced=23
__pread_chk; # introduced=23
__progname; # var
- __pselect6; # arm x86 mips introduced=21
+ __pselect6; # arm x86 introduced=21
__pthread_cleanup_pop;
__pthread_cleanup_push;
- __ptrace; # arm x86 mips
+ __ptrace; # arm x86
__putlong;
__putshort;
__read_chk; # introduced=21
__readlink_chk; # introduced=23
__readlinkat_chk; # introduced=23
- __reboot; # arm x86 mips
+ __reboot; # arm x86
__recvfrom_chk; # introduced=21
__register_atfork; # introduced=23
__res_close;
@@ -151,59 +151,59 @@
__res_send;
__res_send_setqhook;
__res_send_setrhook;
- __rt_sigaction; # arm x86 mips
- __rt_sigpending; # arm x86 mips introduced=21
- __rt_sigprocmask; # arm x86 mips
- __rt_sigsuspend; # arm x86 mips introduced=21
- __rt_sigtimedwait; # arm x86 mips
- __sched_cpualloc; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
- __sched_cpucount; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
- __sched_cpufree; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
- __sched_getaffinity; # arm x86 mips introduced=12
+ __rt_sigaction; # arm x86
+ __rt_sigpending; # arm x86 introduced=21
+ __rt_sigprocmask; # arm x86
+ __rt_sigsuspend; # arm x86 introduced=21
+ __rt_sigtimedwait; # arm x86
+ __sched_cpualloc; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
+ __sched_cpucount; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
+ __sched_cpufree; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
+ __sched_getaffinity; # arm x86 introduced=12
__set_thread_area; # x86
- __set_tid_address; # arm x86 mips introduced=21
- __set_tls; # arm mips
+ __set_tid_address; # arm x86 introduced=21
+ __set_tls; # arm
__sF; # var
- __sigaction; # arm x86 mips introduced=21
- __snprintf_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- __socket; # arm x86 mips introduced=21
- __sprintf_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
+ __sigaction; # arm x86 introduced=21
+ __snprintf_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ __socket; # arm x86 introduced=21
+ __sprintf_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
__stack_chk_fail;
__stack_chk_guard; # var
- __statfs64; # arm x86 mips
+ __statfs64; # arm x86
__stpcpy_chk; # introduced=21
__stpncpy_chk; # introduced=21
__stpncpy_chk2; # introduced=21
- __strcat_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- __strchr_chk; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
- __strcpy_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- __strlcat_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- __strlcpy_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- __strlen_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- __strncat_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- __strncpy_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
+ __strcat_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ __strchr_chk; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
+ __strcpy_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ __strlcat_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ __strlcpy_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ __strlen_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ __strncat_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ __strncpy_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
__strncpy_chk2; # introduced=21
- __strrchr_chk; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
+ __strrchr_chk; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
__sym_ntop;
__sym_ntos;
__sym_ston;
__system_property_area_serial; # introduced=23
__system_property_find;
__system_property_find_nth;
- __system_property_foreach; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
+ __system_property_foreach; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
__system_property_get;
__system_property_read;
- __system_property_serial; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
- __system_property_set; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
- __timer_create; # arm x86 mips
- __timer_delete; # arm x86 mips
- __timer_getoverrun; # arm x86 mips
- __timer_gettime; # arm x86 mips
- __timer_settime; # arm x86 mips
- __umask_chk; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
- __vsnprintf_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- __vsprintf_chk; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- __waitid; # arm x86 mips
+ __system_property_serial; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
+ __system_property_set; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
+ __timer_create; # arm x86
+ __timer_delete; # arm x86
+ __timer_getoverrun; # arm x86
+ __timer_gettime; # arm x86
+ __timer_settime; # arm x86
+ __umask_chk; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
+ __vsnprintf_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ __vsprintf_chk; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ __waitid; # arm x86
_ctype_; # var
_Exit; # introduced=21
_exit;
@@ -216,11 +216,11 @@
_resolv_set_nameservers_for_net; # introduced=21
_setjmp;
_tolower; # introduced=21
- _tolower_tab_; # arm x86 mips var
+ _tolower_tab_; # arm x86 var
_toupper; # introduced=21
- _toupper_tab_; # arm x86 mips var
+ _toupper_tab_; # arm x86 var
abort;
- abs; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
+ abs; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
accept;
accept4; # introduced=21
access;
@@ -233,8 +233,8 @@
arc4random_buf;
arc4random_uniform;
asctime;
- asctime64; # arm x86 mips
- asctime64_r; # arm x86 mips
+ asctime64; # arm x86
+ asctime64_r; # arm x86
asctime_r;
asprintf;
at_quick_exit; # introduced=21
@@ -243,7 +243,7 @@
atol;
atoll;
basename;
- basename_r; # arm x86 mips
+ basename_r; # arm x86
bind;
bindresvport;
brk;
@@ -251,7 +251,7 @@
btowc;
c16rtomb; # introduced=21
c32rtomb; # introduced=21
- cacheflush; # arm mips
+ cacheflush; # arm
calloc;
capget;
capset;
@@ -274,7 +274,7 @@
clock_gettime;
clock_nanosleep;
clock_settime;
- clone; # introduced-arm=9 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
+ clone; # introduced-arm=9 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
close;
closedir;
closelog;
@@ -282,8 +282,8 @@
creat;
creat64; # introduced=21
ctime;
- ctime64; # arm x86 mips
- ctime64_r; # arm x86 mips
+ ctime64; # arm x86
+ ctime64_r; # arm x86
ctime_r;
daemon;
daylight; # var
@@ -291,7 +291,7 @@
difftime;
dirfd;
dirname;
- dirname_r; # arm x86 mips
+ dirname_r; # arm x86
div;
dn_expand;
dprintf; # introduced=21
@@ -317,10 +317,10 @@
error_one_per_line; # var introduced=23
error_print_progname; # var introduced=23
errx;
- ether_aton; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
- ether_aton_r; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
- ether_ntoa; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
- ether_ntoa_r; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
+ ether_aton; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
+ ether_aton_r; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
+ ether_ntoa; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
+ ether_ntoa_r; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
eventfd;
eventfd_read;
eventfd_write;
@@ -345,13 +345,13 @@
fdatasync;
fdopen;
fdopendir;
- fdprintf; # arm x86 mips versioned=28
+ fdprintf; # arm x86 versioned=28
feof;
feof_unlocked; # introduced=23
ferror;
ferror_unlocked; # introduced=23
fflush;
- ffs; # introduced-arm=9 introduced-arm64=21 introduced-mips=9 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
+ ffs; # introduced-arm=9 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
fgetc;
fgetln;
fgetpos;
@@ -392,25 +392,25 @@
fstatat64; # introduced=21
fstatfs;
fstatfs64; # introduced=21
- fstatvfs; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
+ fstatvfs; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
fstatvfs64; # introduced=21
fsync;
ftell;
ftello;
ftok;
ftruncate;
- ftruncate64; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
+ ftruncate64; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
ftrylockfile;
fts_children; # introduced=21
fts_close; # introduced=21
fts_open; # introduced=21
fts_read; # introduced=21
fts_set; # introduced=21
- ftw; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
+ ftw; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
ftw64; # introduced=21
funlockfile;
funopen;
- futimens; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
+ futimens; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
fwide;
fwprintf;
fwrite;
@@ -421,13 +421,13 @@
get_nprocs_conf; # introduced=23
get_phys_pages; # introduced=23
getaddrinfo;
- getauxval; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
+ getauxval; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
getc;
getc_unlocked;
getchar;
getchar_unlocked;
getcwd;
- getdelim; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
+ getdelim; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
getegid;
getenv;
geteuid;
@@ -445,7 +445,7 @@
gethostent;
gethostname;
getitimer;
- getline; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
+ getline; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
getlogin;
getmntent;
getmntent_r; # introduced=21
@@ -467,9 +467,9 @@
getprotobynumber;
getpt;
getpwnam;
- getpwnam_r; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
+ getpwnam_r; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
getpwuid;
- getpwuid_r; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
+ getpwuid_r; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
getresgid;
getresuid;
getrlimit;
@@ -479,7 +479,7 @@
getservbyname;
getservbyport;
getservent;
- getsid; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
+ getsid; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
getsockname;
getsockopt;
gettid;
@@ -490,8 +490,8 @@
getwchar;
getxattr;
gmtime;
- gmtime64; # arm x86 mips
- gmtime64_r; # arm x86 mips
+ gmtime64; # arm x86
+ gmtime64_r; # arm x86
gmtime_r;
grantpt; # introduced=21
herror;
@@ -500,8 +500,8 @@
htons; # introduced=21
if_indextoname;
if_nametoindex;
- imaxabs; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
- imaxdiv; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
+ imaxabs; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
+ imaxdiv; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
inet_addr;
inet_aton;
inet_lnaof; # introduced=21
@@ -590,7 +590,7 @@
kill;
killpg;
klogctl;
- labs; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
+ labs; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
lchown;
lcong48; # introduced=23
ldexp;
@@ -601,13 +601,13 @@
linkat; # introduced=21
listen;
listxattr;
- llabs; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
+ llabs; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
lldiv;
llistxattr;
localeconv; # introduced=21
localtime;
- localtime64; # arm x86 mips
- localtime64_r; # arm x86 mips
+ localtime64; # arm x86
+ localtime64_r; # arm x86
localtime_r;
login_tty; # introduced=23
longjmp;
@@ -623,7 +623,7 @@
mallinfo;
malloc;
malloc_info; # introduced=23
- malloc_usable_size; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
+ malloc_usable_size; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
mbrlen;
mbrtoc16; # introduced=21
mbrtoc32; # introduced=21
@@ -661,9 +661,9 @@
mkstemps64; # introduced=23
mktemp;
mktime;
- mktime64; # arm x86 mips
+ mktime64; # arm x86
mlock;
- mlockall; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
+ mlockall; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
mmap;
mmap64; # introduced=21
mount;
@@ -672,36 +672,36 @@
mremap;
msync;
munlock;
- munlockall; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
+ munlockall; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
munmap;
nanosleep;
newlocale; # introduced=21
- nftw; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
+ nftw; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
nftw64; # introduced=21
nice;
nrand48;
- ns_format_ttl; # arm64 x86_64 mips64 introduced=22
- ns_get16; # arm64 x86_64 mips64 introduced=22
- ns_get32; # arm64 x86_64 mips64 introduced=22
- ns_initparse; # arm64 x86_64 mips64 introduced=22
- ns_makecanon; # arm64 x86_64 mips64 introduced=22
- ns_msg_getflag; # arm64 x86_64 mips64 introduced=22
- ns_name_compress; # arm64 x86_64 mips64 introduced=22
- ns_name_ntol; # arm64 x86_64 mips64 introduced=22
- ns_name_ntop; # arm64 x86_64 mips64 introduced=22
- ns_name_pack; # arm64 x86_64 mips64 introduced=22
- ns_name_pton; # arm64 x86_64 mips64 introduced=22
- ns_name_rollback; # arm64 x86_64 mips64 introduced=22
- ns_name_skip; # arm64 x86_64 mips64 introduced=22
- ns_name_uncompress; # arm64 x86_64 mips64 introduced=22
- ns_name_unpack; # arm64 x86_64 mips64 introduced=22
- ns_parserr; # arm64 x86_64 mips64 introduced=22
- ns_put16; # arm64 x86_64 mips64 introduced=22
- ns_put32; # arm64 x86_64 mips64 introduced=22
- ns_samename; # arm64 x86_64 mips64 introduced=22
- ns_skiprr; # arm64 x86_64 mips64 introduced=22
- ns_sprintrr; # arm64 x86_64 mips64 introduced=22
- ns_sprintrrf; # arm64 x86_64 mips64 introduced=22
+ ns_format_ttl; # arm64 x86_64 introduced=22
+ ns_get16; # arm64 x86_64 introduced=22
+ ns_get32; # arm64 x86_64 introduced=22
+ ns_initparse; # arm64 x86_64 introduced=22
+ ns_makecanon; # arm64 x86_64 introduced=22
+ ns_msg_getflag; # arm64 x86_64 introduced=22
+ ns_name_compress; # arm64 x86_64 introduced=22
+ ns_name_ntol; # arm64 x86_64 introduced=22
+ ns_name_ntop; # arm64 x86_64 introduced=22
+ ns_name_pack; # arm64 x86_64 introduced=22
+ ns_name_pton; # arm64 x86_64 introduced=22
+ ns_name_rollback; # arm64 x86_64 introduced=22
+ ns_name_skip; # arm64 x86_64 introduced=22
+ ns_name_uncompress; # arm64 x86_64 introduced=22
+ ns_name_unpack; # arm64 x86_64 introduced=22
+ ns_parserr; # arm64 x86_64 introduced=22
+ ns_put16; # arm64 x86_64 introduced=22
+ ns_put32; # arm64 x86_64 introduced=22
+ ns_samename; # arm64 x86_64 introduced=22
+ ns_skiprr; # arm64 x86_64 introduced=22
+ ns_sprintrr; # arm64 x86_64 introduced=22
+ ns_sprintrrf; # arm64 x86_64 introduced=22
nsdispatch;
ntohl; # introduced=21
ntohs; # introduced=21
@@ -738,16 +738,16 @@
ppoll; # introduced=21
prctl;
pread;
- pread64; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
+ pread64; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
printf;
- prlimit; # arm64 x86_64 mips64
+ prlimit; # arm64 x86_64
prlimit64; # introduced=21
process_vm_readv; # introduced=23
process_vm_writev; # introduced=23
pselect;
- psiginfo; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- psignal; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
- pthread_atfork; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
+ psiginfo; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ psignal; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
+ pthread_atfork; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
pthread_attr_destroy;
pthread_attr_getdetachstate;
pthread_attr_getguardsize;
@@ -769,10 +769,10 @@
pthread_cond_init;
pthread_cond_signal;
pthread_cond_timedwait;
- pthread_cond_timedwait_monotonic; # arm x86 mips
- pthread_cond_timedwait_monotonic_np; # introduced-arm=9 introduced-x86=9 introduced-mips=9 introduced-arm64=28 introduced-x64_64=28 introduced-mips64=28
- pthread_cond_timedwait_relative_np; # arm x86 mips
- pthread_cond_timeout_np; # arm x86 mips
+ pthread_cond_timedwait_monotonic; # arm x86
+ pthread_cond_timedwait_monotonic_np; # introduced-arm=9 introduced-x86=9 introduced-arm64=28 introduced-x64_64=28
+ pthread_cond_timedwait_relative_np; # arm x86
+ pthread_cond_timeout_np; # arm x86
pthread_cond_wait;
pthread_condattr_destroy;
pthread_condattr_getclock; # introduced=21
@@ -796,7 +796,7 @@
pthread_mutex_destroy;
pthread_mutex_init;
pthread_mutex_lock;
- pthread_mutex_lock_timeout_np; # arm x86 mips
+ pthread_mutex_lock_timeout_np; # arm x86
pthread_mutex_timedlock; # introduced=21
pthread_mutex_trylock;
pthread_mutex_unlock;
@@ -837,12 +837,12 @@
putenv;
puts;
pututline;
- putw; # arm x86 mips
+ putw; # arm x86
putwc;
putwchar;
- pvalloc; # arm x86 mips introduced=17
+ pvalloc; # arm x86 introduced=17
pwrite;
- pwrite64; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
+ pwrite64; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
qsort;
quick_exit; # introduced=21
raise;
@@ -887,12 +887,12 @@
scanf;
sched_get_priority_max;
sched_get_priority_min;
- sched_getaffinity; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
- sched_getcpu; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
+ sched_getaffinity; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
+ sched_getcpu; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
sched_getparam;
sched_getscheduler;
sched_rr_get_interval;
- sched_setaffinity; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
+ sched_setaffinity; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
sched_setparam;
sched_setscheduler;
sched_yield;
@@ -961,13 +961,13 @@
sigfillset; # introduced=21
siginterrupt;
sigismember; # introduced=21
- siglongjmp; # introduced-arm=9 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
+ siglongjmp; # introduced-arm=9 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
signal; # introduced=21
- signalfd; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
+ signalfd; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
sigpending;
sigprocmask;
sigqueue; # introduced=23
- sigsetjmp; # introduced-arm=9 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
+ sigsetjmp; # introduced-arm=9 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
sigsetmask;
sigsuspend;
sigtimedwait; # introduced=23
@@ -987,7 +987,7 @@
stat64; # introduced=21
statfs;
statfs64; # introduced=21
- statvfs; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
+ statvfs; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
statvfs64; # introduced=21
stderr; # var introduced=23
stdin; # var introduced=23
@@ -1045,8 +1045,8 @@
strtouq; # introduced=21
strxfrm;
strxfrm_l; # introduced=21
- swapoff; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
- swapon; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
+ swapoff; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
+ swapon; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
swprintf;
swscanf;
symlink;
@@ -1076,18 +1076,18 @@
tfind;
tgkill;
time;
- timegm; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
- timegm64; # arm x86 mips
- timelocal; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
- timelocal64; # arm x86 mips
+ timegm; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
+ timegm64; # arm x86
+ timelocal; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
+ timelocal64; # arm x86
timer_create;
timer_delete;
timer_getoverrun;
timer_gettime;
timer_settime;
- timerfd_create; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
- timerfd_gettime; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
- timerfd_settime; # introduced-arm=19 introduced-arm64=21 introduced-mips=19 introduced-mips64=21 introduced-x86=19 introduced-x86_64=21
+ timerfd_create; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
+ timerfd_gettime; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
+ timerfd_settime; # introduced-arm=19 introduced-arm64=21 introduced-x86=19 introduced-x86_64=21
times;
timezone; # var
tmpfile;
@@ -1119,19 +1119,19 @@
unlinkat;
unlockpt;
unsetenv;
- unshare; # introduced-arm=17 introduced-arm64=21 introduced-mips=17 introduced-mips64=21 introduced-x86=17 introduced-x86_64=21
+ unshare; # introduced-arm=17 introduced-arm64=21 introduced-x86=17 introduced-x86_64=21
uselocale; # introduced=21
usleep;
utime;
- utimensat; # introduced-arm=12 introduced-arm64=21 introduced-mips=12 introduced-mips64=21 introduced-x86=12 introduced-x86_64=21
+ utimensat; # introduced-arm=12 introduced-arm64=21 introduced-x86=12 introduced-x86_64=21
utimes;
utmpname;
- valloc; # arm x86 mips
+ valloc; # arm x86
vasprintf;
vdprintf; # introduced=21
verr;
verrx;
- vfdprintf; # arm x86 mips versioned=28
+ vfdprintf; # arm x86 versioned=28
vfork;
vfprintf;
vfscanf;
@@ -1151,7 +1151,7 @@
vwprintf;
vwscanf; # introduced=21
wait;
- wait4; # introduced-arm=18 introduced-arm64=21 introduced-mips=18 introduced-mips64=21 introduced-x86=18 introduced-x86_64=21
+ wait4; # introduced-arm=18 introduced-arm64=21 introduced-x86=18 introduced-x86_64=21
waitid;
waitpid;
warn;
@@ -1221,7 +1221,7 @@
*;
};
-LIBC_N { # introduced-arm64=24 introduced-mips=24 introduced-mips64=24 introduced-x86=24 introduced-x86_64=24
+LIBC_N { # introduced-arm64=24 introduced-x86=24 introduced-x86_64=24
global:
__aeabi_atexit; # arm versioned=24
__aeabi_memclr; # arm versioned=24
@@ -1265,7 +1265,7 @@
lockf64; # introduced=24
preadv; # introduced=24
preadv64; # introduced=24
- prlimit; # arm mips x86 introduced=24
+ prlimit; # arm x86 introduced=24
pthread_barrierattr_destroy; # introduced=24
pthread_barrierattr_getpshared; # introduced=24
pthread_barrierattr_init; # introduced=24
@@ -1291,7 +1291,7 @@
__sendto_chk; # introduced=26
__system_property_read_callback; # introduced=26
__system_property_wait; # introduced=26
- bsd_signal; # arm x86 mips versioned=26
+ bsd_signal; # arm x86 versioned=26
catclose; # introduced=26
catgets; # introduced=26
catopen; # introduced=26
@@ -1551,7 +1551,7 @@
LIBC_PRIVATE {
global:
- __accept4; # arm x86 mips
+ __accept4; # arm x86
__adddf3; # arm
__addsf3; # arm
__aeabi_atexit; # arm
@@ -1624,12 +1624,12 @@
__arm_fadvise64_64; # arm
__ashldi3; # arm
__ashrdi3; # arm
- __bionic_brk; # arm x86 mips
+ __bionic_brk; # arm x86
__bionic_libcrt_compat_symbols; # arm x86
__cmpdf2; # arm
__cmpsf2; # arm
__divdf3; # arm
- __divdi3; # arm x86 mips
+ __divdi3; # arm x86
__divsf3; # arm
__divsi3; # arm
__dso_handle; # arm
@@ -1648,13 +1648,13 @@
__floatundisf; # arm
__floatunsidf; # arm
__floatunsisf; # arm
- __futex_wait; # arm x86 mips
- __futex_wake; # arm x86 mips
+ __futex_wait; # arm x86
+ __futex_wake; # arm x86
__gedf2; # arm
__gesf2; # arm
- __get_thread; # arm x86 mips
- __get_tls; # arm x86 mips
- __getdents64; # arm x86 mips
+ __get_thread; # arm x86
+ __get_tls; # arm x86
+ __getdents64; # arm x86
__gnu_ldivmod_helper; # arm
__gnu_uldivmod_helper; # arm
__gnu_Unwind_Find_exidx; # arm
@@ -1670,72 +1670,72 @@
__mulsf3; # arm
__nedf2; # arm
__nesf2; # arm
- __open; # arm x86 mips
- __page_shift; # arm x86 mips
- __page_size; # arm x86 mips
+ __open; # arm x86
+ __page_shift; # arm x86
+ __page_size; # arm x86
__popcount_tab; # arm
- __popcountsi2; # arm x86 mips
- __pthread_gettid; # arm x86 mips
- __sclose; # arm x86 mips
- __sdidinit; # arm x86 mips
- __set_errno; # arm x86 mips
- __sflags; # arm x86 mips
- __sflush; # arm x86 mips
- __sfp; # arm x86 mips
- __sglue; # arm x86 mips
- __sinit; # arm x86 mips
- __smakebuf; # arm x86 mips
- __sread; # arm x86 mips
- __srefill; # arm x86 mips
- __srget; # arm x86 mips
- __sseek; # arm x86 mips
+ __popcountsi2; # arm x86
+ __pthread_gettid; # arm x86
+ __sclose; # arm x86
+ __sdidinit; # arm x86
+ __set_errno; # arm x86
+ __sflags; # arm x86
+ __sflush; # arm x86
+ __sfp; # arm x86
+ __sglue; # arm x86
+ __sinit; # arm x86
+ __smakebuf; # arm x86
+ __sread; # arm x86
+ __srefill; # arm x86
+ __srget; # arm x86
+ __sseek; # arm x86
__subdf3; # arm
__subsf3; # arm
- __swbuf; # arm x86 mips
- __swrite; # arm x86 mips
- __swsetup; # arm x86 mips
+ __swbuf; # arm x86
+ __swrite; # arm x86
+ __swsetup; # arm x86
__truncdfsf2; # arm
- __udivdi3; # arm x86 mips
+ __udivdi3; # arm x86
__udivsi3; # arm
- __umoddi3; # x86 mips
+ __umoddi3; # x86
__unorddf2; # arm
__unordsf2; # arm
- __wait4; # arm x86 mips
- _fwalk; # arm x86 mips
+ __wait4; # arm x86
+ _fwalk; # arm x86
android_getaddrinfofornetcontext;
android_gethostbyaddrfornet;
android_gethostbyaddrfornetcontext;
android_gethostbynamefornet;
android_gethostbynamefornetcontext;
android_unsafe_frame_pointer_chase;
- arc4random_addrandom; # arm x86 mips
- arc4random_stir; # arm x86 mips
+ arc4random_addrandom; # arm x86
+ arc4random_stir; # arm x86
atexit; # arm
- bcopy; # arm x86 mips
- bzero; # arm x86 mips
- dlmalloc; # arm x86 mips
- dlmalloc_inspect_all; # arm x86 mips
- dlmalloc_trim; # arm x86 mips
- dlmalloc_usable_size; # arm x86 mips
- ftime; # arm x86 mips
- getdents; # arm x86 mips
- getdtablesize; # arm x86 mips
- index; # arm x86 mips
- issetugid; # arm x86 mips
- memswap; # arm x86 mips
- pthread_attr_getstackaddr; # arm x86 mips
- pthread_attr_setstackaddr; # arm x86 mips
- SHA1Final; # arm x86 mips
- SHA1Init; # arm x86 mips
- SHA1Transform; # arm x86 mips
- SHA1Update; # arm x86 mips
- strntoimax; # arm x86 mips
- strntoumax; # arm x86 mips
- strtotimeval; # arm x86 mips
- sysv_signal; # arm x86 mips
- tkill; # arm x86 mips
- wait3; # arm x86 mips
- wcswcs; # arm x86 mips
+ bcopy; # arm x86
+ bzero; # arm x86
+ dlmalloc; # arm x86
+ dlmalloc_inspect_all; # arm x86
+ dlmalloc_trim; # arm x86
+ dlmalloc_usable_size; # arm x86
+ ftime; # arm x86
+ getdents; # arm x86
+ getdtablesize; # arm x86
+ index; # arm x86
+ issetugid; # arm x86
+ memswap; # arm x86
+ pthread_attr_getstackaddr; # arm x86
+ pthread_attr_setstackaddr; # arm x86
+ SHA1Final; # arm x86
+ SHA1Init; # arm x86
+ SHA1Transform; # arm x86
+ SHA1Update; # arm x86
+ strntoimax; # arm x86
+ strntoumax; # arm x86
+ strtotimeval; # arm x86
+ sysv_signal; # arm x86
+ tkill; # arm x86
+ wait3; # arm x86
+ wcswcs; # arm x86
} LIBC_Q;
LIBC_DEPRECATED {
diff --git a/libc/libstdc++.map.txt b/libc/libstdc++.map.txt
index 0a242d5..bb7040f 100644
--- a/libc/libstdc++.map.txt
+++ b/libc/libstdc++.map.txt
@@ -5,14 +5,14 @@
_ZdaPvRKSt9nothrow_t; # weak
_ZdlPv; # weak
_ZdlPvRKSt9nothrow_t; # weak
- _Znaj; # arm x86 mips weak
- _ZnajRKSt9nothrow_t; # arm x86 mips weak
- _Znam; # arm64 x86_64 mips64 weak
- _ZnamRKSt9nothrow_t; # arm64 x86_64 mips64 weak
- _Znwj; # arm x86 mips weak
- _ZnwjRKSt9nothrow_t; # arm x86 mips weak
- _Znwm; # arm64 x86_64 mips64 weak
- _ZnwmRKSt9nothrow_t; # arm64 x86_64 mips64 weak
+ _Znaj; # arm x86 weak
+ _ZnajRKSt9nothrow_t; # arm x86 weak
+ _Znam; # arm64 x86_64 weak
+ _ZnamRKSt9nothrow_t; # arm64 x86_64 weak
+ _Znwj; # arm x86 weak
+ _ZnwjRKSt9nothrow_t; # arm x86 weak
+ _Znwm; # arm64 x86_64 weak
+ _ZnwmRKSt9nothrow_t; # arm64 x86_64 weak
__cxa_guard_abort;
__cxa_guard_acquire;
__cxa_guard_release;