Update to kernel headers v4.12.3.
Test: Built angler.
Change-Id: Icbcf4fac2334de8409b049ed7a3b4c24b4e98ce9
diff --git a/libc/kernel/uapi/linux/pci_regs.h b/libc/kernel/uapi/linux/pci_regs.h
index d56b310..baa9421 100644
--- a/libc/kernel/uapi/linux/pci_regs.h
+++ b/libc/kernel/uapi/linux/pci_regs.h
@@ -86,7 +86,7 @@
#define PCI_SUBSYSTEM_ID 0x2e
#define PCI_ROM_ADDRESS 0x30
#define PCI_ROM_ADDRESS_ENABLE 0x01
-#define PCI_ROM_ADDRESS_MASK (~0x7ffUL)
+#define PCI_ROM_ADDRESS_MASK (~0x7ffU)
#define PCI_CAPABILITY_LIST 0x34
#define PCI_INTERRUPT_LINE 0x3c
#define PCI_INTERRUPT_PIN 0x3d
@@ -533,6 +533,7 @@
#define PCI_EXP_DEVCTL2_COMP_TIMEOUT 0x000f
#define PCI_EXP_DEVCTL2_ARI 0x0020
#define PCI_EXP_DEVCTL2_ATOMIC_REQ 0x0040
+#define PCI_EXP_DEVCTL2_ATOMIC_EGRESS_BLOCK 0x0080
#define PCI_EXP_DEVCTL2_IDO_REQ_EN 0x0100
#define PCI_EXP_DEVCTL2_IDO_CMP_EN 0x0200
#define PCI_EXP_DEVCTL2_LTR_EN 0x0400
@@ -582,6 +583,7 @@
#define PCI_EXT_CAP_ID_PMUX 0x1A
#define PCI_EXT_CAP_ID_PASID 0x1B
#define PCI_EXT_CAP_ID_DPC 0x1D
+#define PCI_EXT_CAP_ID_L1SS 0x1E
#define PCI_EXT_CAP_ID_PTM 0x1F
#define PCI_EXT_CAP_ID_MAX PCI_EXT_CAP_ID_PTM
#define PCI_EXT_CAP_DSN_SIZEOF 12
@@ -819,6 +821,7 @@
#define PCI_EXP_DPC_STATUS 8
#define PCI_EXP_DPC_STATUS_TRIGGER 0x01
#define PCI_EXP_DPC_STATUS_INTERRUPT 0x08
+#define PCI_EXP_DPC_RP_BUSY 0x10
#define PCI_EXP_DPC_SOURCE_ID 10
#define PCI_PTM_CAP 0x04
#define PCI_PTM_CAP_REQ 0x00000001
@@ -827,4 +830,17 @@
#define PCI_PTM_CTRL 0x08
#define PCI_PTM_CTRL_ENABLE 0x00000001
#define PCI_PTM_CTRL_ROOT 0x00000002
+#define PCI_L1SS_CAP 4
+#define PCI_L1SS_CAP_PCIPM_L1_2 1
+#define PCI_L1SS_CAP_PCIPM_L1_1 2
+#define PCI_L1SS_CAP_ASPM_L1_2 4
+#define PCI_L1SS_CAP_ASPM_L1_1 8
+#define PCI_L1SS_CAP_L1_PM_SS 16
+#define PCI_L1SS_CTL1 8
+#define PCI_L1SS_CTL1_PCIPM_L1_2 1
+#define PCI_L1SS_CTL1_PCIPM_L1_1 2
+#define PCI_L1SS_CTL1_ASPM_L1_2 4
+#define PCI_L1SS_CTL1_ASPM_L1_1 8
+#define PCI_L1SS_CTL1_L1SS_MASK 0x0000000F
+#define PCI_L1SS_CTL2 0xC
#endif