commit 40a82d005c0b37199d4b8d0c20e9d62647f926b2
author Yun Hsiang <yun.hsiang@sifive.com> Fri May 26 10:10:40 2023 +0800
committer Yun Hsiang <yun.hsiang@sifive.com> Wed May 31 09:32:42 2023 +0800
tree edb144ab78fec74a89266dd76562c15dd2ca7858
parent 374d2f1be0183d65acd948375b8637ca86c6e71e

Implement rvv version mem* and str* for riscv64

Add vector version mem* and str* functions and only build them when the
vector extension is enabled.
The original implementation comes from
https://github.com/sifive/sifive-libc, which we agree to contribute to
the Android Open Source Project.

Test: mma

Change-Id: I11b671a5bc571d7c783a657f272f282df7d16c29
Signed-off-by: Yun Hsiang <yun.hsiang@sifive.com>

libc/Android.bp

diff --git a/libc/Android.bp b/libc/Android.bp
index ecabb06..1e2458a 100644
--- a/libc/Android.bp
+++ b/libc/Android.bp
@@ -932,6 +932,21 @@
                 "arch-riscv64/bionic/setjmp.S",
                 "arch-riscv64/bionic/syscall.S",
                 "arch-riscv64/bionic/vfork.S",
+
+                "arch-riscv64/string/memchr_vext.S",
+                "arch-riscv64/string/memcmp_vext.S",
+                "arch-riscv64/string/memcpy_vext.S",
+                "arch-riscv64/string/memmove_vext.S",
+                "arch-riscv64/string/memset_vext.S",
+                "arch-riscv64/string/strcat_vext.S",
+                "arch-riscv64/string/strchr_vext.S",
+                "arch-riscv64/string/strcmp_vext.S",
+                "arch-riscv64/string/strcpy_vext.S",
+                "arch-riscv64/string/strlen_vext.S",
+                "arch-riscv64/string/strncat_vext.S",
+                "arch-riscv64/string/strncmp_vext.S",
+                "arch-riscv64/string/strncpy_vext.S",
+                "arch-riscv64/string/strnlen_vext.S",
             ],
         },
 
@@ -1541,6 +1556,9 @@
         arm64: {
             srcs: ["arch-arm64/static_function_dispatch.S"],
         },
+        riscv64: {
+            srcs: ["arch-riscv64/static_function_dispatch.S"]
+        },
     },
 }
 
@@ -1569,6 +1587,9 @@
         arm64: {
             srcs: ["arch-arm64/dynamic_function_dispatch.cpp"],
         },
+        riscv64: {
+            srcs: ["arch-riscv64/dynamic_function_dispatch.cpp"]
+        },
     },
 }