commit 3a39c0bc431ec36416225d4b9a85fa8cacb16836
author Christopher Ferris <cferris@google.com> Thu Sep 02 00:03:38 2021 +0000
committer Christopher Ferris <cferris@google.com> Thu Sep 02 00:03:38 2021 +0000
tree 1b477f0081b666ba724c807aacaae89913966524
parent 563e60e32adf7f427af03075a6fb800e723025f1

Update to v5.14 kernel headers.

Kernel headers coming from:

Git: https://android.googlesource.com/kernel/common/
Branch: android-mainline
Tag: android-mainline-5.14

Test: Builds, bionic unit tests.
Change-Id: Iff3424da9fbf7ae89ebeb6daabb34c4aa650901f

libc/kernel/uapi/drm/i915_drm.h

diff --git a/libc/kernel/uapi/drm/i915_drm.h b/libc/kernel/uapi/drm/i915_drm.h
index f265d92..225c1da 100644
--- a/libc/kernel/uapi/drm/i915_drm.h
+++ b/libc/kernel/uapi/drm/i915_drm.h
@@ -217,6 +217,7 @@
 #define DRM_I915_QUERY 0x39
 #define DRM_I915_GEM_VM_CREATE 0x3a
 #define DRM_I915_GEM_VM_DESTROY 0x3b
+#define DRM_I915_GEM_CREATE_EXT 0x3c
 #define DRM_IOCTL_I915_INIT DRM_IOW(DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
 #define DRM_IOCTL_I915_FLUSH DRM_IO(DRM_COMMAND_BASE + DRM_I915_FLUSH)
 #define DRM_IOCTL_I915_FLIP DRM_IO(DRM_COMMAND_BASE + DRM_I915_FLIP)
@@ -247,6 +248,7 @@
 #define DRM_IOCTL_I915_GEM_ENTERVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_ENTERVT)
 #define DRM_IOCTL_I915_GEM_LEAVEVT DRM_IO(DRM_COMMAND_BASE + DRM_I915_GEM_LEAVEVT)
 #define DRM_IOCTL_I915_GEM_CREATE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE, struct drm_i915_gem_create)
+#define DRM_IOCTL_I915_GEM_CREATE_EXT DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_CREATE_EXT, struct drm_i915_gem_create_ext)
 #define DRM_IOCTL_I915_GEM_PREAD DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_PREAD, struct drm_i915_gem_pread)
 #define DRM_IOCTL_I915_GEM_PWRITE DRM_IOW(DRM_COMMAND_BASE + DRM_I915_GEM_PWRITE, struct drm_i915_gem_pwrite)
 #define DRM_IOCTL_I915_GEM_MMAP DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MMAP, struct drm_i915_gem_mmap)
@@ -886,6 +888,7 @@
 #define DRM_I915_QUERY_TOPOLOGY_INFO 1
 #define DRM_I915_QUERY_ENGINE_INFO 2
 #define DRM_I915_QUERY_PERF_CONFIG 3
+#define DRM_I915_QUERY_MEMORY_REGIONS 4
   __s32 length;
   __u32 flags;
 #define DRM_I915_QUERY_PERF_CONFIG_LIST 1
@@ -932,6 +935,39 @@
   __u32 flags;
   __u8 data[];
 };
+enum drm_i915_gem_memory_class {
+  I915_MEMORY_CLASS_SYSTEM = 0,
+  I915_MEMORY_CLASS_DEVICE,
+};
+struct drm_i915_gem_memory_class_instance {
+  __u16 memory_class;
+  __u16 memory_instance;
+};
+struct drm_i915_memory_region_info {
+  struct drm_i915_gem_memory_class_instance region;
+  __u32 rsvd0;
+  __u64 probed_size;
+  __u64 unallocated_size;
+  __u64 rsvd1[8];
+};
+struct drm_i915_query_memory_regions {
+  __u32 num_regions;
+  __u32 rsvd[3];
+  struct drm_i915_memory_region_info regions[];
+};
+struct drm_i915_gem_create_ext {
+  __u64 size;
+  __u32 handle;
+  __u32 flags;
+#define I915_GEM_CREATE_EXT_MEMORY_REGIONS 0
+  __u64 extensions;
+};
+struct drm_i915_gem_create_ext_memory_regions {
+  struct i915_user_extension base;
+  __u32 pad;
+  __u32 num_regions;
+  __u64 regions;
+};
 #ifdef __cplusplus
 }
 #endif