diff --git a/libc/kernel/uapi/asm-x86/asm/bootparam.h b/libc/kernel/uapi/asm-x86/asm/bootparam.h
index af98489..b576825 100644
--- a/libc/kernel/uapi/asm-x86/asm/bootparam.h
+++ b/libc/kernel/uapi/asm-x86/asm/bootparam.h
@@ -23,164 +23,167 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define SETUP_DTB 2
 #define SETUP_PCI 3
+#define SETUP_EFI 4
 #define RAMDISK_IMAGE_START_MASK 0x07FF
-#define RAMDISK_PROMPT_FLAG 0x8000
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define RAMDISK_PROMPT_FLAG 0x8000
 #define RAMDISK_LOAD_FLAG 0x4000
 #define LOADED_HIGH (1<<0)
 #define QUIET_FLAG (1<<5)
-#define KEEP_SEGMENTS (1<<6)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KEEP_SEGMENTS (1<<6)
 #define CAN_USE_HEAP (1<<7)
 #define XLF_KERNEL_64 (1<<0)
 #define XLF_CAN_BE_LOADED_ABOVE_4G (1<<1)
-#define XLF_EFI_HANDOVER_32 (1<<2)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define XLF_EFI_HANDOVER_32 (1<<2)
 #define XLF_EFI_HANDOVER_64 (1<<3)
+#define XLF_EFI_KEXEC (1<<4)
 #ifndef __ASSEMBLY__
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #include <linux/types.h>
 #include <linux/screen_info.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #include <linux/apm_bios.h>
 #include <linux/edd.h>
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #include <asm/e820.h>
 #include <asm/ist.h>
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #include <video/edid.h>
 struct setup_data {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u64 next;
  __u32 type;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 len;
  __u8 data[0];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct setup_header {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u8 setup_sects;
  __u16 root_flags;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 syssize;
  __u16 ram_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u16 vid_mode;
  __u16 root_dev;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u16 boot_flag;
  __u16 jump;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 header;
  __u16 version;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 realmode_swtch;
  __u16 start_sys;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u16 kernel_version;
  __u8 type_of_loader;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u8 loadflags;
  __u16 setup_move_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 code32_start;
  __u32 ramdisk_image;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 ramdisk_size;
  __u32 bootsect_kludge;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u16 heap_end_ptr;
  __u8 ext_loader_ver;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u8 ext_loader_type;
  __u32 cmd_line_ptr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 initrd_addr_max;
  __u32 kernel_alignment;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u8 relocatable_kernel;
  __u8 min_alignment;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u16 xloadflags;
  __u32 cmdline_size;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 hardware_subarch;
  __u64 hardware_subarch_data;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 payload_offset;
  __u32 payload_length;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u64 setup_data;
  __u64 pref_address;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 init_size;
  __u32 handover_offset;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 } __attribute__((packed));
 struct sys_desc_table {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u16 length;
  __u8 table[14];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct olpc_ofw_header {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 ofw_magic;
  __u32 ofw_version;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 cif_handler;
  __u32 irq_desc_table;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 } __attribute__((packed));
 struct efi_info {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 efi_loader_signature;
  __u32 efi_systab;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 efi_memdesc_size;
  __u32 efi_memdesc_version;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 efi_memmap;
  __u32 efi_memmap_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 efi_systab_hi;
  __u32 efi_memmap_hi;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 struct boot_params {
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  struct screen_info screen_info;
  struct apm_bios_info apm_bios_info;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u8 _pad2[4];
  __u64 tboot_addr;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  struct ist_info ist_info;
  __u8 _pad3[16];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u8 hd0_info[16];
  __u8 hd1_info[16];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  struct sys_desc_table sys_desc_table;
  struct olpc_ofw_header olpc_ofw_header;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 ext_ramdisk_image;
  __u32 ext_ramdisk_size;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 ext_cmd_line_ptr;
  __u8 _pad4[116];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  struct edid_info edid_info;
  struct efi_info efi_info;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 alt_mem_k;
  __u32 scratch;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u8 e820_entries;
  __u8 eddbuf_entries;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u8 edd_mbr_sig_buf_entries;
  __u8 kbd_status;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u8 _pad5[3];
  __u8 sentinel;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u8 _pad6[1];
  struct setup_header hdr;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u8 _pad7[0x290-0x1f1-sizeof(struct setup_header)];
  __u32 edd_mbr_sig_buffer[EDD_MBR_SIG_MAX];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  struct e820entry e820_map[E820MAX];
  __u8 _pad8[48];
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  struct edd_info eddbuf[EDDMAXNR];
  __u8 _pad9[276];
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 } __attribute__((packed));
 enum {
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  X86_SUBARCH_PC = 0,
  X86_SUBARCH_LGUEST,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  X86_SUBARCH_XEN,
- X86_SUBARCH_MRST,
+ X86_SUBARCH_INTEL_MID,
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  X86_SUBARCH_CE4100,
  X86_NR_SUBARCHS,
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 };
 #endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #endif
diff --git a/libc/kernel/uapi/asm-x86/asm/hyperv.h b/libc/kernel/uapi/asm-x86/asm/hyperv.h
index 5874e8d..965e80a 100644
--- a/libc/kernel/uapi/asm-x86/asm/hyperv.h
+++ b/libc/kernel/uapi/asm-x86/asm/hyperv.h
@@ -33,99 +33,116 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_MSR_VP_RUNTIME_AVAILABLE (1 << 0)
 #define HV_X64_MSR_TIME_REF_COUNT_AVAILABLE (1 << 1)
+#define HV_X64_MSR_REFERENCE_TSC 0x40000021
+#define HV_X64_MSR_APIC_FREQUENCY_AVAILABLE (1 << 11)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HV_X64_MSR_TSC_FREQUENCY_AVAILABLE (1 << 11)
 #define HV_X64_MSR_SYNIC_AVAILABLE (1 << 2)
 #define HV_X64_MSR_SYNTIMER_AVAILABLE (1 << 3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_MSR_APIC_ACCESS_AVAILABLE (1 << 4)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_MSR_HYPERCALL_AVAILABLE (1 << 5)
 #define HV_X64_MSR_VP_INDEX_AVAILABLE (1 << 6)
 #define HV_X64_MSR_RESET_AVAILABLE (1 << 7)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_MSR_STAT_PAGES_AVAILABLE (1 << 8)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_CREATE_PARTITIONS (1 << 0)
 #define HV_X64_ACCESS_PARTITION_ID (1 << 1)
 #define HV_X64_ACCESS_MEMORY_POOL (1 << 2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_ADJUST_MESSAGE_BUFFERS (1 << 3)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_POST_MESSAGES (1 << 4)
 #define HV_X64_SIGNAL_EVENTS (1 << 5)
 #define HV_X64_CREATE_PORT (1 << 6)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_CONNECT_PORT (1 << 7)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_ACCESS_STATS (1 << 8)
 #define HV_X64_DEBUGGING (1 << 11)
 #define HV_X64_CPU_POWER_MANAGEMENT (1 << 12)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_CONFIGURE_PROFILER (1 << 13)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_MWAIT_AVAILABLE (1 << 0)
 #define HV_X64_GUEST_DEBUGGING_AVAILABLE (1 << 1)
 #define HV_X64_PERF_MONITOR_AVAILABLE (1 << 2)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE (1 << 3)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE (1 << 4)
 #define HV_X64_GUEST_IDLE_STATE_AVAILABLE (1 << 5)
 #define HV_X64_MWAIT_RECOMMENDED (1 << 0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED (1 << 1)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED (1 << 2)
 #define HV_X64_APIC_ACCESS_RECOMMENDED (1 << 3)
 #define HV_X64_SYSTEM_RESET_RECOMMENDED (1 << 4)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_RELAXED_TIMING_RECOMMENDED (1 << 5)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_MSR_GUEST_OS_ID 0x40000000
 #define HV_X64_MSR_HYPERCALL 0x40000001
 #define HV_X64_MSR_VP_INDEX 0x40000002
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_X64_MSR_TIME_REF_COUNT 0x40000020
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HV_X64_MSR_TSC_FREQUENCY 0x40000022
+#define HV_X64_MSR_APIC_FREQUENCY 0x40000023
 #define HV_X64_MSR_EOI 0x40000070
 #define HV_X64_MSR_ICR 0x40000071
-#define HV_X64_MSR_TPR 0x40000072
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HV_X64_MSR_TPR 0x40000072
 #define HV_X64_MSR_APIC_ASSIST_PAGE 0x40000073
 #define HV_X64_MSR_SCONTROL 0x40000080
 #define HV_X64_MSR_SVERSION 0x40000081
-#define HV_X64_MSR_SIEFP 0x40000082
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HV_X64_MSR_SIEFP 0x40000082
 #define HV_X64_MSR_SIMP 0x40000083
 #define HV_X64_MSR_EOM 0x40000084
 #define HV_X64_MSR_SINT0 0x40000090
-#define HV_X64_MSR_SINT1 0x40000091
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HV_X64_MSR_SINT1 0x40000091
 #define HV_X64_MSR_SINT2 0x40000092
 #define HV_X64_MSR_SINT3 0x40000093
 #define HV_X64_MSR_SINT4 0x40000094
-#define HV_X64_MSR_SINT5 0x40000095
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HV_X64_MSR_SINT5 0x40000095
 #define HV_X64_MSR_SINT6 0x40000096
 #define HV_X64_MSR_SINT7 0x40000097
 #define HV_X64_MSR_SINT8 0x40000098
-#define HV_X64_MSR_SINT9 0x40000099
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HV_X64_MSR_SINT9 0x40000099
 #define HV_X64_MSR_SINT10 0x4000009A
 #define HV_X64_MSR_SINT11 0x4000009B
 #define HV_X64_MSR_SINT12 0x4000009C
-#define HV_X64_MSR_SINT13 0x4000009D
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HV_X64_MSR_SINT13 0x4000009D
 #define HV_X64_MSR_SINT14 0x4000009E
 #define HV_X64_MSR_SINT15 0x4000009F
 #define HV_X64_MSR_HYPERCALL_ENABLE 0x00000001
-#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT 12
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT 12
 #define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK   (~((1ull << HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT) - 1))
 #define HV_X64_HV_NOTIFY_LONG_SPIN_WAIT 0x0008
 #define HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE 0x00000001
-#define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT 12
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT 12
 #define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_MASK   (~((1ull << HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT) - 1))
+#define HV_X64_MSR_TSC_REFERENCE_ENABLE 0x00000001
+#define HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT 12
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_PROCESSOR_POWER_STATE_C0 0
 #define HV_PROCESSOR_POWER_STATE_C1 1
 #define HV_PROCESSOR_POWER_STATE_C2 2
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_PROCESSOR_POWER_STATE_C3 3
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_STATUS_SUCCESS 0
 #define HV_STATUS_INVALID_HYPERCALL_CODE 2
 #define HV_STATUS_INVALID_HYPERCALL_INPUT 3
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_STATUS_INVALID_ALIGNMENT 4
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define HV_STATUS_INSUFFICIENT_BUFFERS 19
+typedef struct _HV_REFERENCE_TSC_PAGE {
+ __u32 tsc_sequence;
+ __u32 res1;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ __u64 tsc_scale;
+ __s64 tsc_offset;
+} HV_REFERENCE_TSC_PAGE, *PHV_REFERENCE_TSC_PAGE;
 #endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
diff --git a/libc/kernel/uapi/asm-x86/asm/kvm.h b/libc/kernel/uapi/asm-x86/asm/kvm.h
index ab301d1..200d818 100644
--- a/libc/kernel/uapi/asm-x86/asm/kvm.h
+++ b/libc/kernel/uapi/asm-x86/asm/kvm.h
@@ -231,9 +231,9 @@
  __u32 padding[3];
 };
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX 1
-#define KVM_CPUID_FLAG_STATEFUL_FUNC 2
-#define KVM_CPUID_FLAG_STATE_READ_NEXT 4
+#define KVM_CPUID_FLAG_SIGNIFCANT_INDEX BIT(0)
+#define KVM_CPUID_FLAG_STATEFUL_FUNC BIT(1)
+#define KVM_CPUID_FLAG_STATE_READ_NEXT BIT(2)
 struct kvm_cpuid2 {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __u32 nent;
diff --git a/libc/kernel/uapi/asm-x86/asm/kvm_para.h b/libc/kernel/uapi/asm-x86/asm/kvm_para.h
index e91c18e..7fb5efe 100644
--- a/libc/kernel/uapi/asm-x86/asm/kvm_para.h
+++ b/libc/kernel/uapi/asm-x86/asm/kvm_para.h
@@ -32,68 +32,69 @@
 #define KVM_FEATURE_STEAL_TIME 5
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define KVM_FEATURE_PV_EOI 6
+#define KVM_FEATURE_PV_UNHALT 7
 #define KVM_FEATURE_CLOCKSOURCE_STABLE_BIT 24
 #define MSR_KVM_WALL_CLOCK 0x11
-#define MSR_KVM_SYSTEM_TIME 0x12
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSR_KVM_SYSTEM_TIME 0x12
 #define KVM_MSR_ENABLED 1
 #define MSR_KVM_WALL_CLOCK_NEW 0x4b564d00
 #define MSR_KVM_SYSTEM_TIME_NEW 0x4b564d01
-#define MSR_KVM_ASYNC_PF_EN 0x4b564d02
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSR_KVM_ASYNC_PF_EN 0x4b564d02
 #define MSR_KVM_STEAL_TIME 0x4b564d03
 #define MSR_KVM_PV_EOI_EN 0x4b564d04
 struct kvm_steal_time {
- __u64 steal;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ __u64 steal;
  __u32 version;
  __u32 flags;
  __u32 pad[12];
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 #define KVM_STEAL_ALIGNMENT_BITS 5
 #define KVM_STEAL_VALID_BITS ((-1ULL << (KVM_STEAL_ALIGNMENT_BITS + 1)))
 #define KVM_STEAL_RESERVED_MASK (((1 << KVM_STEAL_ALIGNMENT_BITS) - 1 ) << 1)
-#define KVM_MAX_MMU_OP_BATCH 32
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KVM_MAX_MMU_OP_BATCH 32
 #define KVM_ASYNC_PF_ENABLED (1 << 0)
 #define KVM_ASYNC_PF_SEND_ALWAYS (1 << 1)
 #define KVM_MMU_OP_WRITE_PTE 1
-#define KVM_MMU_OP_FLUSH_TLB 2
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KVM_MMU_OP_FLUSH_TLB 2
 #define KVM_MMU_OP_RELEASE_PT 3
 struct kvm_mmu_op_header {
  __u32 op;
- __u32 pad;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ __u32 pad;
 };
 struct kvm_mmu_op_write_pte {
  struct kvm_mmu_op_header header;
- __u64 pte_phys;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ __u64 pte_phys;
  __u64 pte_val;
 };
 struct kvm_mmu_op_flush_tlb {
- struct kvm_mmu_op_header header;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ struct kvm_mmu_op_header header;
 };
 struct kvm_mmu_op_release_pt {
  struct kvm_mmu_op_header header;
- __u64 pt_phys;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ __u64 pt_phys;
 };
 #define KVM_PV_REASON_PAGE_NOT_PRESENT 1
 #define KVM_PV_REASON_PAGE_READY 2
-struct kvm_vcpu_pv_apf_data {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct kvm_vcpu_pv_apf_data {
  __u32 reason;
  __u8 pad[60];
  __u32 enabled;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 #define KVM_PV_EOI_BIT 0
 #define KVM_PV_EOI_MASK (0x1 << KVM_PV_EOI_BIT)
 #define KVM_PV_EOI_ENABLED KVM_PV_EOI_MASK
-#define KVM_PV_EOI_DISABLED 0x0
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define KVM_PV_EOI_DISABLED 0x0
 #endif
diff --git a/libc/kernel/uapi/asm-x86/asm/msr-index.h b/libc/kernel/uapi/asm-x86/asm/msr-index.h
index ce77205..6e4cac7 100644
--- a/libc/kernel/uapi/asm-x86/asm/msr-index.h
+++ b/libc/kernel/uapi/asm-x86/asm/msr-index.h
@@ -161,387 +161,392 @@
 #define MSR_PP1_ENERGY_STATUS 0x00000641
 #define MSR_PP1_POLICY 0x00000642
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSR_CORE_C1_RES 0x00000660
 #define MSR_AMD64_MC0_MASK 0xc0010044
 #define MSR_IA32_MCx_CTL(x) (MSR_IA32_MC0_CTL + 4*(x))
 #define MSR_IA32_MCx_STATUS(x) (MSR_IA32_MC0_STATUS + 4*(x))
-#define MSR_IA32_MCx_ADDR(x) (MSR_IA32_MC0_ADDR + 4*(x))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSR_IA32_MCx_ADDR(x) (MSR_IA32_MC0_ADDR + 4*(x))
 #define MSR_IA32_MCx_MISC(x) (MSR_IA32_MC0_MISC + 4*(x))
 #define MSR_AMD64_MCx_MASK(x) (MSR_AMD64_MC0_MASK + (x))
 #define MSR_IA32_MC0_CTL2 0x00000280
-#define MSR_IA32_MCx_CTL2(x) (MSR_IA32_MC0_CTL2 + (x))
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSR_IA32_MCx_CTL2(x) (MSR_IA32_MC0_CTL2 + (x))
 #define MSR_P6_PERFCTR0 0x000000c1
 #define MSR_P6_PERFCTR1 0x000000c2
 #define MSR_P6_EVNTSEL0 0x00000186
-#define MSR_P6_EVNTSEL1 0x00000187
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSR_P6_EVNTSEL1 0x00000187
 #define MSR_KNC_PERFCTR0 0x00000020
 #define MSR_KNC_PERFCTR1 0x00000021
 #define MSR_KNC_EVNTSEL0 0x00000028
-#define MSR_KNC_EVNTSEL1 0x00000029
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSR_KNC_EVNTSEL1 0x00000029
+#define MSR_IA32_PMC0 0x000004c1
 #define MSR_AMD64_PATCH_LEVEL 0x0000008b
 #define MSR_AMD64_TSC_RATIO 0xc0000104
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_AMD64_NB_CFG 0xc001001f
 #define MSR_AMD64_PATCH_LOADER 0xc0010020
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_AMD64_OSVW_ID_LENGTH 0xc0010140
 #define MSR_AMD64_OSVW_STATUS 0xc0010141
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSR_AMD64_LS_CFG 0xc0011020
 #define MSR_AMD64_DC_CFG 0xc0011022
 #define MSR_AMD64_BU_CFG2 0xc001102a
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_AMD64_IBSFETCHCTL 0xc0011030
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_AMD64_IBSFETCHLINAD 0xc0011031
 #define MSR_AMD64_IBSFETCHPHYSAD 0xc0011032
 #define MSR_AMD64_IBSFETCH_REG_COUNT 3
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_AMD64_IBSFETCH_REG_MASK ((1UL<<MSR_AMD64_IBSFETCH_REG_COUNT)-1)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_AMD64_IBSOPCTL 0xc0011033
 #define MSR_AMD64_IBSOPRIP 0xc0011034
 #define MSR_AMD64_IBSOPDATA 0xc0011035
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_AMD64_IBSOPDATA2 0xc0011036
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_AMD64_IBSOPDATA3 0xc0011037
 #define MSR_AMD64_IBSDCLINAD 0xc0011038
 #define MSR_AMD64_IBSDCPHYSAD 0xc0011039
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_AMD64_IBSOP_REG_COUNT 7
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_AMD64_IBSOP_REG_MASK ((1UL<<MSR_AMD64_IBSOP_REG_COUNT)-1)
 #define MSR_AMD64_IBSCTL 0xc001103a
 #define MSR_AMD64_IBSBRTARGET 0xc001103b
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_AMD64_IBS_REG_COUNT_MAX 8
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_F16H_L2I_PERF_CTL 0xc0010230
 #define MSR_F16H_L2I_PERF_CTR 0xc0010231
 #define MSR_F15H_PERF_CTL 0xc0010200
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_F15H_PERF_CTR 0xc0010201
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_F15H_NB_PERF_CTL 0xc0010240
 #define MSR_F15H_NB_PERF_CTR 0xc0010241
 #define MSR_FAM10H_MMIO_CONF_BASE 0xc0010058
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define FAM10H_MMIO_CONF_ENABLE (1<<0)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define FAM10H_MMIO_CONF_BUSRANGE_MASK 0xf
 #define FAM10H_MMIO_CONF_BUSRANGE_SHIFT 2
 #define FAM10H_MMIO_CONF_BASE_MASK 0xfffffffULL
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define FAM10H_MMIO_CONF_BASE_SHIFT 20
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_FAM10H_NODE_ID 0xc001100c
 #define MSR_K8_TOP_MEM1 0xc001001a
 #define MSR_K8_TOP_MEM2 0xc001001d
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_K8_SYSCFG 0xc0010010
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_K8_INT_PENDING_MSG 0xc0010055
 #define K8_INTP_C1E_ACTIVE_MASK 0x18000000
 #define MSR_K8_TSEG_ADDR 0xc0010112
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define K8_MTRRFIXRANGE_DRAM_ENABLE 0x00040000
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define K8_MTRRFIXRANGE_DRAM_MODIFY 0x00080000
 #define K8_MTRR_RDMEM_WRMEM_MASK 0x18181818
 #define MSR_K7_EVNTSEL0 0xc0010000
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_K7_PERFCTR0 0xc0010004
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_K7_EVNTSEL1 0xc0010001
 #define MSR_K7_PERFCTR1 0xc0010005
 #define MSR_K7_EVNTSEL2 0xc0010002
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_K7_PERFCTR2 0xc0010006
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_K7_EVNTSEL3 0xc0010003
 #define MSR_K7_PERFCTR3 0xc0010007
 #define MSR_K7_CLK_CTL 0xc001001b
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_K7_HWCR 0xc0010015
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_K7_FID_VID_CTL 0xc0010041
 #define MSR_K7_FID_VID_STATUS 0xc0010042
 #define MSR_K6_WHCR 0xc0000082
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_K6_UWCCR 0xc0000085
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_K6_EPMR 0xc0000086
 #define MSR_K6_PSOR 0xc0000087
 #define MSR_K6_PFIR 0xc0000088
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IDT_FCR1 0x00000107
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IDT_FCR2 0x00000108
 #define MSR_IDT_FCR3 0x00000109
 #define MSR_IDT_FCR4 0x0000010a
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IDT_MCR0 0x00000110
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IDT_MCR1 0x00000111
 #define MSR_IDT_MCR2 0x00000112
 #define MSR_IDT_MCR3 0x00000113
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IDT_MCR4 0x00000114
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IDT_MCR5 0x00000115
 #define MSR_IDT_MCR6 0x00000116
 #define MSR_IDT_MCR7 0x00000117
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IDT_MCR_CTRL 0x00000120
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_VIA_FCR 0x00001107
 #define MSR_VIA_LONGHAUL 0x0000110a
 #define MSR_VIA_RNG 0x0000110b
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_VIA_BCR2 0x00001147
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_TMTA_LONGRUN_CTRL 0x80868010
 #define MSR_TMTA_LONGRUN_FLAGS 0x80868011
 #define MSR_TMTA_LRTI_READOUT 0x80868018
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_TMTA_LRTI_VOLT_MHZ 0x8086801a
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_P5_MC_ADDR 0x00000000
 #define MSR_IA32_P5_MC_TYPE 0x00000001
 #define MSR_IA32_TSC 0x00000010
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_PLATFORM_ID 0x00000017
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_EBL_CR_POWERON 0x0000002a
 #define MSR_EBC_FREQUENCY_ID 0x0000002c
 #define MSR_SMI_COUNT 0x00000034
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_FEATURE_CONTROL 0x0000003a
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_TSC_ADJUST 0x0000003b
 #define FEATURE_CONTROL_LOCKED (1<<0)
 #define FEATURE_CONTROL_VMXON_ENABLED_INSIDE_SMX (1<<1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define FEATURE_CONTROL_VMXON_ENABLED_OUTSIDE_SMX (1<<2)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_APICBASE 0x0000001b
 #define MSR_IA32_APICBASE_BSP (1<<8)
 #define MSR_IA32_APICBASE_ENABLE (1<<11)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_APICBASE_BASE (0xfffff<<12)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_TSCDEADLINE 0x000006e0
 #define MSR_IA32_UCODE_WRITE 0x00000079
 #define MSR_IA32_UCODE_REV 0x0000008b
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_PERF_STATUS 0x00000198
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_PERF_CTL 0x00000199
 #define MSR_AMD_PSTATE_DEF_BASE 0xc0010064
 #define MSR_AMD_PERF_STATUS 0xc0010063
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_AMD_PERF_CTL 0xc0010062
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MPERF 0x000000e7
 #define MSR_IA32_APERF 0x000000e8
 #define MSR_IA32_THERM_CONTROL 0x0000019a
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_THERM_INTERRUPT 0x0000019b
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define THERM_INT_HIGH_ENABLE (1 << 0)
 #define THERM_INT_LOW_ENABLE (1 << 1)
 #define THERM_INT_PLN_ENABLE (1 << 24)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_THERM_STATUS 0x0000019c
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define THERM_STATUS_PROCHOT (1 << 0)
 #define THERM_STATUS_POWER_LIMIT (1 << 10)
 #define MSR_THERM2_CTL 0x0000019d
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_THERM2_CTL_TM_SELECT (1ULL << 16)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE 0x000001a0
 #define MSR_IA32_TEMPERATURE_TARGET 0x000001a2
 #define MSR_IA32_ENERGY_PERF_BIAS 0x000001b0
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define ENERGY_PERF_BIAS_PERFORMANCE 0
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define ENERGY_PERF_BIAS_NORMAL 6
 #define ENERGY_PERF_BIAS_POWERSAVE 15
 #define MSR_IA32_PACKAGE_THERM_STATUS 0x000001b1
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define PACKAGE_THERM_STATUS_PROCHOT (1 << 0)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define PACKAGE_THERM_STATUS_POWER_LIMIT (1 << 10)
 #define MSR_IA32_PACKAGE_THERM_INTERRUPT 0x000001b2
 #define PACKAGE_THERM_INT_HIGH_ENABLE (1 << 0)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define PACKAGE_THERM_INT_LOW_ENABLE (1 << 1)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define PACKAGE_THERM_INT_PLN_ENABLE (1 << 24)
 #define THERM_INT_THRESHOLD0_ENABLE (1 << 15)
 #define THERM_SHIFT_THRESHOLD0 8
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define THERM_MASK_THRESHOLD0 (0x7f << THERM_SHIFT_THRESHOLD0)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define THERM_INT_THRESHOLD1_ENABLE (1 << 23)
 #define THERM_SHIFT_THRESHOLD1 16
 #define THERM_MASK_THRESHOLD1 (0x7f << THERM_SHIFT_THRESHOLD1)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define THERM_STATUS_THRESHOLD0 (1 << 6)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define THERM_LOG_THRESHOLD0 (1 << 7)
 #define THERM_STATUS_THRESHOLD1 (1 << 8)
 #define THERM_LOG_THRESHOLD1 (1 << 9)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE_FAST_STRING (1ULL << 0)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE_TCC (1ULL << 1)
 #define MSR_IA32_MISC_ENABLE_EMON (1ULL << 7)
 #define MSR_IA32_MISC_ENABLE_BTS_UNAVAIL (1ULL << 11)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE_PEBS_UNAVAIL (1ULL << 12)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE_ENHANCED_SPEEDSTEP (1ULL << 16)
 #define MSR_IA32_MISC_ENABLE_MWAIT (1ULL << 18)
 #define MSR_IA32_MISC_ENABLE_LIMIT_CPUID (1ULL << 22)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE_XTPR_DISABLE (1ULL << 23)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE_XD_DISABLE (1ULL << 34)
 #define MSR_IA32_MISC_ENABLE_X87_COMPAT (1ULL << 2)
 #define MSR_IA32_MISC_ENABLE_TM1 (1ULL << 3)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE_SPLIT_LOCK_DISABLE (1ULL << 4)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE_L3CACHE_DISABLE (1ULL << 6)
 #define MSR_IA32_MISC_ENABLE_SUPPRESS_LOCK (1ULL << 8)
 #define MSR_IA32_MISC_ENABLE_PREFETCH_DISABLE (1ULL << 9)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE_FERR (1ULL << 10)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE_FERR_MULTIPLEX (1ULL << 10)
 #define MSR_IA32_MISC_ENABLE_TM2 (1ULL << 13)
 #define MSR_IA32_MISC_ENABLE_ADJ_PREF_DISABLE (1ULL << 19)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE_SPEEDSTEP_LOCK (1ULL << 20)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE_L1D_CONTEXT (1ULL << 24)
 #define MSR_IA32_MISC_ENABLE_DCU_PREF_DISABLE (1ULL << 37)
 #define MSR_IA32_MISC_ENABLE_TURBO_DISABLE (1ULL << 38)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MISC_ENABLE_IP_PREF_DISABLE (1ULL << 39)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_TSC_DEADLINE 0x000006E0
 #define MSR_IA32_MCG_EAX 0x00000180
 #define MSR_IA32_MCG_EBX 0x00000181
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MCG_ECX 0x00000182
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MCG_EDX 0x00000183
 #define MSR_IA32_MCG_ESI 0x00000184
 #define MSR_IA32_MCG_EDI 0x00000185
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MCG_EBP 0x00000186
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MCG_ESP 0x00000187
 #define MSR_IA32_MCG_EFLAGS 0x00000188
 #define MSR_IA32_MCG_EIP 0x00000189
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_MCG_RESERVED 0x0000018a
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_BPU_PERFCTR0 0x00000300
 #define MSR_P4_BPU_PERFCTR1 0x00000301
 #define MSR_P4_BPU_PERFCTR2 0x00000302
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_BPU_PERFCTR3 0x00000303
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_MS_PERFCTR0 0x00000304
 #define MSR_P4_MS_PERFCTR1 0x00000305
 #define MSR_P4_MS_PERFCTR2 0x00000306
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_MS_PERFCTR3 0x00000307
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_FLAME_PERFCTR0 0x00000308
 #define MSR_P4_FLAME_PERFCTR1 0x00000309
 #define MSR_P4_FLAME_PERFCTR2 0x0000030a
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_FLAME_PERFCTR3 0x0000030b
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_IQ_PERFCTR0 0x0000030c
 #define MSR_P4_IQ_PERFCTR1 0x0000030d
 #define MSR_P4_IQ_PERFCTR2 0x0000030e
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_IQ_PERFCTR3 0x0000030f
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_IQ_PERFCTR4 0x00000310
 #define MSR_P4_IQ_PERFCTR5 0x00000311
 #define MSR_P4_BPU_CCCR0 0x00000360
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_BPU_CCCR1 0x00000361
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_BPU_CCCR2 0x00000362
 #define MSR_P4_BPU_CCCR3 0x00000363
 #define MSR_P4_MS_CCCR0 0x00000364
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_MS_CCCR1 0x00000365
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_MS_CCCR2 0x00000366
 #define MSR_P4_MS_CCCR3 0x00000367
 #define MSR_P4_FLAME_CCCR0 0x00000368
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_FLAME_CCCR1 0x00000369
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_FLAME_CCCR2 0x0000036a
 #define MSR_P4_FLAME_CCCR3 0x0000036b
 #define MSR_P4_IQ_CCCR0 0x0000036c
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_IQ_CCCR1 0x0000036d
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_IQ_CCCR2 0x0000036e
 #define MSR_P4_IQ_CCCR3 0x0000036f
 #define MSR_P4_IQ_CCCR4 0x00000370
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_IQ_CCCR5 0x00000371
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_ALF_ESCR0 0x000003ca
 #define MSR_P4_ALF_ESCR1 0x000003cb
 #define MSR_P4_BPU_ESCR0 0x000003b2
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_BPU_ESCR1 0x000003b3
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_BSU_ESCR0 0x000003a0
 #define MSR_P4_BSU_ESCR1 0x000003a1
 #define MSR_P4_CRU_ESCR0 0x000003b8
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_CRU_ESCR1 0x000003b9
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_CRU_ESCR2 0x000003cc
 #define MSR_P4_CRU_ESCR3 0x000003cd
 #define MSR_P4_CRU_ESCR4 0x000003e0
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_CRU_ESCR5 0x000003e1
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_DAC_ESCR0 0x000003a8
 #define MSR_P4_DAC_ESCR1 0x000003a9
 #define MSR_P4_FIRM_ESCR0 0x000003a4
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_FIRM_ESCR1 0x000003a5
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_FLAME_ESCR0 0x000003a6
 #define MSR_P4_FLAME_ESCR1 0x000003a7
 #define MSR_P4_FSB_ESCR0 0x000003a2
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_FSB_ESCR1 0x000003a3
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_IQ_ESCR0 0x000003ba
 #define MSR_P4_IQ_ESCR1 0x000003bb
 #define MSR_P4_IS_ESCR0 0x000003b4
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_IS_ESCR1 0x000003b5
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_ITLB_ESCR0 0x000003b6
 #define MSR_P4_ITLB_ESCR1 0x000003b7
 #define MSR_P4_IX_ESCR0 0x000003c8
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_IX_ESCR1 0x000003c9
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_MOB_ESCR0 0x000003aa
 #define MSR_P4_MOB_ESCR1 0x000003ab
 #define MSR_P4_MS_ESCR0 0x000003c0
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_MS_ESCR1 0x000003c1
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_PMH_ESCR0 0x000003ac
 #define MSR_P4_PMH_ESCR1 0x000003ad
 #define MSR_P4_RAT_ESCR0 0x000003bc
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_RAT_ESCR1 0x000003bd
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_SAAT_ESCR0 0x000003ae
 #define MSR_P4_SAAT_ESCR1 0x000003af
 #define MSR_P4_SSU_ESCR0 0x000003be
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_SSU_ESCR1 0x000003bf
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_TBPU_ESCR0 0x000003c2
 #define MSR_P4_TBPU_ESCR1 0x000003c3
 #define MSR_P4_TC_ESCR0 0x000003c4
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_TC_ESCR1 0x000003c5
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_P4_U2L_ESCR0 0x000003b0
 #define MSR_P4_U2L_ESCR1 0x000003b1
 #define MSR_P4_PEBS_MATRIX_VERT 0x000003f2
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_CORE_PERF_FIXED_CTR0 0x00000309
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_CORE_PERF_FIXED_CTR1 0x0000030a
 #define MSR_CORE_PERF_FIXED_CTR2 0x0000030b
 #define MSR_CORE_PERF_FIXED_CTR_CTRL 0x0000038d
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_CORE_PERF_GLOBAL_STATUS 0x0000038e
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_CORE_PERF_GLOBAL_CTRL 0x0000038f
 #define MSR_CORE_PERF_GLOBAL_OVF_CTRL 0x00000390
 #define MSR_GEODE_BUSCONT_CONF0 0x00001900
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_VMX_BASIC 0x00000480
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_VMX_PINBASED_CTLS 0x00000481
 #define MSR_IA32_VMX_PROCBASED_CTLS 0x00000482
 #define MSR_IA32_VMX_EXIT_CTLS 0x00000483
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_VMX_ENTRY_CTLS 0x00000484
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_VMX_MISC 0x00000485
 #define MSR_IA32_VMX_CR0_FIXED0 0x00000486
 #define MSR_IA32_VMX_CR0_FIXED1 0x00000487
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_VMX_CR4_FIXED0 0x00000488
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_VMX_CR4_FIXED1 0x00000489
 #define MSR_IA32_VMX_VMCS_ENUM 0x0000048a
 #define MSR_IA32_VMX_PROCBASED_CTLS2 0x0000048b
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_VMX_EPT_VPID_CAP 0x0000048c
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_VMX_TRUE_PINBASED_CTLS 0x0000048d
 #define MSR_IA32_VMX_TRUE_PROCBASED_CTLS 0x0000048e
 #define MSR_IA32_VMX_TRUE_EXIT_CTLS 0x0000048f
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define MSR_IA32_VMX_TRUE_ENTRY_CTLS 0x00000490
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSR_IA32_VMX_VMFUNC 0x00000491
 #define VMX_BASIC_VMCS_SIZE_SHIFT 32
 #define VMX_BASIC_64 0x0001000000000000LLU
 #define VMX_BASIC_MEM_TYPE_SHIFT 50
@@ -551,8 +556,9 @@
 #define VMX_BASIC_INOUT 0x0040000000000000LLU
 #define MSR_IA32_VMX_MISC_VMWRITE_SHADOW_RO_FIELDS (1ULL << 29)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define MSR_IA32_VMX_MISC_PREEMPTION_TIMER_SCALE 0x1F
 #define MSR_VM_CR 0xc0010114
 #define MSR_VM_IGNNE 0xc0010115
 #define MSR_VM_HSAVE_PA 0xc0010117
-#endif
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#endif
diff --git a/libc/kernel/uapi/asm-x86/asm/processor-flags.h b/libc/kernel/uapi/asm-x86/asm/processor-flags.h
index ac602a7..aead779 100644
--- a/libc/kernel/uapi/asm-x86/asm/processor-flags.h
+++ b/libc/kernel/uapi/asm-x86/asm/processor-flags.h
@@ -18,86 +18,152 @@
  ****************************************************************************/
 #ifndef _UAPI_ASM_X86_PROCESSOR_FLAGS_H
 #define _UAPI_ASM_X86_PROCESSOR_FLAGS_H
-#define X86_EFLAGS_CF 0x00000001
-#define X86_EFLAGS_BIT1 0x00000002
+#include <linux/const.h>
+#define X86_EFLAGS_CF_BIT 0
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define X86_EFLAGS_PF 0x00000004
-#define X86_EFLAGS_AF 0x00000010
-#define X86_EFLAGS_ZF 0x00000040
-#define X86_EFLAGS_SF 0x00000080
+#define X86_EFLAGS_CF _BITUL(X86_EFLAGS_CF_BIT)
+#define X86_EFLAGS_FIXED_BIT 1
+#define X86_EFLAGS_FIXED _BITUL(X86_EFLAGS_FIXED_BIT)
+#define X86_EFLAGS_PF_BIT 2
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define X86_EFLAGS_TF 0x00000100
-#define X86_EFLAGS_IF 0x00000200
-#define X86_EFLAGS_DF 0x00000400
-#define X86_EFLAGS_OF 0x00000800
+#define X86_EFLAGS_PF _BITUL(X86_EFLAGS_PF_BIT)
+#define X86_EFLAGS_AF_BIT 4
+#define X86_EFLAGS_AF _BITUL(X86_EFLAGS_AF_BIT)
+#define X86_EFLAGS_ZF_BIT 6
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define X86_EFLAGS_IOPL 0x00003000
-#define X86_EFLAGS_NT 0x00004000
-#define X86_EFLAGS_RF 0x00010000
-#define X86_EFLAGS_VM 0x00020000
+#define X86_EFLAGS_ZF _BITUL(X86_EFLAGS_ZF_BIT)
+#define X86_EFLAGS_SF_BIT 7
+#define X86_EFLAGS_SF _BITUL(X86_EFLAGS_SF_BIT)
+#define X86_EFLAGS_TF_BIT 8
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define X86_EFLAGS_AC 0x00040000
-#define X86_EFLAGS_VIF 0x00080000
-#define X86_EFLAGS_VIP 0x00100000
-#define X86_EFLAGS_ID 0x00200000
+#define X86_EFLAGS_TF _BITUL(X86_EFLAGS_TF_BIT)
+#define X86_EFLAGS_IF_BIT 9
+#define X86_EFLAGS_IF _BITUL(X86_EFLAGS_IF_BIT)
+#define X86_EFLAGS_DF_BIT 10
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define X86_CR0_PE 0x00000001
-#define X86_CR0_MP 0x00000002
-#define X86_CR0_EM 0x00000004
-#define X86_CR0_TS 0x00000008
+#define X86_EFLAGS_DF _BITUL(X86_EFLAGS_DF_BIT)
+#define X86_EFLAGS_OF_BIT 11
+#define X86_EFLAGS_OF _BITUL(X86_EFLAGS_OF_BIT)
+#define X86_EFLAGS_IOPL_BIT 12
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define X86_CR0_ET 0x00000010
-#define X86_CR0_NE 0x00000020
-#define X86_CR0_WP 0x00010000
-#define X86_CR0_AM 0x00040000
+#define X86_EFLAGS_IOPL (_AC(3,UL) << X86_EFLAGS_IOPL_BIT)
+#define X86_EFLAGS_NT_BIT 14
+#define X86_EFLAGS_NT _BITUL(X86_EFLAGS_NT_BIT)
+#define X86_EFLAGS_RF_BIT 16
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define X86_CR0_NW 0x20000000
-#define X86_CR0_CD 0x40000000
-#define X86_CR0_PG 0x80000000
-#define X86_CR3_PWT 0x00000008
+#define X86_EFLAGS_RF _BITUL(X86_EFLAGS_RF_BIT)
+#define X86_EFLAGS_VM_BIT 17
+#define X86_EFLAGS_VM _BITUL(X86_EFLAGS_VM_BIT)
+#define X86_EFLAGS_AC_BIT 18
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define X86_CR3_PCD 0x00000010
-#define X86_CR3_PCID_MASK 0x00000fff
-#define X86_CR4_VME 0x00000001
-#define X86_CR4_PVI 0x00000002
+#define X86_EFLAGS_AC _BITUL(X86_EFLAGS_AC_BIT)
+#define X86_EFLAGS_AC_BIT 18
+#define X86_EFLAGS_AC _BITUL(X86_EFLAGS_AC_BIT)
+#define X86_EFLAGS_VIF_BIT 19
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define X86_CR4_TSD 0x00000004
-#define X86_CR4_DE 0x00000008
-#define X86_CR4_PSE 0x00000010
-#define X86_CR4_PAE 0x00000020
+#define X86_EFLAGS_VIF _BITUL(X86_EFLAGS_VIF_BIT)
+#define X86_EFLAGS_VIP_BIT 20
+#define X86_EFLAGS_VIP _BITUL(X86_EFLAGS_VIP_BIT)
+#define X86_EFLAGS_ID_BIT 21
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define X86_CR4_MCE 0x00000040
-#define X86_CR4_PGE 0x00000080
-#define X86_CR4_PCE 0x00000100
-#define X86_CR4_OSFXSR 0x00000200
+#define X86_EFLAGS_ID _BITUL(X86_EFLAGS_ID_BIT)
+#define X86_CR0_PE_BIT 0
+#define X86_CR0_PE _BITUL(X86_CR0_PE_BIT)
+#define X86_CR0_MP_BIT 1
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define X86_CR4_OSXMMEXCPT 0x00000400
-#define X86_CR4_VMXE 0x00002000
-#define X86_CR4_RDWRGSFS 0x00010000
-#define X86_CR4_PCIDE 0x00020000
+#define X86_CR0_MP _BITUL(X86_CR0_MP_BIT)
+#define X86_CR0_EM_BIT 2
+#define X86_CR0_EM _BITUL(X86_CR0_EM_BIT)
+#define X86_CR0_TS_BIT 3
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
-#define X86_CR4_OSXSAVE 0x00040000
-#define X86_CR4_SMEP 0x00100000
-#define X86_CR4_SMAP 0x00200000
-#define X86_CR8_TPR 0x0000000F
+#define X86_CR0_TS _BITUL(X86_CR0_TS_BIT)
+#define X86_CR0_ET_BIT 4
+#define X86_CR0_ET _BITUL(X86_CR0_ET_BIT)
+#define X86_CR0_NE_BIT 5
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR0_NE _BITUL(X86_CR0_NE_BIT)
+#define X86_CR0_WP_BIT 16
+#define X86_CR0_WP _BITUL(X86_CR0_WP_BIT)
+#define X86_CR0_AM_BIT 18
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR0_AM _BITUL(X86_CR0_AM_BIT)
+#define X86_CR0_NW_BIT 29
+#define X86_CR0_NW _BITUL(X86_CR0_NW_BIT)
+#define X86_CR0_CD_BIT 30
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR0_CD _BITUL(X86_CR0_CD_BIT)
+#define X86_CR0_PG_BIT 31
+#define X86_CR0_PG _BITUL(X86_CR0_PG_BIT)
+#define X86_CR3_PWT_BIT 3
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR3_PWT _BITUL(X86_CR3_PWT_BIT)
+#define X86_CR3_PCD_BIT 4
+#define X86_CR3_PCD _BITUL(X86_CR3_PCD_BIT)
+#define X86_CR3_PCID_MASK _AC(0x00000fff,UL)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR4_VME_BIT 0
+#define X86_CR4_VME _BITUL(X86_CR4_VME_BIT)
+#define X86_CR4_PVI_BIT 1
+#define X86_CR4_PVI _BITUL(X86_CR4_PVI_BIT)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR4_TSD_BIT 2
+#define X86_CR4_TSD _BITUL(X86_CR4_TSD_BIT)
+#define X86_CR4_DE_BIT 3
+#define X86_CR4_DE _BITUL(X86_CR4_DE_BIT)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR4_PSE_BIT 4
+#define X86_CR4_PSE _BITUL(X86_CR4_PSE_BIT)
+#define X86_CR4_PAE_BIT 5
+#define X86_CR4_PAE _BITUL(X86_CR4_PAE_BIT)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR4_MCE_BIT 6
+#define X86_CR4_MCE _BITUL(X86_CR4_MCE_BIT)
+#define X86_CR4_PGE_BIT 7
+#define X86_CR4_PGE _BITUL(X86_CR4_PGE_BIT)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR4_PCE_BIT 8
+#define X86_CR4_PCE _BITUL(X86_CR4_PCE_BIT)
+#define X86_CR4_OSFXSR_BIT 9
+#define X86_CR4_OSFXSR _BITUL(X86_CR4_OSFXSR_BIT)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR4_OSXMMEXCPT_BIT 10
+#define X86_CR4_OSXMMEXCPT _BITUL(X86_CR4_OSXMMEXCPT_BIT)
+#define X86_CR4_VMXE_BIT 13
+#define X86_CR4_VMXE _BITUL(X86_CR4_VMXE_BIT)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR4_SMXE_BIT 14
+#define X86_CR4_SMXE _BITUL(X86_CR4_SMXE_BIT)
+#define X86_CR4_FSGSBASE_BIT 16
+#define X86_CR4_FSGSBASE _BITUL(X86_CR4_FSGSBASE_BIT)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR4_PCIDE_BIT 17
+#define X86_CR4_PCIDE _BITUL(X86_CR4_PCIDE_BIT)
+#define X86_CR4_OSXSAVE_BIT 18
+#define X86_CR4_OSXSAVE _BITUL(X86_CR4_OSXSAVE_BIT)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR4_SMEP_BIT 20
+#define X86_CR4_SMEP _BITUL(X86_CR4_SMEP_BIT)
+#define X86_CR4_SMAP_BIT 21
+#define X86_CR4_SMAP _BITUL(X86_CR4_SMAP_BIT)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define X86_CR8_TPR _AC(0x0000000f,UL)
 #define CX86_PCR0 0x20
 #define CX86_GCR 0xb8
 #define CX86_CCR0 0xc0
-#define CX86_CCR1 0xc1
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define CX86_CCR1 0xc1
 #define CX86_CCR2 0xc2
 #define CX86_CCR3 0xc3
 #define CX86_CCR4 0xe8
-#define CX86_CCR5 0xe9
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define CX86_CCR5 0xe9
 #define CX86_CCR6 0xea
 #define CX86_CCR7 0xeb
 #define CX86_PCR1 0xf0
-#define CX86_DIR0 0xfe
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define CX86_DIR0 0xfe
 #define CX86_DIR1 0xff
 #define CX86_ARR_BASE 0xc4
 #define CX86_RCR_BASE 0xdc
-#endif
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#endif
diff --git a/libc/kernel/uapi/asm-x86/asm/sembuf.h b/libc/kernel/uapi/asm-x86/asm/sembuf.h
index d1cb296..41d3b2a 100644
--- a/libc/kernel/uapi/asm-x86/asm/sembuf.h
+++ b/libc/kernel/uapi/asm-x86/asm/sembuf.h
@@ -22,13 +22,13 @@
  struct ipc64_perm sem_perm;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  __kernel_time_t sem_otime;
- unsigned long __unused1;
+ __kernel_ulong_t __unused1;
  __kernel_time_t sem_ctime;
- unsigned long __unused2;
+ __kernel_ulong_t __unused2;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
- unsigned long sem_nsems;
- unsigned long __unused3;
- unsigned long __unused4;
+ __kernel_ulong_t sem_nsems;
+ __kernel_ulong_t __unused3;
+ __kernel_ulong_t __unused4;
 };
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #endif
diff --git a/libc/kernel/uapi/asm-x86/asm/stat.h b/libc/kernel/uapi/asm-x86/asm/stat.h
index 04c5569..aebacbd 100644
--- a/libc/kernel/uapi/asm-x86/asm/stat.h
+++ b/libc/kernel/uapi/asm-x86/asm/stat.h
@@ -18,116 +18,117 @@
  ****************************************************************************/
 #ifndef _ASM_X86_STAT_H
 #define _ASM_X86_STAT_H
+#include <asm/posix_types.h>
 #define STAT_HAVE_NSEC 1
-#ifdef __i386__
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#ifdef __i386__
 struct stat {
  unsigned long st_dev;
  unsigned long st_ino;
- unsigned short st_mode;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned short st_mode;
  unsigned short st_nlink;
  unsigned short st_uid;
  unsigned short st_gid;
- unsigned long st_rdev;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned long st_rdev;
  unsigned long st_size;
  unsigned long st_blksize;
  unsigned long st_blocks;
- unsigned long st_atime;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned long st_atime;
  unsigned long st_atime_nsec;
  unsigned long st_mtime;
  unsigned long st_mtime_nsec;
- unsigned long st_ctime;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned long st_ctime;
  unsigned long st_ctime_nsec;
  unsigned long __unused4;
  unsigned long __unused5;
-};
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+};
 #define INIT_STRUCT_STAT_PADDING(st) do {   st.__unused4 = 0;   st.__unused5 = 0;  } while (0)
 #define STAT64_HAS_BROKEN_ST_INO 1
 struct stat64 {
- unsigned long long st_dev;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned long long st_dev;
  unsigned char __pad0[4];
  unsigned long __st_ino;
  unsigned int st_mode;
- unsigned int st_nlink;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned int st_nlink;
  unsigned long st_uid;
  unsigned long st_gid;
  unsigned long long st_rdev;
- unsigned char __pad3[4];
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned char __pad3[4];
  long long st_size;
  unsigned long st_blksize;
  unsigned long long st_blocks;
- unsigned long st_atime;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned long st_atime;
  unsigned long st_atime_nsec;
  unsigned long st_mtime;
  unsigned int st_mtime_nsec;
- unsigned long st_ctime;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned long st_ctime;
  unsigned long st_ctime_nsec;
  unsigned long long st_ino;
 };
-#define INIT_STRUCT_STAT64_PADDING(st) do {   memset(&st.__pad0, 0, sizeof(st.__pad0));   memset(&st.__pad3, 0, sizeof(st.__pad3));  } while (0)
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define INIT_STRUCT_STAT64_PADDING(st) do {   memset(&st.__pad0, 0, sizeof(st.__pad0));   memset(&st.__pad3, 0, sizeof(st.__pad3));  } while (0)
 #else
 struct stat {
- unsigned long st_dev;
- unsigned long st_ino;
+ __kernel_ulong_t st_dev;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
- unsigned long st_nlink;
+ __kernel_ulong_t st_ino;
+ __kernel_ulong_t st_nlink;
  unsigned int st_mode;
  unsigned int st_uid;
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  unsigned int st_gid;
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  unsigned int __pad0;
- unsigned long st_rdev;
- long st_size;
- long st_blksize;
+ __kernel_ulong_t st_rdev;
+ __kernel_long_t st_size;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
- long st_blocks;
- unsigned long st_atime;
- unsigned long st_atime_nsec;
- unsigned long st_mtime;
+ __kernel_long_t st_blksize;
+ __kernel_long_t st_blocks;
+ __kernel_ulong_t st_atime;
+ __kernel_ulong_t st_atime_nsec;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
- unsigned long st_mtime_nsec;
- unsigned long st_ctime;
- unsigned long st_ctime_nsec;
- long __linux_unused[3];
+ __kernel_ulong_t st_mtime;
+ __kernel_ulong_t st_mtime_nsec;
+ __kernel_ulong_t st_ctime;
+ __kernel_ulong_t st_ctime_nsec;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ __kernel_long_t __linux_unused[3];
 };
 #define INIT_STRUCT_STAT_PADDING(st) do {   st.__pad0 = 0;   st.__linux_unused[0] = 0;   st.__linux_unused[1] = 0;   st.__linux_unused[2] = 0;  } while (0)
 #endif
-struct __old_kernel_stat {
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+struct __old_kernel_stat {
  unsigned short st_dev;
  unsigned short st_ino;
  unsigned short st_mode;
- unsigned short st_nlink;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned short st_nlink;
  unsigned short st_uid;
  unsigned short st_gid;
  unsigned short st_rdev;
-#ifdef __i386__
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#ifdef __i386__
  unsigned long st_size;
  unsigned long st_atime;
  unsigned long st_mtime;
- unsigned long st_ctime;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned long st_ctime;
 #else
  unsigned int st_size;
  unsigned int st_atime;
- unsigned int st_mtime;
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+ unsigned int st_mtime;
  unsigned int st_ctime;
 #endif
 };
-#endif
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#endif
diff --git a/libc/kernel/uapi/asm-x86/asm/unistd_32.h b/libc/kernel/uapi/asm-x86/asm/unistd_32.h
index 2dd9fc7..4838ae1 100644
--- a/libc/kernel/uapi/asm-x86/asm/unistd_32.h
+++ b/libc/kernel/uapi/asm-x86/asm/unistd_32.h
@@ -452,4 +452,7 @@
 #define __NR_kcmp 349
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_finit_module 350
+#define __NR_sched_setattr 351
+#define __NR_sched_getattr 352
 #endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
diff --git a/libc/kernel/uapi/asm-x86/asm/unistd_64.h b/libc/kernel/uapi/asm-x86/asm/unistd_64.h
index c545281..7bdb301 100644
--- a/libc/kernel/uapi/asm-x86/asm/unistd_64.h
+++ b/libc/kernel/uapi/asm-x86/asm/unistd_64.h
@@ -411,4 +411,6 @@
 #define __NR_kcmp 312
 #define __NR_finit_module 313
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define __NR_sched_setattr 314
+#define __NR_sched_getattr 315
 #endif
diff --git a/libc/kernel/uapi/asm-x86/asm/unistd_x32.h b/libc/kernel/uapi/asm-x86/asm/unistd_x32.h
index e6d3774..ee51fb5 100644
--- a/libc/kernel/uapi/asm-x86/asm/unistd_x32.h
+++ b/libc/kernel/uapi/asm-x86/asm/unistd_x32.h
@@ -358,43 +358,46 @@
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_kcmp (__X32_SYSCALL_BIT + 312)
 #define __NR_finit_module (__X32_SYSCALL_BIT + 313)
+#define __NR_sched_setattr (__X32_SYSCALL_BIT + 314)
+#define __NR_sched_getattr (__X32_SYSCALL_BIT + 315)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_rt_sigaction (__X32_SYSCALL_BIT + 512)
 #define __NR_rt_sigreturn (__X32_SYSCALL_BIT + 513)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_ioctl (__X32_SYSCALL_BIT + 514)
 #define __NR_readv (__X32_SYSCALL_BIT + 515)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_writev (__X32_SYSCALL_BIT + 516)
 #define __NR_recvfrom (__X32_SYSCALL_BIT + 517)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_sendmsg (__X32_SYSCALL_BIT + 518)
 #define __NR_recvmsg (__X32_SYSCALL_BIT + 519)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_execve (__X32_SYSCALL_BIT + 520)
 #define __NR_ptrace (__X32_SYSCALL_BIT + 521)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_rt_sigpending (__X32_SYSCALL_BIT + 522)
 #define __NR_rt_sigtimedwait (__X32_SYSCALL_BIT + 523)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_rt_sigqueueinfo (__X32_SYSCALL_BIT + 524)
 #define __NR_sigaltstack (__X32_SYSCALL_BIT + 525)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_timer_create (__X32_SYSCALL_BIT + 526)
 #define __NR_mq_notify (__X32_SYSCALL_BIT + 527)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_kexec_load (__X32_SYSCALL_BIT + 528)
 #define __NR_waitid (__X32_SYSCALL_BIT + 529)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_set_robust_list (__X32_SYSCALL_BIT + 530)
 #define __NR_get_robust_list (__X32_SYSCALL_BIT + 531)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_vmsplice (__X32_SYSCALL_BIT + 532)
 #define __NR_move_pages (__X32_SYSCALL_BIT + 533)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_preadv (__X32_SYSCALL_BIT + 534)
 #define __NR_pwritev (__X32_SYSCALL_BIT + 535)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_rt_tgsigqueueinfo (__X32_SYSCALL_BIT + 536)
 #define __NR_recvmmsg (__X32_SYSCALL_BIT + 537)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_sendmmsg (__X32_SYSCALL_BIT + 538)
 #define __NR_process_vm_readv (__X32_SYSCALL_BIT + 539)
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_process_vm_writev (__X32_SYSCALL_BIT + 540)
 #define __NR_setsockopt (__X32_SYSCALL_BIT + 541)
-/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 #define __NR_getsockopt (__X32_SYSCALL_BIT + 542)
 #endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
diff --git a/libc/kernel/uapi/asm-x86/asm/vmx.h b/libc/kernel/uapi/asm-x86/asm/vmx.h
index 6c90937..e10e2b6 100644
--- a/libc/kernel/uapi/asm-x86/asm/vmx.h
+++ b/libc/kernel/uapi/asm-x86/asm/vmx.h
@@ -66,11 +66,13 @@
 #define EXIT_REASON_EPT_VIOLATION 48
 #define EXIT_REASON_EPT_MISCONFIG 49
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define EXIT_REASON_INVEPT 50
 #define EXIT_REASON_PREEMPTION_TIMER 52
 #define EXIT_REASON_WBINVD 54
 #define EXIT_REASON_XSETBV 55
-#define EXIT_REASON_APIC_WRITE 56
 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
+#define EXIT_REASON_APIC_WRITE 56
 #define EXIT_REASON_INVPCID 58
-#define VMX_EXIT_REASONS   { EXIT_REASON_EXCEPTION_NMI, "EXCEPTION_NMI" },   { EXIT_REASON_EXTERNAL_INTERRUPT, "EXTERNAL_INTERRUPT" },   { EXIT_REASON_TRIPLE_FAULT, "TRIPLE_FAULT" },   { EXIT_REASON_PENDING_INTERRUPT, "PENDING_INTERRUPT" },   { EXIT_REASON_NMI_WINDOW, "NMI_WINDOW" },   { EXIT_REASON_TASK_SWITCH, "TASK_SWITCH" },   { EXIT_REASON_CPUID, "CPUID" },   { EXIT_REASON_HLT, "HLT" },   { EXIT_REASON_INVLPG, "INVLPG" },   { EXIT_REASON_RDPMC, "RDPMC" },   { EXIT_REASON_RDTSC, "RDTSC" },   { EXIT_REASON_VMCALL, "VMCALL" },   { EXIT_REASON_VMCLEAR, "VMCLEAR" },   { EXIT_REASON_VMLAUNCH, "VMLAUNCH" },   { EXIT_REASON_VMPTRLD, "VMPTRLD" },   { EXIT_REASON_VMPTRST, "VMPTRST" },   { EXIT_REASON_VMREAD, "VMREAD" },   { EXIT_REASON_VMRESUME, "VMRESUME" },   { EXIT_REASON_VMWRITE, "VMWRITE" },   { EXIT_REASON_VMOFF, "VMOFF" },   { EXIT_REASON_VMON, "VMON" },   { EXIT_REASON_CR_ACCESS, "CR_ACCESS" },   { EXIT_REASON_DR_ACCESS, "DR_ACCESS" },   { EXIT_REASON_IO_INSTRUCTION, "IO_INSTRUCTION" },   { EXIT_REASON_MSR_READ, "MSR_READ" },   { EXIT_REASON_MSR_WRITE, "MSR_WRITE" },   { EXIT_REASON_MWAIT_INSTRUCTION, "MWAIT_INSTRUCTION" },   { EXIT_REASON_MONITOR_INSTRUCTION, "MONITOR_INSTRUCTION" },   { EXIT_REASON_PAUSE_INSTRUCTION, "PAUSE_INSTRUCTION" },   { EXIT_REASON_MCE_DURING_VMENTRY, "MCE_DURING_VMENTRY" },   { EXIT_REASON_TPR_BELOW_THRESHOLD, "TPR_BELOW_THRESHOLD" },   { EXIT_REASON_APIC_ACCESS, "APIC_ACCESS" },   { EXIT_REASON_EPT_VIOLATION, "EPT_VIOLATION" },   { EXIT_REASON_EPT_MISCONFIG, "EPT_MISCONFIG" },   { EXIT_REASON_WBINVD, "WBINVD" },   { EXIT_REASON_APIC_WRITE, "APIC_WRITE" },   { EXIT_REASON_EOI_INDUCED, "EOI_INDUCED" },   { EXIT_REASON_INVALID_STATE, "INVALID_STATE" },   { EXIT_REASON_INVD, "INVD" },   { EXIT_REASON_INVPCID, "INVPCID" },   { EXIT_REASON_PREEMPTION_TIMER, "PREEMPTION_TIMER" }
+#define VMX_EXIT_REASONS   { EXIT_REASON_EXCEPTION_NMI, "EXCEPTION_NMI" },   { EXIT_REASON_EXTERNAL_INTERRUPT, "EXTERNAL_INTERRUPT" },   { EXIT_REASON_TRIPLE_FAULT, "TRIPLE_FAULT" },   { EXIT_REASON_PENDING_INTERRUPT, "PENDING_INTERRUPT" },   { EXIT_REASON_NMI_WINDOW, "NMI_WINDOW" },   { EXIT_REASON_TASK_SWITCH, "TASK_SWITCH" },   { EXIT_REASON_CPUID, "CPUID" },   { EXIT_REASON_HLT, "HLT" },   { EXIT_REASON_INVLPG, "INVLPG" },   { EXIT_REASON_RDPMC, "RDPMC" },   { EXIT_REASON_RDTSC, "RDTSC" },   { EXIT_REASON_VMCALL, "VMCALL" },   { EXIT_REASON_VMCLEAR, "VMCLEAR" },   { EXIT_REASON_VMLAUNCH, "VMLAUNCH" },   { EXIT_REASON_VMPTRLD, "VMPTRLD" },   { EXIT_REASON_VMPTRST, "VMPTRST" },   { EXIT_REASON_VMREAD, "VMREAD" },   { EXIT_REASON_VMRESUME, "VMRESUME" },   { EXIT_REASON_VMWRITE, "VMWRITE" },   { EXIT_REASON_VMOFF, "VMOFF" },   { EXIT_REASON_VMON, "VMON" },   { EXIT_REASON_CR_ACCESS, "CR_ACCESS" },   { EXIT_REASON_DR_ACCESS, "DR_ACCESS" },   { EXIT_REASON_IO_INSTRUCTION, "IO_INSTRUCTION" },   { EXIT_REASON_MSR_READ, "MSR_READ" },   { EXIT_REASON_MSR_WRITE, "MSR_WRITE" },   { EXIT_REASON_MWAIT_INSTRUCTION, "MWAIT_INSTRUCTION" },   { EXIT_REASON_MONITOR_INSTRUCTION, "MONITOR_INSTRUCTION" },   { EXIT_REASON_PAUSE_INSTRUCTION, "PAUSE_INSTRUCTION" },   { EXIT_REASON_MCE_DURING_VMENTRY, "MCE_DURING_VMENTRY" },   { EXIT_REASON_TPR_BELOW_THRESHOLD, "TPR_BELOW_THRESHOLD" },   { EXIT_REASON_APIC_ACCESS, "APIC_ACCESS" },   { EXIT_REASON_EPT_VIOLATION, "EPT_VIOLATION" },   { EXIT_REASON_EPT_MISCONFIG, "EPT_MISCONFIG" },   { EXIT_REASON_INVEPT, "INVEPT" },   { EXIT_REASON_PREEMPTION_TIMER, "PREEMPTION_TIMER" },   { EXIT_REASON_WBINVD, "WBINVD" },   { EXIT_REASON_APIC_WRITE, "APIC_WRITE" },   { EXIT_REASON_EOI_INDUCED, "EOI_INDUCED" },   { EXIT_REASON_INVALID_STATE, "INVALID_STATE" },   { EXIT_REASON_INVD, "INVD" },   { EXIT_REASON_INVPCID, "INVPCID" }
 #endif
+/* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */