am e4a21c89: signal: Align the sigset_t size passed to from user space to kernel.
* commit 'e4a21c89a8b24b32f7a2637b45522dfa59f2aaa4':
signal: Align the sigset_t size passed to from user space to kernel.
diff --git a/libc/arch-arm/bionic/atexit.S b/libc/arch-arm/bionic/atexit.S
index aa1e18d..beea685 100644
--- a/libc/arch-arm/bionic/atexit.S
+++ b/libc/arch-arm/bionic/atexit.S
@@ -37,16 +37,10 @@
.eabi_attribute 26, 2
.eabi_attribute 30, 4
.eabi_attribute 18, 4
- .code 16
- .section .text.atexit,"ax",%progbits
- .align 2
- .global atexit
.hidden atexit
.code 16
.thumb_func
- .type atexit, %function
-atexit:
- .fnstart
+ENTRY(atexit)
.LFB0:
.save {r4, lr}
push {r4, lr}
@@ -64,6 +58,5 @@
.L3:
.word __dso_handle-(.LPIC0+4)
.LFE0:
- .fnend
- .size atexit, .-atexit
+END(atexit)
#endif
diff --git a/libc/arch-arm/bionic/memcpy.S b/libc/arch-arm/bionic/memcpy.S
index 04ba848..438fa00 100644
--- a/libc/arch-arm/bionic/memcpy.S
+++ b/libc/arch-arm/bionic/memcpy.S
@@ -34,16 +34,11 @@
.text
.fpu neon
- .global memcpy
- .type memcpy, %function
- .align 4
-
/* a prefetch distance of 4 cache-lines works best experimentally */
#define CACHE_LINE_SIZE 64
#define PREFETCH_DISTANCE (CACHE_LINE_SIZE*4)
-memcpy:
- .fnstart
+ENTRY(memcpy)
.save {r0, lr}
stmfd sp!, {r0, lr}
diff --git a/libc/arch-arm/bionic/strcmp.S b/libc/arch-arm/bionic/strcmp.S
index 9fdbd56..764a531 100644
--- a/libc/arch-arm/bionic/strcmp.S
+++ b/libc/arch-arm/bionic/strcmp.S
@@ -28,13 +28,10 @@
*/
#include <machine/cpu-features.h>
+#include <machine/asm.h>
.text
- .global strcmp
- .type strcmp, %function
- .align 4
-
#ifdef __ARMEB__
#define SHFT2LSB lsl
#define SHFT2LSBEQ lsleq
@@ -54,8 +51,7 @@
#define magic1(REG) REG
#define magic2(REG) REG, lsl #7
-strcmp:
- .fnstart
+ENTRY(strcmp)
PLD(r0, #0)
PLD(r1, #0)
eor r2, r0, r1
@@ -136,7 +132,6 @@
#endif
ldr r4, [sp], #4
bx lr
- .fnend
.Lstrcmp_unaligned:
wp1 .req r0
@@ -319,3 +314,4 @@
ldr r4, [sp], #4
ldr r5, [sp], #4
bx lr
+END(strcmp)
diff --git a/libc/kernel/common/media/soc2030.h b/libc/kernel/common/media/soc2030.h
index ad0ddfc..850ab13 100644
--- a/libc/kernel/common/media/soc2030.h
+++ b/libc/kernel/common/media/soc2030.h
@@ -12,7 +12,7 @@
#ifndef __SOC2030_H__
#define __SOC2030_H__
-#include <linux/ioctl.h>
+#include <linux/ioctl.h>
#define SOC2030_IOCTL_SET_MODE _IOWR('o', 1, struct soc2030_mode)
#define SOC2030_IOCTL_GET_STATUS _IOC(_IOC_READ, 'o', 2, 10)
@@ -22,10 +22,11 @@
#define SOC2030_IOCTL_SET_EFFECT _IOWR('o', 6, unsigned int)
#define SOC2030_IOCTL_SET_WHITEBALANCE _IOWR('o', 7, unsigned int)
#define SOC2030_IOCTL_SET_EXP_COMP _IOWR('o', 8, int)
+#define SOC2030_IOCTL_SET_LOCK _IOWR('o', 9, struct soc2030_lock)
#define SOC2030_POLL_WAITMS 50
#define SOC2030_MAX_RETRIES 3
-#define SOC2030_POLL_RETRIES 5
+#define SOC2030_POLL_RETRIES 7
#define SOC2030_MAX_PRIVATE_SIZE 1024
#define SOC2030_MAX_NUM_MODES 6
@@ -45,8 +46,21 @@
WRITE_VAR_DATA,
POLL_VAR_DATA,
DELAY_MS,
+ WRITE_REG_VAR1,
+ WRITE_REG_VAR2,
+ WRITE_REG_VAR3,
+ WRITE_REG_VAR4,
+ READ_REG_VAR1,
+ READ_REG_VAR2,
+ READ_REG_VAR3,
+ READ_REG_VAR4,
};
+#define REG_VAR1 (READ_REG_VAR1 - READ_REG_VAR1)
+#define REG_VAR2 (READ_REG_VAR2 - READ_REG_VAR1)
+#define REG_VAR3 (READ_REG_VAR3 - READ_REG_VAR1)
+#define REG_VAR4 (READ_REG_VAR4 - READ_REG_VAR1)
+
enum {
EFFECT_NONE,
EFFECT_BW,
@@ -74,6 +88,14 @@
__u16 val;
};
+struct soc2030_lock {
+ __u8 aelock;
+ __u8 aerelock;
+ __u8 awblock;
+ __u8 awbrelock;
+ __u8 previewactive;
+};
+
struct soc2030_mode {
int xres;
int yres;
@@ -82,5 +104,3 @@
};
#endif
-
-