diff --git a/libc/Android.bp b/libc/Android.bp
index 3ee0ee4..39bd2ec 100644
--- a/libc/Android.bp
+++ b/libc/Android.bp
@@ -1969,16 +1969,13 @@
     defaults: ["linux_bionic_supported"],
     vendor_available: true,
 
-
-    cflags: ["-Wno-gcc-compat", "-Werror"],
+    cflags: ["-Wno-gcc-compat", "-Wall", "-Werror"],
 }
 
 cc_defaults {
     name: "crt_so_defaults",
+    defaults: ["crt_defaults"],
 
-    cflags: ["-Wno-gcc-compat", "-Werror"],
-
-    vendor_available: true,
     arch: {
         mips: {
             cflags: ["-fPIC"],
@@ -2007,10 +2004,7 @@
     },
     srcs: ["arch-common/bionic/crtbrand.S"],
 
-    defaults: [
-        "crt_defaults",
-        "crt_so_defaults",
-    ],
+    defaults: ["crt_so_defaults"],
 }
 
 cc_object {
@@ -2018,19 +2012,13 @@
     local_include_dirs: ["include"],
     srcs: ["arch-common/bionic/crtbegin_so.c"],
 
-    defaults: [
-        "crt_defaults",
-        "crt_so_defaults",
-    ],
+    defaults: ["crt_so_defaults"],
 }
 
 cc_object {
     name: "crtbegin_so",
 
-    defaults: [
-        "crt_defaults",
-        "crt_so_defaults",
-    ],
+    defaults: ["crt_so_defaults"],
     objs: [
         "crtbegin_so1",
         "crtbrand",
@@ -2042,10 +2030,7 @@
     local_include_dirs: ["include"],
     srcs: ["arch-common/bionic/crtend_so.S"],
 
-    defaults: [
-        "crt_defaults",
-        "crt_so_defaults",
-    ],
+    defaults: ["crt_so_defaults"],
 }
 
 cc_object {
diff --git a/libc/include/android/legacy_fenv_inlines_arm.h b/libc/include/android/legacy_fenv_inlines_arm.h
index 58c49c2..de024cf 100644
--- a/libc/include/android/legacy_fenv_inlines_arm.h
+++ b/libc/include/android/legacy_fenv_inlines_arm.h
@@ -35,9 +35,6 @@
 
 __BEGIN_DECLS
 
-#define FPSCR_ENABLE_SHIFT 8
-#define FPSCR_ENABLE_MASK  (FE_ALL_EXCEPT << FPSCR_ENABLE_SHIFT)
-
 #define FPSCR_RMODE_SHIFT 22
 
 static __inline int fegetenv(fenv_t* __envp) {
@@ -108,7 +105,7 @@
   fenv_t __env;
   fegetenv(&__env);
   *__envp = __env;
-  __env &= ~(FE_ALL_EXCEPT | FPSCR_ENABLE_MASK);
+  __env &= ~FE_ALL_EXCEPT;
   fesetenv(&__env);
   return 0;
 }
@@ -121,30 +118,18 @@
   return 0;
 }
 
-static __inline int feenableexcept(int __mask) {
-  fenv_t __old_fpscr, __new_fpscr;
-  fegetenv(&__old_fpscr);
-  __new_fpscr = __old_fpscr | (__mask & FE_ALL_EXCEPT) << FPSCR_ENABLE_SHIFT;
-  fesetenv(&__new_fpscr);
-  return ((__old_fpscr >> FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
+static __inline int feenableexcept(int __mask __unused) {
+  return -1;
 }
 
-static __inline int fedisableexcept(int __mask) {
-  fenv_t __old_fpscr, __new_fpscr;
-  fegetenv(&__old_fpscr);
-  __new_fpscr = __old_fpscr & ~((__mask & FE_ALL_EXCEPT) << FPSCR_ENABLE_SHIFT);
-  fesetenv(&__new_fpscr);
-  return ((__old_fpscr >> FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
+static __inline int fedisableexcept(int __mask __unused) {
+  return 0;
 }
 
 static __inline int fegetexcept(void) {
-  fenv_t __fpscr;
-  fegetenv(&__fpscr);
-  return ((__fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT);
+  return 0;
 }
 
-#undef FPSCR_ENABLE_SHIFT
-#undef FPSCR_ENABLE_MASK
 #undef FPSCR_RMODE_SHIFT
 
 __END_DECLS
diff --git a/libc/include/bits/fenv_arm.h b/libc/include/bits/fenv_arm.h
index 542ddbe..042fec3 100644
--- a/libc/include/bits/fenv_arm.h
+++ b/libc/include/bits/fenv_arm.h
@@ -26,13 +26,6 @@
  * $FreeBSD: src/lib/msun/arm/fenv.h,v 1.5 2005/03/16 19:03:45 das Exp $
  */
 
-/*
- * Rewritten for Android.
- *
- * The ARM FPSCR is described here:
- * http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0344b/Chdfafia.html
- */
-
 #ifndef _BITS_FENV_ARM_H_
 #define _BITS_FENV_ARM_H_
 
@@ -40,7 +33,28 @@
 
 __BEGIN_DECLS
 
+/*
+ * The ARM Cortex-A75 registers are described here:
+ *
+ * AArch64:
+ *  FPCR: http://infocenter.arm.com/help/topic/com.arm.doc.100403_0200_00_en/lau1442502503726.html
+ *  FPSR: http://infocenter.arm.com/help/topic/com.arm.doc.100403_0200_00_en/lau1442502526288.html
+ * AArch32:
+ *  FPSCR: http://infocenter.arm.com/help/topic/com.arm.doc.100403_0200_00_en/lau1442504290459.html
+ */
+
+#if defined(__LP64__)
+typedef struct {
+  /* FPCR, Floating-point Control Register. */
+  __uint32_t __control;
+  /* FPSR, Floating-point Status Register. */
+  __uint32_t __status;
+} fenv_t;
+
+#else
 typedef __uint32_t fenv_t;
+#endif
+
 typedef __uint32_t fexcept_t;
 
 /* Exception flags. */
@@ -49,8 +63,8 @@
 #define FE_OVERFLOW   0x04
 #define FE_UNDERFLOW  0x08
 #define FE_INEXACT    0x10
-#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \
-                       FE_OVERFLOW | FE_UNDERFLOW)
+#define FE_DENORMAL   0x80
+#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | FE_OVERFLOW | FE_UNDERFLOW | FE_DENORMAL)
 
 /* Rounding modes. */
 #define FE_TONEAREST  0x0
diff --git a/libc/include/bits/fenv_arm64.h b/libc/include/bits/fenv_arm64.h
deleted file mode 100644
index 67f0fb4..0000000
--- a/libc/include/bits/fenv_arm64.h
+++ /dev/null
@@ -1,102 +0,0 @@
-/*-
- * Copyright (c) 2004-2005 David Schultz <das@FreeBSD.ORG>
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions
- * are met:
- * 1. Redistributions of source code must retain the above copyright
- *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
- *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
- * SUCH DAMAGE.
- *
- * $FreeBSD: src/lib/msun/arm/fenv.h,v 1.5 2005/03/16 19:03:45 das Exp $
- */
-
-/*
- * In ARMv8, AArch64 state, floating-point operation is controlled by:
- *
- *  * FPCR - 32Bit Floating-Point Control Register:
- *      * [31:27] - Reserved, Res0;
- *      * [26]    - AHP, Alternative half-precision control bit;
- *      * [25]    - DN, Default NaN mode control bit;
- *      * [24]    - FZ, Flush-to-zero mode control bit;
- *      * [23:22] - RMode, Rounding Mode control field:
- *            * 00  - Round to Nearest (RN) mode;
- *            * 01  - Round towards Plus Infinity (RP) mode;
- *            * 10  - Round towards Minus Infinity (RM) mode;
- *            * 11  - Round towards Zero (RZ) mode.
- *      * [21:20] - Stride, ignored during AArch64 execution;
- *      * [19]    - Reserved, Res0;
- *      * [18:16] - Len, ignored during AArch64 execution;
- *      * [15]    - IDE, Input Denormal exception trap;
- *      * [14:13] - Reserved, Res0;
- *      * [12]    - IXE, Inexact exception trap;
- *      * [11]    - UFE, Underflow exception trap;
- *      * [10]    - OFE, Overflow exception trap;
- *      * [9]     - DZE, Division by Zero exception;
- *      * [8]     - IOE, Invalid Operation exception;
- *      * [7:0]   - Reserved, Res0.
- *
- *  * FPSR - 32Bit Floating-Point Status Register:
- *      * [31]    - N, Negative condition flag for AArch32 (AArch64 sets PSTATE.N);
- *      * [30]    - Z, Zero condition flag for AArch32 (AArch64 sets PSTATE.Z);
- *      * [29]    - C, Carry conditon flag for AArch32 (AArch64 sets PSTATE.C);
- *      * [28]    - V, Overflow conditon flag for AArch32 (AArch64 sets PSTATE.V);
- *      * [27]    - QC, Cumulative saturation bit, Advanced SIMD only;
- *      * [26:8]  - Reserved, Res0;
- *      * [7]     - IDC, Input Denormal cumulative exception;
- *      * [6:5]   - Reserved, Res0;
- *      * [4]     - IXC, Inexact cumulative exception;
- *      * [3]     - UFC, Underflow cumulative exception;
- *      * [2]     - OFC, Overflow cumulative exception;
- *      * [1]     - DZC, Division by Zero cumulative exception;
- *      * [0]     - IOC, Invalid Operation cumulative exception.
- */
-
-#ifndef _BITS_FENV_ARM64_H_
-#define _BITS_FENV_ARM64_H_
-
-#include <sys/types.h>
-
-__BEGIN_DECLS
-
-typedef struct {
-  __uint32_t __control;     /* FPCR, Floating-point Control Register */
-  __uint32_t __status;      /* FPSR, Floating-point Status Register */
-} fenv_t;
-
-typedef __uint32_t fexcept_t;
-
-/* Exception flags. */
-#define FE_INVALID    0x01
-#define FE_DIVBYZERO  0x02
-#define FE_OVERFLOW   0x04
-#define FE_UNDERFLOW  0x08
-#define FE_INEXACT    0x10
-#define FE_DENORMAL   0x80
-#define FE_ALL_EXCEPT (FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \
-                       FE_OVERFLOW | FE_UNDERFLOW | FE_DENORMAL)
-
-/* Rounding modes. */
-#define FE_TONEAREST  0x0
-#define FE_UPWARD     0x1
-#define FE_DOWNWARD   0x2
-#define FE_TOWARDZERO 0x3
-
-__END_DECLS
-
-#endif
diff --git a/libc/include/fenv.h b/libc/include/fenv.h
index 4276e87..2b607f5 100644
--- a/libc/include/fenv.h
+++ b/libc/include/fenv.h
@@ -32,9 +32,7 @@
 
 #include <sys/cdefs.h>
 
-#if defined(__aarch64__)
-#include <bits/fenv_arm64.h>
-#elif defined(__arm__)
+#if defined(__aarch64__) || defined(__arm__)
 #include <bits/fenv_arm.h>
 #elif defined(__i386__)
 #include <bits/fenv_x86.h>
diff --git a/libc/include/string.h b/libc/include/string.h
index d409ba8..226566c 100644
--- a/libc/include/string.h
+++ b/libc/include/string.h
@@ -63,11 +63,8 @@
 char* __strchr_chk(const char* __s, int __ch, size_t __n) __INTRODUCED_IN(18);
 #if defined(__USE_GNU)
 #if defined(__cplusplus)
-/* The versioner doesn't handle C++ blocks yet, so manually guarded. */
-#if __ANDROID_API__ >= 24
 extern "C++" char* strchrnul(char* __s, int __ch) __RENAME(strchrnul) __attribute_pure__ __INTRODUCED_IN(24);
 extern "C++" const char* strchrnul(const char* __s, int __ch) __RENAME(strchrnul) __attribute_pure__ __INTRODUCED_IN(24);
-#endif  /* __ANDROID_API__ >= 24 */
 #else
 char* strchrnul(const char* __s, int __ch) __attribute_pure__ __INTRODUCED_IN(24);
 #endif
@@ -136,11 +133,8 @@
  * It doesn't modify its argument, and in C++ it's const-correct.
  */
 #if defined(__cplusplus)
-/* The versioner doesn't handle C++ blocks yet, so manually guarded. */
-#if __ANDROID_API__ >= 23
 extern "C++" char* basename(char* __path) __RENAME(__gnu_basename) __INTRODUCED_IN(23);
 extern "C++" const char* basename(const char* __path) __RENAME(__gnu_basename) __INTRODUCED_IN(23);
-#endif  /* __ANDROID_API__ >= 23 */
 #else
 char* basename(const char* __path) __RENAME(__gnu_basename) __INTRODUCED_IN(23);
 #endif
diff --git a/libm/arm/fenv.c b/libm/arm/fenv.c
index 2124730..c988e4f 100644
--- a/libm/arm/fenv.c
+++ b/libm/arm/fenv.c
@@ -28,9 +28,6 @@
 
 #include <fenv.h>
 
-#define FPSCR_ENABLE_SHIFT 8
-#define FPSCR_ENABLE_MASK  (FE_ALL_EXCEPT << FPSCR_ENABLE_SHIFT)
-
 #define FPSCR_RMODE_SHIFT 22
 
 const fenv_t __fe_dfl_env = 0;
@@ -103,7 +100,7 @@
   fenv_t __env;
   fegetenv(&__env);
   *__envp = __env;
-  __env &= ~(FE_ALL_EXCEPT | FPSCR_ENABLE_MASK);
+  __env &= ~FE_ALL_EXCEPT;
   fesetenv(&__env);
   return 0;
 }
@@ -116,24 +113,14 @@
   return 0;
 }
 
-int feenableexcept(int __mask) {
-  fenv_t __old_fpscr, __new_fpscr;
-  fegetenv(&__old_fpscr);
-  __new_fpscr = __old_fpscr | (__mask & FE_ALL_EXCEPT) << FPSCR_ENABLE_SHIFT;
-  fesetenv(&__new_fpscr);
-  return ((__old_fpscr >> FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
+int feenableexcept(int __mask __unused) {
+  return -1;
 }
 
-int fedisableexcept(int __mask) {
-  fenv_t __old_fpscr, __new_fpscr;
-  fegetenv(&__old_fpscr);
-  __new_fpscr = __old_fpscr & ~((__mask & FE_ALL_EXCEPT) << FPSCR_ENABLE_SHIFT);
-  fesetenv(&__new_fpscr);
-  return ((__old_fpscr >> FPSCR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
+int fedisableexcept(int __mask __unused) {
+  return 0;
 }
 
 int fegetexcept(void) {
-  fenv_t __fpscr;
-  fegetenv(&__fpscr);
-  return ((__fpscr & FPSCR_ENABLE_MASK) >> FPSCR_ENABLE_SHIFT);
+  return 0;
 }
diff --git a/libm/arm64/fenv.c b/libm/arm64/fenv.c
index 19a2393..a99288b 100644
--- a/libm/arm64/fenv.c
+++ b/libm/arm64/fenv.c
@@ -29,9 +29,6 @@
 #include <stdint.h>
 #include <fenv.h>
 
-#define FPCR_EXCEPT_SHIFT 8
-#define FPCR_EXCEPT_MASK  (FE_ALL_EXCEPT << FPCR_EXCEPT_SHIFT)
-
 #define FPCR_RMODE_SHIFT 22
 
 const fenv_t __fe_dfl_env = { 0 /* control */, 0 /* status */};
@@ -137,22 +134,13 @@
 }
 
 int feholdexcept(fenv_t* envp) {
-  fenv_t env;
   fpu_status_t fpsr;
-  fpu_control_t fpcr, new_fpcr;
-
   __get_fpsr(fpsr);
+  fpu_control_t fpcr;
   __get_fpcr(fpcr);
-  env.__status = fpsr;
-  env.__control = fpcr;
+  fenv_t env = { .__status = fpsr, .__control = fpcr };
   *envp = env;
 
-  // Set exceptions to untrapped.
-  new_fpcr = fpcr & ~(FE_ALL_EXCEPT << FPCR_EXCEPT_SHIFT);
-  if (new_fpcr != fpcr) {
-    __set_fpcr(new_fpcr);
-  }
-
   // Clear all exceptions.
   fpsr &= ~FE_ALL_EXCEPT;
   __set_fpsr(fpsr);
@@ -176,31 +164,14 @@
   return 0;
 }
 
-int feenableexcept(int mask) {
-  fpu_control_t old_fpcr, new_fpcr;
-
-  __get_fpcr(old_fpcr);
-  new_fpcr = old_fpcr | ((mask & FE_ALL_EXCEPT) << FPCR_EXCEPT_SHIFT);
-  if (new_fpcr != old_fpcr) {
-    __set_fpcr(new_fpcr);
-  }
-  return ((old_fpcr >> FPCR_EXCEPT_SHIFT) & FE_ALL_EXCEPT);
+int feenableexcept(int mask __unused) {
+  return -1;
 }
 
-int fedisableexcept(int mask) {
-  fpu_control_t old_fpcr, new_fpcr;
-
-  __get_fpcr(old_fpcr);
-  new_fpcr = old_fpcr & ~((mask & FE_ALL_EXCEPT) << FPCR_EXCEPT_SHIFT);
-  if (new_fpcr != old_fpcr) {
-    __set_fpcr(new_fpcr);
-  }
-  return ((old_fpcr >> FPCR_EXCEPT_SHIFT) & FE_ALL_EXCEPT);
+int fedisableexcept(int mask __unused) {
+  return 0;
 }
 
 int fegetexcept(void) {
-  fpu_control_t fpcr;
-
-  __get_fpcr(fpcr);
-  return ((fpcr & FPCR_EXCEPT_MASK) >> FPCR_EXCEPT_SHIFT);
+  return 0;
 }
diff --git a/tests/dlfcn_test.cpp b/tests/dlfcn_test.cpp
index 794c0f2..6bd6e0c 100644
--- a/tests/dlfcn_test.cpp
+++ b/tests/dlfcn_test.cpp
@@ -24,6 +24,7 @@
 #if __has_include(<sys/auxv.h>)
 #include <sys/auxv.h>
 #endif
+#include <sys/user.h>
 
 #include <string>
 #include <thread>
@@ -824,6 +825,21 @@
 #endif
 }
 
+TEST(dlfcn, dlclose_unload) {
+  void* handle = dlopen("libtest_simple.so", RTLD_NOW);
+  ASSERT_TRUE(handle != nullptr) << dlerror();
+  uint32_t* taxicab_number = static_cast<uint32_t*>(dlsym(handle, "dlopen_testlib_taxicab_number"));
+  ASSERT_TRUE(taxicab_number != nullptr) << dlerror();
+  EXPECT_EQ(1729U, *taxicab_number);
+  dlclose(handle);
+  // Making sure that the library has been unmapped as part of library unload
+  // process. Note that mprotect somewhat counter-intuitively returns ENOMEM in
+  // this case.
+  uintptr_t page_start = reinterpret_cast<uintptr_t>(taxicab_number) & ~(PAGE_SIZE - 1);
+  ASSERT_TRUE(mprotect(reinterpret_cast<void*>(page_start), PAGE_SIZE, PROT_NONE) != 0);
+  ASSERT_EQ(ENOMEM, errno) << strerror(errno);
+}
+
 static void ConcurrentDlErrorFn(std::string& error) {
   ASSERT_TRUE(dlerror() == nullptr);
 
diff --git a/tests/fenv_test.cpp b/tests/fenv_test.cpp
index c914692..9fc7d96 100644
--- a/tests/fenv_test.cpp
+++ b/tests/fenv_test.cpp
@@ -182,12 +182,20 @@
 
 TEST(fenv, feenableexcept_fegetexcept) {
 #if defined(__aarch64__) || defined(__arm__)
-  // Unsupported.
-  // arm:
-  // http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.100403_0200_00_en/lau1442504290459.html
-  // aarch64:
-  // http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.ddi0488h/way1382990760439.html
-  GTEST_LOG_(INFO) << "arm and arm64 don't support feenableexcept";
+  // ARM doesn't support this. They used to if you go back far enough, but it was removed in
+  // the Cortex-A8 between r3p1 and r3p2.
+  ASSERT_EQ(-1, feenableexcept(FE_INVALID));
+  ASSERT_EQ(0, fegetexcept());
+  ASSERT_EQ(-1, feenableexcept(FE_DIVBYZERO));
+  ASSERT_EQ(0, fegetexcept());
+  ASSERT_EQ(-1, feenableexcept(FE_OVERFLOW));
+  ASSERT_EQ(0, fegetexcept());
+  ASSERT_EQ(-1, feenableexcept(FE_UNDERFLOW));
+  ASSERT_EQ(0, fegetexcept());
+  ASSERT_EQ(-1, feenableexcept(FE_INEXACT));
+  ASSERT_EQ(0, fegetexcept());
+  ASSERT_EQ(-1, feenableexcept(FE_DENORMAL));
+  ASSERT_EQ(0, fegetexcept());
 #else
   // We can't recover from SIGFPE, so sacrifice a child...
   pid_t pid = fork();
diff --git a/tools/versioner/src/DeclarationDatabase.cpp b/tools/versioner/src/DeclarationDatabase.cpp
index 4443834..19c2f0d 100644
--- a/tools/versioner/src/DeclarationDatabase.cpp
+++ b/tools/versioner/src/DeclarationDatabase.cpp
@@ -90,7 +90,7 @@
     return "<unnamed>";
   }
 
-  bool VisitDecl(Decl* decl) {
+  bool VisitDeclaratorDecl(DeclaratorDecl* decl, SourceRange range) {
     // Skip declarations inside of functions (function arguments, variable declarations inside of
     // inline functions, etc).
     if (decl->getParentFunctionOrMethod()) {
@@ -143,21 +143,6 @@
       return true;
     }
 
-    auto start_loc = src_manager.getPresumedLoc(decl->getLocStart());
-    auto end_loc = src_manager.getPresumedLoc(decl->getLocEnd());
-
-    Location location = {
-      .filename = start_loc.getFilename(),
-      .start = {
-        .line = start_loc.getLine(),
-        .column = start_loc.getColumn(),
-      },
-      .end = {
-        .line = end_loc.getLine(),
-        .column = end_loc.getColumn(),
-      }
-    };
-
     DeclarationAvailability availability;
 
     // Find and parse __ANDROID_AVAILABILITY_DUMP__ annotations.
@@ -215,6 +200,24 @@
       std::tie(symbol_it, dummy) = database.symbols.insert({ declaration_name, symbol });
     }
 
+    auto expansion_range = src_manager.getExpansionRange(range);
+    auto filename = src_manager.getFilename(expansion_range.getBegin());
+    if (filename != src_manager.getFilename(expansion_range.getEnd())) {
+      errx(1, "expansion range filenames don't match");
+    }
+
+    Location location = {
+      .filename = filename,
+      .start = {
+        .line = src_manager.getExpansionLineNumber(expansion_range.getBegin()),
+        .column = src_manager.getExpansionColumnNumber(expansion_range.getBegin()),
+      },
+      .end = {
+        .line = src_manager.getExpansionLineNumber(expansion_range.getEnd()),
+        .column = src_manager.getExpansionColumnNumber(expansion_range.getEnd()),
+      }
+    };
+
     // Find or insert an entry for the declaration.
     if (auto declaration_it = symbol_it->second.declarations.find(location);
         declaration_it != symbol_it->second.declarations.end()) {
@@ -238,6 +241,38 @@
 
     return true;
   }
+
+  bool VisitDeclaratorDecl(DeclaratorDecl* decl) {
+    return VisitDeclaratorDecl(decl, decl->getSourceRange());
+  }
+
+  bool TraverseLinkageSpecDecl(LinkageSpecDecl* decl) {
+    // Make sure that we correctly calculate the SourceRange of a declaration that has a non-braced
+    // extern "C"/"C++".
+    if (!decl->hasBraces()) {
+      DeclaratorDecl* child = nullptr;
+      for (auto child_decl : decl->decls()) {
+        if (child != nullptr) {
+          errx(1, "LinkageSpecDecl has multiple children");
+        }
+
+        if (DeclaratorDecl* declarator_decl = dyn_cast<DeclaratorDecl>(child_decl)) {
+          child = declarator_decl;
+        } else {
+          errx(1, "child of LinkageSpecDecl is not a DeclaratorDecl");
+        }
+      }
+
+      return VisitDeclaratorDecl(child, decl->getSourceRange());
+    }
+
+    for (auto child : decl->decls()) {
+      if (!TraverseDecl(child)) {
+        return false;
+      }
+    }
+    return true;
+  }
 };
 
 bool DeclarationAvailability::merge(const DeclarationAvailability& other) {
diff --git a/tools/versioner/tests/preprocessor_extern_cpp/expected/foo.h b/tools/versioner/tests/preprocessor_extern_cpp/expected/foo.h
new file mode 100644
index 0000000..9b2d122
--- /dev/null
+++ b/tools/versioner/tests/preprocessor_extern_cpp/expected/foo.h
@@ -0,0 +1,27 @@
+#define __RENAME(x) asm(#x)
+
+#if defined(__cplusplus)
+
+#if __ANDROID_API__ >= 24
+extern "C++" const char* strchrnul(const char*, int) __RENAME(strchrnul) __INTRODUCED_IN(24);
+#endif /* __ANDROID_API__ >= 24 */
+
+#endif
+
+#if defined(__cplusplus)
+extern "C" int foo();
+#endif
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+
+#if __ANDROID_API__ >= 24
+char* strchrnul(char*, int) __INTRODUCED_IN(24);
+#endif /* __ANDROID_API__ >= 24 */
+
+
+#if defined(__cplusplus)
+}
+#endif
diff --git a/tools/versioner/tests/preprocessor_extern_cpp/headers/foo.h b/tools/versioner/tests/preprocessor_extern_cpp/headers/foo.h
new file mode 100644
index 0000000..de26d21
--- /dev/null
+++ b/tools/versioner/tests/preprocessor_extern_cpp/headers/foo.h
@@ -0,0 +1,19 @@
+#define __RENAME(x) asm(#x)
+
+#if defined(__cplusplus)
+extern "C++" const char* strchrnul(const char*, int) __RENAME(strchrnul) __INTRODUCED_IN(24);
+#endif
+
+#if defined(__cplusplus)
+extern "C" int foo();
+#endif
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+char* strchrnul(char*, int) __INTRODUCED_IN(24);
+
+#if defined(__cplusplus)
+}
+#endif
diff --git a/tools/versioner/tests/preprocessor_extern_cpp/platforms/android-9/arch-arm/symbols/libc.so.functions.txt b/tools/versioner/tests/preprocessor_extern_cpp/platforms/android-9/arch-arm/symbols/libc.so.functions.txt
new file mode 100644
index 0000000..257cc56
--- /dev/null
+++ b/tools/versioner/tests/preprocessor_extern_cpp/platforms/android-9/arch-arm/symbols/libc.so.functions.txt
@@ -0,0 +1 @@
+foo
diff --git a/tools/versioner/tests/preprocessor_extern_cpp/run.sh b/tools/versioner/tests/preprocessor_extern_cpp/run.sh
new file mode 100644
index 0000000..50d9b5c
--- /dev/null
+++ b/tools/versioner/tests/preprocessor_extern_cpp/run.sh
@@ -0,0 +1,29 @@
+set -e
+
+function run_test {
+  SRC=$1
+  DST=$2
+  rm -rf $2
+  versioner -a 9 -a 12 -a 13 -a 14 -a 15 $1 -i -o $2
+  diff -q -w -B $2 expected
+}
+
+run_test headers out
+run_test headers/ out
+run_test headers out/
+run_test headers/ out/
+
+run_test `pwd`/headers out
+run_test `pwd`/headers/ out
+run_test `pwd`/headers out/
+run_test `pwd`/headers/ out/
+
+run_test headers `pwd`/out
+run_test headers/ `pwd`/out
+run_test headers `pwd`/out/
+run_test headers/ `pwd`/out/
+
+run_test `pwd`/headers `pwd`/out
+run_test `pwd`/headers/ `pwd`/out
+run_test `pwd`/headers `pwd`/out/
+run_test `pwd`/headers/ `pwd`/out/