Update to v5.9 kernel headers.

Kernel headers coming from:

Git: https://android.googlesource.com/kernel/common/
Branch: android-mainline
Tag: android-mainline-5.9

Test: Boots cuttlefish 64bit, passes 32 bit and 64 bit bionic unit tests.
Change-Id: Ib5503355b238ea75595538e63eb000c867d06ef7
diff --git a/libc/kernel/uapi/linux/fpga-dfl.h b/libc/kernel/uapi/linux/fpga-dfl.h
index 8712e4c..54b93d0 100644
--- a/libc/kernel/uapi/linux/fpga-dfl.h
+++ b/libc/kernel/uapi/linux/fpga-dfl.h
@@ -63,6 +63,15 @@
   __u64 iova;
 };
 #define DFL_FPGA_PORT_DMA_UNMAP _IO(DFL_FPGA_MAGIC, DFL_PORT_BASE + 4)
+struct dfl_fpga_irq_set {
+  __u32 start;
+  __u32 count;
+  __s32 evtfds[];
+};
+#define DFL_FPGA_PORT_ERR_GET_IRQ_NUM _IOR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 5, __u32)
+#define DFL_FPGA_PORT_ERR_SET_IRQ _IOW(DFL_FPGA_MAGIC, DFL_PORT_BASE + 6, struct dfl_fpga_irq_set)
+#define DFL_FPGA_PORT_UINT_GET_IRQ_NUM _IOR(DFL_FPGA_MAGIC, DFL_PORT_BASE + 7, __u32)
+#define DFL_FPGA_PORT_UINT_SET_IRQ _IOW(DFL_FPGA_MAGIC, DFL_PORT_BASE + 8, struct dfl_fpga_irq_set)
 struct dfl_fpga_fme_port_pr {
   __u32 argsz;
   __u32 flags;
@@ -73,4 +82,6 @@
 #define DFL_FPGA_FME_PORT_PR _IO(DFL_FPGA_MAGIC, DFL_FME_BASE + 0)
 #define DFL_FPGA_FME_PORT_RELEASE _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 1, int)
 #define DFL_FPGA_FME_PORT_ASSIGN _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 2, int)
+#define DFL_FPGA_FME_ERR_GET_IRQ_NUM _IOR(DFL_FPGA_MAGIC, DFL_FME_BASE + 3, __u32)
+#define DFL_FPGA_FME_ERR_SET_IRQ _IOW(DFL_FPGA_MAGIC, DFL_FME_BASE + 4, struct dfl_fpga_irq_set)
 #endif