Update to kernel headers to v5.1.3.
Test: Builds and boots taimen.
Test: Ran bionic unit tests.
Change-Id: Ieaca8709d568f075df8cac60c9da2c0ed1916963
diff --git a/libc/kernel/uapi/linux/mdio.h b/libc/kernel/uapi/linux/mdio.h
index 2617f2e..14f1e77 100644
--- a/libc/kernel/uapi/linux/mdio.h
+++ b/libc/kernel/uapi/linux/mdio.h
@@ -47,6 +47,7 @@
#define MDIO_AN_ADVERTISE 16
#define MDIO_AN_LPA 19
#define MDIO_PCS_EEE_ABLE 20
+#define MDIO_PMA_NG_EXTABLE 21
#define MDIO_PCS_EEE_WK_ERR 22
#define MDIO_PHYXS_LNSTAT 24
#define MDIO_AN_EEE_ADV 60
@@ -82,6 +83,8 @@
#define MDIO_PCS_CTRL1_CLKSTOP_EN 0x400
#define MDIO_CTRL1_SPEED10G (MDIO_CTRL1_SPEEDSELEXT | 0x00)
#define MDIO_CTRL1_SPEED10P2B (MDIO_CTRL1_SPEEDSELEXT | 0x04)
+#define MDIO_CTRL1_SPEED2_5G (MDIO_CTRL1_SPEEDSELEXT | 0x18)
+#define MDIO_CTRL1_SPEED5G (MDIO_CTRL1_SPEEDSELEXT | 0x1c)
#define MDIO_STAT1_LPOWERABLE 0x0002
#define MDIO_STAT1_LSTATUS BMSR_LSTATUS
#define MDIO_STAT1_FAULT 0x0080
@@ -99,6 +102,7 @@
#define MDIO_PMA_SPEED_10 0x0040
#define MDIO_PCS_SPEED_10P2B 0x0002
#define MDIO_DEVS_PRESENT(devad) (1 << (devad))
+#define MDIO_DEVS_C22PRESENT MDIO_DEVS_PRESENT(0)
#define MDIO_DEVS_PMAPMD MDIO_DEVS_PRESENT(MDIO_MMD_PMAPMD)
#define MDIO_DEVS_WIS MDIO_DEVS_PRESENT(MDIO_MMD_WIS)
#define MDIO_DEVS_PCS MDIO_DEVS_PRESENT(MDIO_MMD_PCS)
@@ -107,6 +111,8 @@
#define MDIO_DEVS_TC MDIO_DEVS_PRESENT(MDIO_MMD_TC)
#define MDIO_DEVS_AN MDIO_DEVS_PRESENT(MDIO_MMD_AN)
#define MDIO_DEVS_C22EXT MDIO_DEVS_PRESENT(MDIO_MMD_C22EXT)
+#define MDIO_DEVS_VEND1 MDIO_DEVS_PRESENT(MDIO_MMD_VEND1)
+#define MDIO_DEVS_VEND2 MDIO_DEVS_PRESENT(MDIO_MMD_VEND2)
#define MDIO_PMA_CTRL2_TYPE 0x000f
#define MDIO_PMA_CTRL2_10GBCX4 0x0000
#define MDIO_PMA_CTRL2_10GBEW 0x0001
@@ -124,6 +130,8 @@
#define MDIO_PMA_CTRL2_1000BKX 0x000d
#define MDIO_PMA_CTRL2_100BTX 0x000e
#define MDIO_PMA_CTRL2_10BT 0x000f
+#define MDIO_PMA_CTRL2_2_5GBT 0x0030
+#define MDIO_PMA_CTRL2_5GBT 0x0031
#define MDIO_PCS_CTRL2_TYPE 0x0003
#define MDIO_PCS_CTRL2_10GBR 0x0000
#define MDIO_PCS_CTRL2_10GBX 0x0001
@@ -169,6 +177,7 @@
#define MDIO_PMA_EXTABLE_1000BKX 0x0040
#define MDIO_PMA_EXTABLE_100BTX 0x0080
#define MDIO_PMA_EXTABLE_10BT 0x0100
+#define MDIO_PMA_EXTABLE_NBT 0x4000
#define MDIO_PHYXS_LNSTAT_SYNC0 0x0001
#define MDIO_PHYXS_LNSTAT_SYNC1 0x0002
#define MDIO_PHYXS_LNSTAT_SYNC2 0x0004
@@ -188,7 +197,11 @@
#define MDIO_PCS_10GBRT_STAT1_BLKLK 0x0001
#define MDIO_PCS_10GBRT_STAT2_ERR 0x00ff
#define MDIO_PCS_10GBRT_STAT2_BER 0x3f00
+#define MDIO_AN_10GBT_CTRL_ADV2_5G 0x0080
+#define MDIO_AN_10GBT_CTRL_ADV5G 0x0100
#define MDIO_AN_10GBT_CTRL_ADV10G 0x1000
+#define MDIO_AN_10GBT_STAT_LP2_5G 0x0020
+#define MDIO_AN_10GBT_STAT_LP5G 0x0040
#define MDIO_AN_10GBT_STAT_LPTRR 0x0200
#define MDIO_AN_10GBT_STAT_LPLTABLE 0x0400
#define MDIO_AN_10GBT_STAT_LP10G 0x0800
@@ -204,6 +217,8 @@
#define MDIO_EEE_1000KX 0x0010
#define MDIO_EEE_10GKX4 0x0020
#define MDIO_EEE_10GKR 0x0040
+#define MDIO_PMA_NG_EXTABLE_2_5GBT 0x0001
+#define MDIO_PMA_NG_EXTABLE_5GBT 0x0002
#define MDIO_PMA_LASI_RX_PHYXSLFLT 0x0001
#define MDIO_PMA_LASI_RX_PCSLFLT 0x0008
#define MDIO_PMA_LASI_RX_PMALFLT 0x0010