diff --git a/libc/include/android/legacy_fenv_inlines_arm.h b/libc/include/android/legacy_fenv_inlines_arm.h
index 6f2c959..5ec5582 100644
--- a/libc/include/android/legacy_fenv_inlines_arm.h
+++ b/libc/include/android/legacy_fenv_inlines_arm.h
@@ -1,141 +1,43 @@
-/*-
- * Copyright (c) 2004 David Schultz <das@FreeBSD.ORG>
+/*
+ * Copyright (C) 2018 The Android Open Source Project
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
- * 1. Redistributions of source code must retain the above copyright
+ *  * Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
  *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
- *
- * $FreeBSD: src/lib/msun/arm/fenv.c,v 1.1 2004/06/06 10:03:59 das Exp $
  */
 
-#ifndef ANDROID_LEGACY_FENV_INLINES_ARM_H
-#define ANDROID_LEGACY_FENV_INLINES_ARM_H
+#pragma once
+
+/**
+ * @file legacy_fenv_inlines_arm.h
+ * @brief Inline ARM-specific definitions of fenv for old API levels.
+ */
 
 #include <sys/cdefs.h>
 
 #if __ANDROID_API__ < __ANDROID_API_L__ && defined(__arm__)
 
-#include <fenv.h>
+#define __BIONIC_FENV_INLINE static __inline
+#include <bits/fenv_inlines_arm.h>
 
-__BEGIN_DECLS
-
-#define FPSCR_RMODE_SHIFT 22
-
-static __inline int fegetenv(fenv_t* __envp) {
-  fenv_t _fpscr;
-  __asm__ __volatile__("vmrs %0,fpscr" : "=r" (_fpscr));
-  *__envp = _fpscr;
-  return 0;
-}
-
-static __inline int fesetenv(const fenv_t* __envp) {
-  fenv_t _fpscr = *__envp;
-  __asm__ __volatile__("vmsr fpscr,%0" : :"ri" (_fpscr));
-  return 0;
-}
-
-static __inline int feclearexcept(int __excepts) {
-  fexcept_t __fpscr;
-  fegetenv(&__fpscr);
-  __fpscr &= ~__excepts;
-  fesetenv(&__fpscr);
-  return 0;
-}
-
-static __inline int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
-  fexcept_t __fpscr;
-  fegetenv(&__fpscr);
-  *__flagp = __fpscr & __excepts;
-  return 0;
-}
-
-static __inline int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
-  fexcept_t __fpscr;
-  fegetenv(&__fpscr);
-  __fpscr &= ~__excepts;
-  __fpscr |= *__flagp & __excepts;
-  fesetenv(&__fpscr);
-  return 0;
-}
-
-static __inline int feraiseexcept(int __excepts) {
-  fexcept_t __ex = __excepts;
-  fesetexceptflag(&__ex, __excepts);
-  return 0;
-}
-
-static __inline int fetestexcept(int __excepts) {
-  fexcept_t __fpscr;
-  fegetenv(&__fpscr);
-  return (__fpscr & __excepts);
-}
-
-static __inline int fegetround(void) {
-  fenv_t _fpscr;
-  fegetenv(&_fpscr);
-  return ((_fpscr >> FPSCR_RMODE_SHIFT) & 0x3);
-}
-
-static __inline int fesetround(int __round) {
-  fenv_t _fpscr;
-  fegetenv(&_fpscr);
-  _fpscr &= ~(0x3 << FPSCR_RMODE_SHIFT);
-  _fpscr |= (__round << FPSCR_RMODE_SHIFT);
-  fesetenv(&_fpscr);
-  return 0;
-}
-
-static __inline int feholdexcept(fenv_t* __envp) {
-  fenv_t __env;
-  fegetenv(&__env);
-  *__envp = __env;
-  __env &= ~FE_ALL_EXCEPT;
-  fesetenv(&__env);
-  return 0;
-}
-
-static __inline int feupdateenv(const fenv_t* __envp) {
-  fexcept_t __fpscr;
-  fegetenv(&__fpscr);
-  fesetenv(__envp);
-  feraiseexcept(__fpscr & FE_ALL_EXCEPT);
-  return 0;
-}
-
-static __inline int feenableexcept(int __mask __unused) {
-  return -1;
-}
-
-static __inline int fedisableexcept(int __mask __unused) {
-  return 0;
-}
-
-static __inline int fegetexcept(void) {
-  return 0;
-}
-
-#undef FPSCR_RMODE_SHIFT
-
-__END_DECLS
-
-#endif /* __ANDROID_API__ < __ANDROID_API_L__ && defined(__arm__) */
-
-#endif /* ANDROID_LEGACY_FENV_INLINES_ARM_H */
+#endif
diff --git a/libc/include/android/legacy_fenv_inlines_mips.h b/libc/include/android/legacy_fenv_inlines_mips.h
index 43ad360..ccc824c 100644
--- a/libc/include/android/legacy_fenv_inlines_mips.h
+++ b/libc/include/android/legacy_fenv_inlines_mips.h
@@ -1,170 +1,43 @@
-/*-
- * Copyright (c) 2004 David Schultz <das@FreeBSD.ORG>
+/*
+ * Copyright (C) 2018 The Android Open Source Project
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
- * 1. Redistributions of source code must retain the above copyright
+ *  * Redistributions of source code must retain the above copyright
  *    notice, this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright
- *    notice, this list of conditions and the following disclaimer in the
- *    documentation and/or other materials provided with the distribution.
+ *  * Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in
+ *    the documentation and/or other materials provided with the
+ *    distribution.
  *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
- * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
- * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
- * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
- * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+ * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+ * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
+ * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
+ * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
+ * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
+ * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  * SUCH DAMAGE.
- *
- * $FreeBSD: src/lib/msun/mips/fenv.c,v 1.1 2008/04/26 12:20:29 imp Exp $
  */
 
-#ifndef ANDROID_LEGACY_FENV_INLINES_MIPS_H
-#define ANDROID_LEGACY_FENV_INLINES_MIPS_H
+#pragma once
+
+/**
+ * @file legacy_fenv_inlines_mips.h
+ * @brief Inline MIPS-specific definitions of fenv for old API levels.
+ */
 
 #include <sys/cdefs.h>
 
 #if __ANDROID_API__ < __ANDROID_API_L__ && (defined(__mips__) && !defined(__LP64__))
 
-#include <fenv.h>
+#define __BIONIC_FENV_INLINE static __inline
+#include <bits/fenv_inlines_mips.h>
 
-__BEGIN_DECLS
-
-#define FCSR_CAUSE_SHIFT 10
-#define FCSR_ENABLE_SHIFT 5
-#define FCSR_ENABLE_MASK (FE_ALL_EXCEPT << FCSR_ENABLE_SHIFT)
-
-#define FCSR_RMASK       0x3
-
-static __inline int fegetenv(fenv_t* __envp) {
-  fenv_t _fcsr = 0;
-#ifdef  __mips_hard_float
-  __asm__ __volatile__("cfc1 %0,$31" : "=r" (_fcsr));
 #endif
-  *__envp = _fcsr;
-  return 0;
-}
-
-static __inline int fesetenv(const fenv_t* __envp) {
-  fenv_t _fcsr = *__envp;
-#ifdef  __mips_hard_float
-  __asm__ __volatile__("ctc1 %0,$31" : : "r" (_fcsr));
-#endif
-  return 0;
-}
-
-static __inline int feclearexcept(int __excepts) {
-  fexcept_t __fcsr;
-  fegetenv(&__fcsr);
-  __excepts &= FE_ALL_EXCEPT;
-  __fcsr &= ~(__excepts | (__excepts << FCSR_CAUSE_SHIFT));
-  fesetenv(&__fcsr);
-  return 0;
-}
-
-static __inline int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
-  fexcept_t __fcsr;
-  fegetenv(&__fcsr);
-  *__flagp = __fcsr & __excepts & FE_ALL_EXCEPT;
-  return 0;
-}
-
-static __inline int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
-  fexcept_t __fcsr;
-  fegetenv(&__fcsr);
-  /* Ensure that flags are all legal */
-  __excepts &= FE_ALL_EXCEPT;
-  __fcsr &= ~__excepts;
-  __fcsr |= *__flagp & __excepts;
-  fesetenv(&__fcsr);
-  return 0;
-}
-
-static __inline int feraiseexcept(int __excepts) {
-  fexcept_t __fcsr;
-  fegetenv(&__fcsr);
-  /* Ensure that flags are all legal */
-  __excepts &= FE_ALL_EXCEPT;
-  /* Cause bit needs to be set as well for generating the exception*/
-  __fcsr |= __excepts | (__excepts << FCSR_CAUSE_SHIFT);
-  fesetenv(&__fcsr);
-  return 0;
-}
-
-static __inline int fetestexcept(int __excepts) {
-  fexcept_t __FCSR;
-  fegetenv(&__FCSR);
-  return (__FCSR & __excepts & FE_ALL_EXCEPT);
-}
-
-static __inline int fegetround(void) {
-  fenv_t _fcsr;
-  fegetenv(&_fcsr);
-  return (_fcsr & FCSR_RMASK);
-}
-
-static __inline int fesetround(int __round) {
-  fenv_t _fcsr;
-  fegetenv(&_fcsr);
-  _fcsr &= ~FCSR_RMASK;
-  _fcsr |= (__round & FCSR_RMASK);
-  fesetenv(&_fcsr);
-  return 0;
-}
-
-static __inline int feholdexcept(fenv_t* __envp) {
-  fenv_t __env;
-  fegetenv(&__env);
-  *__envp = __env;
-  __env &= ~(FE_ALL_EXCEPT | FCSR_ENABLE_MASK);
-  fesetenv(&__env);
-  return 0;
-}
-
-static __inline int feupdateenv(const fenv_t* __envp) {
-  fexcept_t __fcsr;
-  fegetenv(&__fcsr);
-  fesetenv(__envp);
-  feraiseexcept(__fcsr & FE_ALL_EXCEPT);
-  return 0;
-}
-
-static __inline int feenableexcept(int __mask) {
-  fenv_t __old_fcsr, __new_fcsr;
-  fegetenv(&__old_fcsr);
-  __new_fcsr = __old_fcsr | (__mask & FE_ALL_EXCEPT) << FCSR_ENABLE_SHIFT;
-  fesetenv(&__new_fcsr);
-  return ((__old_fcsr >> FCSR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
-}
-
-static __inline int fedisableexcept(int __mask) {
-  fenv_t __old_fcsr, __new_fcsr;
-  fegetenv(&__old_fcsr);
-  __new_fcsr = __old_fcsr & ~((__mask & FE_ALL_EXCEPT) << FCSR_ENABLE_SHIFT);
-  fesetenv(&__new_fcsr);
-  return ((__old_fcsr >> FCSR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
-}
-
-static __inline int fegetexcept(void) {
-  fenv_t __fcsr;
-  fegetenv(&__fcsr);
-  return ((__fcsr & FCSR_ENABLE_MASK) >> FCSR_ENABLE_SHIFT);
-}
-
-#undef FCSR_CAUSE_SHIFT
-#undef FCSR_ENABLE_SHIFT
-#undef FCSR_ENABLE_MASK
-#undef FCSR_RMASK
-
-__END_DECLS
-
-#endif /* __ANDROID_API__ < __ANDROID_API_L__ && (defined(__mips__) && !defined(__LP64__)) */
-
-#endif /* ANDROID_LEGACY_FENV_INLINES_MIPS_H */
diff --git a/libc/include/bits/fenv_arm.h b/libc/include/bits/fenv_arm.h
index 042fec3..0cd4844 100644
--- a/libc/include/bits/fenv_arm.h
+++ b/libc/include/bits/fenv_arm.h
@@ -26,8 +26,7 @@
  * $FreeBSD: src/lib/msun/arm/fenv.h,v 1.5 2005/03/16 19:03:45 das Exp $
  */
 
-#ifndef _BITS_FENV_ARM_H_
-#define _BITS_FENV_ARM_H_
+#pragma once
 
 #include <sys/types.h>
 
@@ -73,5 +72,3 @@
 #define FE_TOWARDZERO 0x3
 
 __END_DECLS
-
-#endif
diff --git a/libc/include/bits/fenv_inlines_arm.h b/libc/include/bits/fenv_inlines_arm.h
new file mode 100644
index 0000000..e8b89ea
--- /dev/null
+++ b/libc/include/bits/fenv_inlines_arm.h
@@ -0,0 +1,142 @@
+/*-
+ * Copyright (c) 2004 David Schultz <das@FreeBSD.ORG>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/lib/msun/arm/fenv.c,v 1.1 2004/06/06 10:03:59 das Exp $
+ */
+
+#pragma once
+
+#include <sys/cdefs.h>
+
+#if defined(__arm__)
+
+#if !defined(__BIONIC_FENV_INLINE)
+#define __BIONIC_FENV_INLINE static __inline
+#endif
+
+#include <bits/fenv_arm.h>
+
+__BEGIN_DECLS
+
+#define FPSCR_RMODE_SHIFT 22
+
+__BIONIC_FENV_INLINE int fegetenv(fenv_t* __envp) {
+  fenv_t _fpscr;
+  __asm__ __volatile__("vmrs %0,fpscr" : "=r" (_fpscr));
+  *__envp = _fpscr;
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int fesetenv(const fenv_t* __envp) {
+  fenv_t _fpscr = *__envp;
+  __asm__ __volatile__("vmsr fpscr,%0" : :"ri" (_fpscr));
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int feclearexcept(int __excepts) {
+  fexcept_t __fpscr;
+  fegetenv(&__fpscr);
+  __fpscr &= ~__excepts;
+  fesetenv(&__fpscr);
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
+  fexcept_t __fpscr;
+  fegetenv(&__fpscr);
+  *__flagp = __fpscr & __excepts;
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
+  fexcept_t __fpscr;
+  fegetenv(&__fpscr);
+  __fpscr &= ~__excepts;
+  __fpscr |= *__flagp & __excepts;
+  fesetenv(&__fpscr);
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int feraiseexcept(int __excepts) {
+  fexcept_t __ex = __excepts;
+  fesetexceptflag(&__ex, __excepts);
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int fetestexcept(int __excepts) {
+  fexcept_t __fpscr;
+  fegetenv(&__fpscr);
+  return (__fpscr & __excepts);
+}
+
+__BIONIC_FENV_INLINE int fegetround(void) {
+  fenv_t _fpscr;
+  fegetenv(&_fpscr);
+  return ((_fpscr >> FPSCR_RMODE_SHIFT) & 0x3);
+}
+
+__BIONIC_FENV_INLINE int fesetround(int __round) {
+  fenv_t _fpscr;
+  fegetenv(&_fpscr);
+  _fpscr &= ~(0x3 << FPSCR_RMODE_SHIFT);
+  _fpscr |= (__round << FPSCR_RMODE_SHIFT);
+  fesetenv(&_fpscr);
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int feholdexcept(fenv_t* __envp) {
+  fenv_t __env;
+  fegetenv(&__env);
+  *__envp = __env;
+  __env &= ~FE_ALL_EXCEPT;
+  fesetenv(&__env);
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int feupdateenv(const fenv_t* __envp) {
+  fexcept_t __fpscr;
+  fegetenv(&__fpscr);
+  fesetenv(__envp);
+  feraiseexcept(__fpscr & FE_ALL_EXCEPT);
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int feenableexcept(int __mask __unused) {
+  return -1;
+}
+
+__BIONIC_FENV_INLINE int fedisableexcept(int __mask __unused) {
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int fegetexcept(void) {
+  return 0;
+}
+
+#undef FPSCR_RMODE_SHIFT
+
+__END_DECLS
+
+#endif
diff --git a/libc/include/bits/fenv_inlines_mips.h b/libc/include/bits/fenv_inlines_mips.h
new file mode 100644
index 0000000..dc7f707
--- /dev/null
+++ b/libc/include/bits/fenv_inlines_mips.h
@@ -0,0 +1,171 @@
+/*-
+ * Copyright (c) 2004 David Schultz <das@FreeBSD.ORG>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/lib/msun/mips/fenv.c,v 1.1 2008/04/26 12:20:29 imp Exp $
+ */
+
+#pragma once
+
+#include <sys/cdefs.h>
+
+#if defined(__mips__)
+
+#if !defined(__BIONIC_FENV_INLINE)
+#define __BIONIC_FENV_INLINE static __inline
+#endif
+
+#include <bits/fenv_mips.h>
+
+__BEGIN_DECLS
+
+#define FCSR_CAUSE_SHIFT 10
+#define FCSR_ENABLE_SHIFT 5
+#define FCSR_ENABLE_MASK (FE_ALL_EXCEPT << FCSR_ENABLE_SHIFT)
+
+#define FCSR_RMASK       0x3
+
+__BIONIC_FENV_INLINE int fegetenv(fenv_t* __envp) {
+  fenv_t _fcsr = 0;
+#ifdef  __mips_hard_float
+  __asm__ __volatile__("cfc1 %0,$31" : "=r" (_fcsr));
+#endif
+  *__envp = _fcsr;
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int fesetenv(const fenv_t* __envp) {
+  fenv_t _fcsr = *__envp;
+#ifdef  __mips_hard_float
+  __asm__ __volatile__("ctc1 %0,$31" : : "r" (_fcsr));
+#endif
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int feclearexcept(int __excepts) {
+  fexcept_t __fcsr;
+  fegetenv(&__fcsr);
+  __excepts &= FE_ALL_EXCEPT;
+  __fcsr &= ~(__excepts | (__excepts << FCSR_CAUSE_SHIFT));
+  fesetenv(&__fcsr);
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int fegetexceptflag(fexcept_t* __flagp, int __excepts) {
+  fexcept_t __fcsr;
+  fegetenv(&__fcsr);
+  *__flagp = __fcsr & __excepts & FE_ALL_EXCEPT;
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int fesetexceptflag(const fexcept_t* __flagp, int __excepts) {
+  fexcept_t __fcsr;
+  fegetenv(&__fcsr);
+  /* Ensure that flags are all legal */
+  __excepts &= FE_ALL_EXCEPT;
+  __fcsr &= ~__excepts;
+  __fcsr |= *__flagp & __excepts;
+  fesetenv(&__fcsr);
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int feraiseexcept(int __excepts) {
+  fexcept_t __fcsr;
+  fegetenv(&__fcsr);
+  /* Ensure that flags are all legal */
+  __excepts &= FE_ALL_EXCEPT;
+  /* Cause bit needs to be set as well for generating the exception*/
+  __fcsr |= __excepts | (__excepts << FCSR_CAUSE_SHIFT);
+  fesetenv(&__fcsr);
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int fetestexcept(int __excepts) {
+  fexcept_t __FCSR;
+  fegetenv(&__FCSR);
+  return (__FCSR & __excepts & FE_ALL_EXCEPT);
+}
+
+__BIONIC_FENV_INLINE int fegetround(void) {
+  fenv_t _fcsr;
+  fegetenv(&_fcsr);
+  return (_fcsr & FCSR_RMASK);
+}
+
+__BIONIC_FENV_INLINE int fesetround(int __round) {
+  fenv_t _fcsr;
+  fegetenv(&_fcsr);
+  _fcsr &= ~FCSR_RMASK;
+  _fcsr |= (__round & FCSR_RMASK);
+  fesetenv(&_fcsr);
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int feholdexcept(fenv_t* __envp) {
+  fenv_t __env;
+  fegetenv(&__env);
+  *__envp = __env;
+  __env &= ~(FE_ALL_EXCEPT | FCSR_ENABLE_MASK);
+  fesetenv(&__env);
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int feupdateenv(const fenv_t* __envp) {
+  fexcept_t __fcsr;
+  fegetenv(&__fcsr);
+  fesetenv(__envp);
+  feraiseexcept(__fcsr & FE_ALL_EXCEPT);
+  return 0;
+}
+
+__BIONIC_FENV_INLINE int feenableexcept(int __mask) {
+  fenv_t __old_fcsr, __new_fcsr;
+  fegetenv(&__old_fcsr);
+  __new_fcsr = __old_fcsr | (__mask & FE_ALL_EXCEPT) << FCSR_ENABLE_SHIFT;
+  fesetenv(&__new_fcsr);
+  return ((__old_fcsr >> FCSR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
+}
+
+__BIONIC_FENV_INLINE int fedisableexcept(int __mask) {
+  fenv_t __old_fcsr, __new_fcsr;
+  fegetenv(&__old_fcsr);
+  __new_fcsr = __old_fcsr & ~((__mask & FE_ALL_EXCEPT) << FCSR_ENABLE_SHIFT);
+  fesetenv(&__new_fcsr);
+  return ((__old_fcsr >> FCSR_ENABLE_SHIFT) & FE_ALL_EXCEPT);
+}
+
+__BIONIC_FENV_INLINE int fegetexcept(void) {
+  fenv_t __fcsr;
+  fegetenv(&__fcsr);
+  return ((__fcsr & FCSR_ENABLE_MASK) >> FCSR_ENABLE_SHIFT);
+}
+
+#undef FCSR_CAUSE_SHIFT
+#undef FCSR_ENABLE_SHIFT
+#undef FCSR_ENABLE_MASK
+#undef FCSR_RMASK
+
+__END_DECLS
+
+#endif
diff --git a/libc/include/bits/fenv_mips.h b/libc/include/bits/fenv_mips.h
index 9298e86..dafccac 100644
--- a/libc/include/bits/fenv_mips.h
+++ b/libc/include/bits/fenv_mips.h
@@ -68,8 +68,7 @@
  * 11 - rounding (down)toward minus infinity (RM)
  */
 
-#ifndef _BITS_FENV_MIPS_H_
-#define _BITS_FENV_MIPS_H_
+#pragma once
 
 #include <sys/types.h>
 
@@ -94,5 +93,3 @@
 #define FE_DOWNWARD   0x0003
 
 __END_DECLS
-
-#endif
diff --git a/libc/include/bits/fenv_x86.h b/libc/include/bits/fenv_x86.h
index 75b109b..3381cea 100644
--- a/libc/include/bits/fenv_x86.h
+++ b/libc/include/bits/fenv_x86.h
@@ -26,8 +26,7 @@
  * $FreeBSD: src/lib/msun/i387/fenv.h,v 1.4 2005/03/17 22:21:46 das Exp $
  */
 
-#ifndef _BITS_FENV_X86_H_
-#define _BITS_FENV_X86_H_
+#pragma once
 
 #include <sys/types.h>
 
@@ -65,5 +64,3 @@
 #define FE_TOWARDZERO 0x0c00
 
 __END_DECLS
-
-#endif
diff --git a/libc/include/bits/fenv_x86_64.h b/libc/include/bits/fenv_x86_64.h
index 006d19e..ddb6a5c 100644
--- a/libc/include/bits/fenv_x86_64.h
+++ b/libc/include/bits/fenv_x86_64.h
@@ -24,8 +24,7 @@
  * SUCH DAMAGE.
  */
 
-#ifndef _BITS_FENV_X86_64_H_
-#define _BITS_FENV_X86_64_H_
+#pragma once
 
 #include <sys/types.h>
 
@@ -91,5 +90,3 @@
 typedef __uint32_t fexcept_t;
 
 __END_DECLS
-
-#endif
diff --git a/libc/include/fenv.h b/libc/include/fenv.h
index 2b607f5..886612e 100644
--- a/libc/include/fenv.h
+++ b/libc/include/fenv.h
@@ -27,8 +27,7 @@
  * POSSIBILITY OF SUCH DAMAGE.
  */
 
-#ifndef _FENV_H_
-#define _FENV_H_
+#pragma once
 
 #include <sys/cdefs.h>
 
@@ -79,11 +78,12 @@
  * environment, namely fesetenv() and feupdateenv().
  */
 extern const fenv_t __fe_dfl_env;
-#define FE_DFL_ENV  (&__fe_dfl_env)
+#define FE_DFL_ENV (&__fe_dfl_env)
 
 __END_DECLS
 
+#if defined(__arm__)
 #include <android/legacy_fenv_inlines_arm.h>
+#elif defined(__mips__)
 #include <android/legacy_fenv_inlines_mips.h>
-
-#endif  /* ! _FENV_H_ */
+#endif